VirtualBox

Changeset 64482 in vbox for trunk/src


Ignore:
Timestamp:
Oct 29, 2016 10:15:44 AM (8 years ago)
Author:
vboxsync
Message:

DevVGA: DevVGA_SVGA build fixes for disabled debug code

Location:
trunk/src/VBox/Devices/Graphics
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp

    r64387 r64482  
    5454/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
    5555#include "DevVGA.h"
    56 
    57 #ifdef DEBUG
    58 /* Enable to log FIFO register accesses. */
    59 //# define DEBUG_FIFO_ACCESS
    60 /* Enable to log GMR page accesses. */
    61 //# define DEBUG_GMR_ACCESS
    62 #endif
    6356
    6457#include "DevVGA-SVGA.h"
     
    15891582static int vmsvgaFIFOAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, bool fWriteAccess)
    15901583{
     1584    RT_NOREF(pVM);
    15911585    RTGCPHYS GCPhysOffset = GCPhys - pThis->svga.GCPhysFIFO;
    15921586    uint32_t *pFIFO = pThis->svga.pFIFOR3;
     
    19331927 */
    19341928static DECLCALLBACK(VBOXSTRICTRC)
    1935 vmsvgaR3FIFOAccessHandler(PVM pVM, PVMCPU pVCpu RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
     1929vmsvgaR3FIFOAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
    19361930                          PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)
    19371931{
     
    19391933    int         rc;
    19401934    Assert(pThis);
    1941     Assert(GCPhys >= pThis->GCPhysVRAM);
     1935    Assert(GCPhys >= pThis->svga.GCPhysFIFO);
    19421936    NOREF(pVCpu); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); NOREF(enmOrigin);
    19431937
     
    19531947
    19541948#ifdef DEBUG_GMR_ACCESS
     1949# ifdef IN_RING3
     1950
    19551951/**
    19561952 * HC access handler for the FIFO.
     
    19751971    Assert(pThis);
    19761972    PVMSVGAR3STATE pSVGAState = pThis->svga.pSvgaR3State;
    1977     NOREF(pVCpu); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); NOREF(enmOrigin);
     1973    NOREF(pVCpu); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); NOREF(enmAccessType); NOREF(enmOrigin);
    19781974
    19791975    Log(("vmsvgaR3GMRAccessHandler: GMR access to page %RGp\n", GCPhys));
     
    19951991                     */
    19961992                    int rc = PGMHandlerPhysicalPageTempOff(pVM, pGMR->paDesc[j].GCPhys, GCPhys);
     1993                    AssertRC(rc);
    19971994                    goto end;
    19981995                }
     
    20042001}
    20052002
    2006 # ifdef IN_RING3
    2007 
    2008 /* Callback handler for VMR3ReqCallWait */
     2003/* Callback handler for VMR3ReqCallWaitU */
    20092004static DECLCALLBACK(int) vmsvgaRegisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId)
    20102005{
     
    20242019}
    20252020
    2026 /* Callback handler for VMR3ReqCallWait */
     2021/* Callback handler for VMR3ReqCallWaitU */
    20272022static DECLCALLBACK(int) vmsvgaDeregisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId)
    20282023{
     
    20392034}
    20402035
    2041 /* Callback handler for VMR3ReqCallWait */
     2036/* Callback handler for VMR3ReqCallWaitU */
    20422037static DECLCALLBACK(int) vmsvgaResetGMRHandlers(PVGASTATE pThis)
    20432038{
     
    29712966
    29722967#  ifdef DEBUG_GMR_ACCESS
    2973                 VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaRegisterGMR, 2, pThis->pDevInsR3, pCmd->gmrId);
     2968                VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaRegisterGMR, 2, pThis->pDevInsR3, pCmd->gmrId);
    29742969#  endif
    29752970                break;
     
    31343129                                                   SVGA3D_TEX_FILTER_NONE, cMipLevels, (SVGA3dSize *)(pCmd + 1));
    31353130#  ifdef DEBUG_GMR_ACCESS
    3136                         VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaResetGMRHandlers, 1, pThis);
     3131                        VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaResetGMRHandlers, 1, pThis);
    31373132#  endif
    31383133                        break;
     
    34863481                || (pThis->svga.u32IrqMask & SVGA_IRQFLAG_FIFO_PROGRESS))
    34873482            {
    3488                 PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED);
     3483                int rc2 = PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED);
     3484                AssertRC(rc2);
    34893485
    34903486                /* FIFO progress might trigger an interrupt. */
     
    35383534        PGMR pGMR = &pSVGAState->aGMR[idGMR];
    35393535# ifdef DEBUG_GMR_ACCESS
    3540         VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaDeregisterGMR, 2, pThis->pDevInsR3, idGMR);
     3536        VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaDeregisterGMR, 2, pThis->pDevInsR3, idGMR);
    35413537# endif
    35423538
  • trunk/src/VBox/Devices/Graphics/DevVGA.h

    r64387 r64482  
    213213
    214214#ifdef VBOX_WITH_VMSVGA
     215
     216#ifdef DEBUG
     217/* Enable to log FIFO register accesses. */
     218//# define DEBUG_FIFO_ACCESS
     219/* Enable to log GMR page accesses. */
     220//# define DEBUG_GMR_ACCESS
     221#endif
    215222
    216223#define VMSVGA_FIFO_EXTCMD_NONE                         0
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