Changeset 64545 in vbox

Timestamp:

Nov 4, 2016 1:58:05 AM (8 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

111729

Message:

IEM: Added per-instruction statistics (not release).

Location:

trunk

Files:

• include/VBox/vmm/mm.h (modified) (1 diff)
• src/VBox/VMM/Makefile.kmk (modified) (6 diffs)
• src/VBox/VMM/VMMAll/IEMAll.cpp (modified) (1 diff)
• src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h (modified) (559 diffs)
• src/VBox/VMM/VMMAll/MMAll.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR3/IEMR3.cpp (modified) (3 diffs)
• src/VBox/VMM/include/IEMInternal.h (modified) (2 diffs)
• src/VBox/VMM/testcase/tstIEMCheckMc.cpp (modified) (2 diffs)
• src/VBox/VMM/testcase/tstVMStructDTrace.cpp (modified) (1 diff)
• src/VBox/VMM/testcase/tstVMStructRC.cpp (modified) (1 diff)
• src/VBox/VMM/testcase/tstVMStructSize.cpp (modified) (1 diff)

trunk/include/VBox/vmm/mm.h

@@ -78 +78 @@
 
     MM_TAG_EM,
+
+    MM_TAG_IEM,
 
     MM_TAG_IOM,

trunk/src/VBox/VMM/Makefile.kmk

@@ -139 +139 @@
 VBoxVMM_INCS     = \
         include \
-        $(if-expr defined(VBOX_WITH_RAW_MODE),PATM,)
+        $(if-expr defined(VBOX_WITH_RAW_MODE),PATM,) \
+        $(VBoxVMM_0_OUTDIR)/CommonGenIncs
 VBoxVMM_ASINCS   = .
 
@@ -342 +343 @@
 $(call VBOX_SET_VER_INFO_DLL,VBoxVMM,VirtualBox VMM) # Version info / description.
 
+
+#
+# Generate macro template for IEM instruction statistics.
+#
+VBoxVMM_INTERMEDIATES += $(VBoxVMM_0_OUTDIR)/CommonGenIncs/IEMInstructionStatisticsTmpl.h
+VBoxVMM_CLEAN         += \
+        $(VBoxVMM_0_OUTDIR)/CommonGenIncs/IEMInstructionStatisticsTmpl.h.ts \
+        $(VBoxVMM_0_OUTDIR)/CommonGenIncs/IEMInstructionStatisticsTmpl.h
+$$(VBoxVMM_0_OUTDIR)/CommonGenIncs/IEMInstructionStatisticsTmpl.h.ts \
++| $$(VBoxVMM_0_OUTDIR)/CommonGenIncs/IEMInstructionStatisticsTmpl.h: \
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructions.cpp.h
+        $(QUIET)$(call MSG_GENERATE,VBoxVMM,$@,$<)
+        $(QUIET)$(MKDIR) -p -- "$(dir $@)"
+        $(QUIET)set +e && $(SED) \
+                -e '/IEMOP_MNEMONIC(/!d' \
+               -e 's/^.*IEMOP_MNEMONIC(/IEM_DO_INSTR_STAT(/' \
+               -e 's/;.*$(DOLLAR)//' \
+                --output "[email protected]" $<
+        $(QUIET)$(REDIRECT) -wto "$@" -- sort "[email protected]"
+        $(QUIET)$(RM) -f -- "[email protected]"
+        $(QUIET)$(CP) -v -f --changed -- "$@" "$(patsubst %.ts,%,$@)"
+
+
 if "$(KBUILD_TARGET)" == "win" && !defined(VBOX_ONLY_EXTPACKS_USE_IMPLIBS)
  #
@@ -474 +498 @@
  endif
 
- VMMRC_INCS     := \
+ VMMRC_INCS      = \
         include \
         VMMRC \
-        $(if-expr defined(VBOX_WITH_RAW_MODE),PATM,)
+        $(if-expr defined(VBOX_WITH_RAW_MODE),PATM,) \
+        $(VBoxVMM_0_OUTDIR)/CommonGenIncs
 
  VMMRC_LIBS      = \
@@ -582 +607 @@
  endif
 
+ VMMRC_INTERMEDIATES += $(VBoxVMM_0_OUTDIR)/IEMInstructionStatisticsTmpl.h
+
  if "$(KBUILD_TARGET)" == "win"
   # Debug type info hack for VMCPU, VM and similar.  See VBoxVMM for details.
@@ -635 +662 @@
  VMMR0_INCS      = \
         include \
-        $(if-expr defined(VBOX_WITH_RAW_MODE),PATM,)
+        $(if-expr defined(VBOX_WITH_RAW_MODE),PATM,) \
+        $(VBoxVMM_0_OUTDIR)/CommonGenIncs
 
  VMMR0_SOURCES   = \
@@ -739 +767 @@
  endif
 
+ VMMR0_INTERMEDIATES += $(VBoxVMM_0_OUTDIR)/IEMInstructionStatisticsTmpl.h
+
  if "$(KBUILD_TARGET)" == "win"
   # Debug type info hack for VMCPU, VM and similar.  See VBoxVMM for details.

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -11390 +11390 @@
  * @{
  */
+#ifdef VBOX_WITH_STATISTICS
+# define IEMOP_INC_STATS(a_Stats) do { pVCpu->iem.s.CTX_SUFF(pStats)->a_Stats += 1; } while (0)
+#else
+# define IEMOP_INC_STATS(a_Stats) do { } while (0)
+#endif
+
 #ifdef DEBUG
-# define IEMOP_MNEMONIC(a_szMnemonic) \
-    Log4(("decode - %04x:%RGv %s%s [#%u]\n", IEM_GET_CTX(pVCpu)->cs.Sel, IEM_GET_CTX(pVCpu)->rip, \
-          pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, pVCpu->iem.s.cInstructions))
-# define IEMOP_MNEMONIC2(a_szMnemonic, a_szOps) \
-    Log4(("decode - %04x:%RGv %s%s %s [#%u]\n", IEM_GET_CTX(pVCpu)->cs.Sel, IEM_GET_CTX(pVCpu)->rip, \
-          pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, a_szOps, pVCpu->iem.s.cInstructions))
+# define IEMOP_MNEMONIC(a_Stats, a_szMnemonic) \
+    do { \
+        IEMOP_INC_STATS(a_Stats); \
+        Log4(("decode - %04x:%RGv %s%s [#%u]\n", IEM_GET_CTX(pVCpu)->cs.Sel, IEM_GET_CTX(pVCpu)->rip, \
+              pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, pVCpu->iem.s.cInstructions)); \
+    } while (0)
 #else
-# define IEMOP_MNEMONIC(a_szMnemonic) do { } while (0)
-# define IEMOP_MNEMONIC2(a_szMnemonic, a_szOps) do { } while (0)
+# define IEMOP_MNEMONIC(a_Stats, a_szMnemonic) IEMOP_INC_STATS(a_Stats)
 #endif
 

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -535 +535 @@
 FNIEMOP_DEF(iemOp_Invalid)
 {
-    IEMOP_MNEMONIC("Invalid");
+    IEMOP_MNEMONIC(Invalid, "Invalid");
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -544 +544 @@
 {
     RT_NOREF_PV(bRm);
-    IEMOP_MNEMONIC("InvalidWithRM");
+    IEMOP_MNEMONIC(InvalidWithRm, "InvalidWithRM");
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -566 +566 @@
 FNIEMOPRM_DEF(iemOp_Grp6_sldt)
 {
-    IEMOP_MNEMONIC("sldt Rv/Mw");
+    IEMOP_MNEMONIC(sldt, "sldt Rv/Mw");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_NO_REAL_OR_V86_MODE();
@@ -624 +624 @@
 FNIEMOPRM_DEF(iemOp_Grp6_str)
 {
-    IEMOP_MNEMONIC("str Rv/Mw");
+    IEMOP_MNEMONIC(str, "str Rv/Mw");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_NO_REAL_OR_V86_MODE();
@@ -682 +682 @@
 FNIEMOPRM_DEF(iemOp_Grp6_lldt)
 {
-    IEMOP_MNEMONIC("lldt Ew");
+    IEMOP_MNEMONIC(lldt, "lldt Ew");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_NO_REAL_OR_V86_MODE();
@@ -714 +714 @@
 FNIEMOPRM_DEF(iemOp_Grp6_ltr)
 {
-    IEMOP_MNEMONIC("ltr Ew");
+    IEMOP_MNEMONIC(ltr, "ltr Ew");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_NO_REAL_OR_V86_MODE();
@@ -778 +778 @@
 FNIEMOPRM_DEF(iemOp_Grp6_verr)
 {
-    IEMOP_MNEMONIC("verr Ew");
+    IEMOP_MNEMONIC(verr, "verr Ew");
     IEMOP_HLP_MIN_286();
     return FNIEMOP_CALL_2(iemOpCommonGrp6VerX, bRm, false);
@@ -787 +787 @@
 FNIEMOPRM_DEF(iemOp_Grp6_verw)
 {
-    IEMOP_MNEMONIC("verr Ew");
+    IEMOP_MNEMONIC(verw, "verw Ew");
     IEMOP_HLP_MIN_286();
     return FNIEMOP_CALL_2(iemOpCommonGrp6VerX, bRm, true);
@@ -819 +819 @@
 FNIEMOP_DEF_1(iemOp_Grp7_sgdt, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("sgdt Ms");
+    IEMOP_MNEMONIC(sgdt, "sgdt Ms");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_64BIT_OP_SIZE();
@@ -869 +869 @@
 FNIEMOP_DEF_1(iemOp_Grp7_sidt, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("sidt Ms");
+    IEMOP_MNEMONIC(sidt, "sidt Ms");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_64BIT_OP_SIZE();
@@ -887 +887 @@
 FNIEMOP_DEF(iemOp_Grp7_monitor)
 {
-    IEMOP_MNEMONIC("monitor");
+    IEMOP_MNEMONIC(monitor, "monitor");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); /** @todo Verify that monitor is allergic to lock prefixes. */
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_monitor, pVCpu->iem.s.iEffSeg);
@@ -896 +896 @@
 FNIEMOP_DEF(iemOp_Grp7_mwait)
 {
-    IEMOP_MNEMONIC("mwait"); /** @todo Verify that mwait is allergic to lock prefixes. */
+    IEMOP_MNEMONIC(mwait, "mwait"); /** @todo Verify that mwait is allergic to lock prefixes. */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_mwait);
@@ -905 +905 @@
 FNIEMOP_DEF_1(iemOp_Grp7_lgdt, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("lgdt");
+    IEMOP_MNEMONIC(lgdt, "lgdt");
     IEMOP_HLP_64BIT_OP_SIZE();
     IEM_MC_BEGIN(3, 1);
@@ -923 +923 @@
 FNIEMOP_DEF(iemOp_Grp7_xgetbv)
 {
-    IEMOP_MNEMONIC("xgetbv");
+    IEMOP_MNEMONIC(xgetbv, "xgetbv");
     if (IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fXSaveRstor)
     {
@@ -936 +936 @@
 FNIEMOP_DEF(iemOp_Grp7_xsetbv)
 {
-    IEMOP_MNEMONIC("xsetbv");
+    IEMOP_MNEMONIC(xsetbv, "xsetbv");
     if (IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fXSaveRstor)
     {
@@ -949 +949 @@
 FNIEMOP_DEF_1(iemOp_Grp7_lidt, uint8_t, bRm)
 {
+    IEMOP_MNEMONIC(lidt, "lidt");
     IEMMODE enmEffOpSize = pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT
                          ? IEMMODE_64BIT
@@ -992 +993 @@
 FNIEMOP_DEF_1(iemOp_Grp7_smsw, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("smsw");
+    IEMOP_MNEMONIC(smsw, "smsw");
     IEMOP_HLP_MIN_286();
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1063 +1064 @@
     /* The operand size is effectively ignored, all is 16-bit and only the
        lower 3-bits are used. */
-    IEMOP_MNEMONIC("lmsw");
+    IEMOP_MNEMONIC(lmsw, "lmsw");
     IEMOP_HLP_MIN_286();
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1092 +1093 @@
 FNIEMOP_DEF_1(iemOp_Grp7_invlpg, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("invlpg");
+    IEMOP_MNEMONIC(invlpg, "invlpg");
     IEMOP_HLP_MIN_486();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -1107 +1108 @@
 FNIEMOP_DEF(iemOp_Grp7_swapgs)
 {
-    IEMOP_MNEMONIC("swapgs");
+    IEMOP_MNEMONIC(swapgs, "swapgs");
     IEMOP_HLP_ONLY_64BIT();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -1299 +1300 @@
 FNIEMOP_DEF(iemOp_lar_Gv_Ew)
 {
-    IEMOP_MNEMONIC("lar Gv,Ew");
+    IEMOP_MNEMONIC(lar, "lar Gv,Ew");
     return FNIEMOP_CALL_1(iemOpCommonLarLsl_Gv_Ew, true);
 }
@@ -1307 +1308 @@
 FNIEMOP_DEF(iemOp_lsl_Gv_Ew)
 {
-    IEMOP_MNEMONIC("lsl Gv,Ew");
+    IEMOP_MNEMONIC(lsl, "lsl Gv,Ew");
     return FNIEMOP_CALL_1(iemOpCommonLarLsl_Gv_Ew, false);
 }
@@ -1315 +1316 @@
 FNIEMOP_DEF(iemOp_syscall)
 {
-    IEMOP_MNEMONIC("syscall"); /** @todo 286 LOADALL   */
+    IEMOP_MNEMONIC(syscall, "syscall"); /** @todo 286 LOADALL   */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_syscall);
@@ -1324 +1325 @@
 FNIEMOP_DEF(iemOp_clts)
 {
-    IEMOP_MNEMONIC("clts");
+    IEMOP_MNEMONIC(clts, "clts");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_clts);
@@ -1333 +1334 @@
 FNIEMOP_DEF(iemOp_sysret)
 {
-    IEMOP_MNEMONIC("sysret");  /** @todo 386 LOADALL   */
+    IEMOP_MNEMONIC(sysret, "sysret");  /** @todo 386 LOADALL   */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_sysret);
@@ -1347 +1348 @@
 FNIEMOP_DEF(iemOp_wbinvd)
 {
-    IEMOP_MNEMONIC("wbinvd");
+    IEMOP_MNEMONIC(wbinvd, "wbinvd");
     IEMOP_HLP_MIN_486();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -1361 +1362 @@
 FNIEMOP_DEF(iemOp_ud2)
 {
-    IEMOP_MNEMONIC("ud2");
+    IEMOP_MNEMONIC(ud2, "ud2");
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -1371 +1372 @@
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->f3DNowPrefetch)
     {
-        IEMOP_MNEMONIC("GrpP");
+        IEMOP_MNEMONIC(GrpPNotSupported, "GrpP");
         return IEMOP_RAISE_INVALID_OPCODE();
     }
@@ -1378 +1379 @@
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     {
-        IEMOP_MNEMONIC("GrpP");
+        IEMOP_MNEMONIC(GrpPInvalid, "GrpP");
         return IEMOP_RAISE_INVALID_OPCODE();
     }
@@ -1389 +1390 @@
         case 6: /* Aliased to /0 for the time being. */
         case 7: /* Aliased to /0 for the time being. */
-        case 0: IEMOP_MNEMONIC("prefetch"); break;
-        case 1: IEMOP_MNEMONIC("prefetchw"); break;
-        case 3: IEMOP_MNEMONIC("prefetchw"); break;
+        case 0: IEMOP_MNEMONIC(prefetch, "prefetch"); break;
+        case 1: IEMOP_MNEMONIC(prefetchw_1, "prefetchw"); break;
+        case 3: IEMOP_MNEMONIC(prefetchw_3, "prefetchw"); break;
         IEM_NOT_REACHED_DEFAULT_CASE_RET();
     }
@@ -1489 +1490 @@
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->f3DNow)
     {
-        IEMOP_MNEMONIC("3Dnow");
+        IEMOP_MNEMONIC(Inv3Dnow, "3Dnow");
         return IEMOP_RAISE_INVALID_OPCODE();
     }
@@ -1538 +1539 @@
     if (fRelevantPrefix == 0)
     {
-        IEMOP_MNEMONIC("movups Wps,Vps");
+        IEMOP_MNEMONIC(movups_Wps_Vps, "movups Wps,Vps");
         uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
         if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1577 +1578 @@
     else if (fRelevantPrefix == IEM_OP_PRF_REPNZ)
     {
-        IEMOP_MNEMONIC("movsd Wsd,Vsd");
+        IEMOP_MNEMONIC(movsd_Wsd_Vsd, "movsd Wsd,Vsd");
         uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
         if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1636 +1637 @@
     if (pVCpu->iem.s.fPrefixes == IEM_OP_PRF_SIZE_OP)
     {
-        IEMOP_MNEMONIC("movlpd Mq,Vq");
+        IEMOP_MNEMONIC(movlpd_Mq_Vq, "movlpd Mq,Vq");
         uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
         if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1707 +1708 @@
             case 6: /* Aliased to /0 for the time being according to AMD. */
             case 7: /* Aliased to /0 for the time being according to AMD. */
-            case 0: IEMOP_MNEMONIC("prefetchNTA m8"); break;
-            case 1: IEMOP_MNEMONIC("prefetchT0  m8"); break;
-            case 2: IEMOP_MNEMONIC("prefetchT1  m8"); break;
-            case 3: IEMOP_MNEMONIC("prefetchT2  m8"); break;
+            case 0: IEMOP_MNEMONIC(prefetchNTA, "prefetchNTA m8"); break;
+            case 1: IEMOP_MNEMONIC(prefetchT0, "prefetchT0  m8"); break;
+            case 2: IEMOP_MNEMONIC(prefetchT1, "prefetchT1  m8"); break;
+            case 3: IEMOP_MNEMONIC(prefetchT2, "prefetchT2  m8"); break;
             IEM_NOT_REACHED_DEFAULT_CASE_RET();
         }
@@ -1732 +1733 @@
 FNIEMOP_DEF(iemOp_nop_Ev)
 {
+    IEMOP_MNEMONIC(nop_Ev, "nop Ev");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1759 +1761 @@
 {
     /* mod is ignored, as is operand size overrides. */
-    IEMOP_MNEMONIC("mov Rd,Cd");
+    IEMOP_MNEMONIC(mov_Rd_Cd, "mov Rd,Cd");
     IEMOP_HLP_MIN_386();
     if (pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT)
@@ -1791 +1793 @@
 FNIEMOP_DEF(iemOp_mov_Rd_Dd)
 {
-    IEMOP_MNEMONIC("mov Rd,Dd");
+    IEMOP_MNEMONIC(mov_Rd_Dd, "mov Rd,Dd");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -1807 +1809 @@
 {
     /* mod is ignored, as is operand size overrides. */
-    IEMOP_MNEMONIC("mov Cd,Rd");
+    IEMOP_MNEMONIC(mov_Cd_Rd, "mov Cd,Rd");
     IEMOP_HLP_MIN_386();
     if (pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT)
@@ -1839 +1841 @@
 FNIEMOP_DEF(iemOp_mov_Dd_Rd)
 {
-    IEMOP_MNEMONIC("mov Dd,Rd");
+    IEMOP_MNEMONIC(mov_Dd_Rd, "mov Dd,Rd");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -1854 +1856 @@
 FNIEMOP_DEF(iemOp_mov_Rd_Td)
 {
-    IEMOP_MNEMONIC("mov Rd,Td");
+    IEMOP_MNEMONIC(mov_Rd_Td, "mov Rd,Td");
     /** @todo works on 386 and 486. */
     /* The RM byte is not considered, see testcase. */
@@ -1864 +1866 @@
 FNIEMOP_DEF(iemOp_mov_Td_Rd)
 {
-    IEMOP_MNEMONIC("mov Td,Rd");
+    IEMOP_MNEMONIC(mov_Td_Rd, "mov Td,Rd");
     /** @todo works on 386 and 486. */
     /* The RM byte is not considered, see testcase. */
@@ -1874 +1876 @@
 FNIEMOP_DEF(iemOp_movaps_Vps_Wps__movapd_Vpd_Wpd)
 {
-    IEMOP_MNEMONIC(!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP) ? "movaps r,mr" : "movapd r,mr");
+    if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP))
+        IEMOP_MNEMONIC(movaps_r_mr, "movaps r,mr");
+    else
+        IEMOP_MNEMONIC(movapd_r_mr, "movapd r,mr");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1923 +1928 @@
 FNIEMOP_DEF(iemOp_movaps_Wps_Vps__movapd_Wpd_Vpd)
 {
-    IEMOP_MNEMONIC(!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP) ? "movaps mr,r" : "movapd mr,r");
+    if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP))
+        IEMOP_MNEMONIC(movaps_mr_r, "movaps Wps,Vps");
+    else
+        IEMOP_MNEMONIC(movapd_mr_r, "movapd Wpd,Vpd");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -1976 +1984 @@
 FNIEMOP_DEF(iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd)
 {
-    IEMOP_MNEMONIC(!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP) ? "movntps mr,r" : "movntpd mr,r");
+    if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP))
+        IEMOP_MNEMONIC(movntps_mr_r, "movntps Mps,Vps");
+    else
+        IEMOP_MNEMONIC(movntpd_mr_r, "movntpd Mdq,Vpd");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
@@ -2021 +2032 @@
 FNIEMOP_DEF(iemOp_wrmsr)
 {
-    IEMOP_MNEMONIC("wrmsr");
+    IEMOP_MNEMONIC(wrmsr, "wrmsr");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_wrmsr);
@@ -2030 +2041 @@
 FNIEMOP_DEF(iemOp_rdtsc)
 {
-    IEMOP_MNEMONIC("rdtsc");
+    IEMOP_MNEMONIC(rdtsc, "rdtsc");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rdtsc);
@@ -2039 +2050 @@
 FNIEMOP_DEF(iemOp_rdmsr)
 {
-    IEMOP_MNEMONIC("rdmsr");
+    IEMOP_MNEMONIC(rdmsr, "rdmsr");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_rdmsr);
@@ -2165 +2176 @@
 FNIEMOP_DEF(iemOp_cmovo_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovo Gv,Ev");
+    IEMOP_MNEMONIC(cmovo_Gv_Ev, "cmovo Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF));
 }
@@ -2173 +2184 @@
 FNIEMOP_DEF(iemOp_cmovno_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovno Gv,Ev");
+    IEMOP_MNEMONIC(cmovno_Gv_Ev, "cmovno Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_OF));
 }
@@ -2181 +2192 @@
 FNIEMOP_DEF(iemOp_cmovc_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovc Gv,Ev");
+    IEMOP_MNEMONIC(cmovc_Gv_Ev, "cmovc Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF));
 }
@@ -2189 +2200 @@
 FNIEMOP_DEF(iemOp_cmovnc_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovnc Gv,Ev");
+    IEMOP_MNEMONIC(cmovnc_Gv_Ev, "cmovnc Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_CF));
 }
@@ -2197 +2208 @@
 FNIEMOP_DEF(iemOp_cmove_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmove Gv,Ev");
+    IEMOP_MNEMONIC(cmove_Gv_Ev, "cmove Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF));
 }
@@ -2205 +2216 @@
 FNIEMOP_DEF(iemOp_cmovne_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovne Gv,Ev");
+    IEMOP_MNEMONIC(cmovne_Gv_Ev, "cmovne Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_ZF));
 }
@@ -2213 +2224 @@
 FNIEMOP_DEF(iemOp_cmovbe_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovbe Gv,Ev");
+    IEMOP_MNEMONIC(cmovbe_Gv_Ev, "cmovbe Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF));
 }
@@ -2221 +2232 @@
 FNIEMOP_DEF(iemOp_cmovnbe_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovnbe Gv,Ev");
+    IEMOP_MNEMONIC(cmovnbe_Gv_Ev, "cmovnbe Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_NO_BITS_SET(X86_EFL_CF | X86_EFL_ZF));
 }
@@ -2229 +2240 @@
 FNIEMOP_DEF(iemOp_cmovs_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovs Gv,Ev");
+    IEMOP_MNEMONIC(cmovs_Gv_Ev, "cmovs Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF));
 }
@@ -2237 +2248 @@
 FNIEMOP_DEF(iemOp_cmovns_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovns Gv,Ev");
+    IEMOP_MNEMONIC(cmovns_Gv_Ev, "cmovns Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_SF));
 }
@@ -2245 +2256 @@
 FNIEMOP_DEF(iemOp_cmovp_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovp Gv,Ev");
+    IEMOP_MNEMONIC(cmovp_Gv_Ev, "cmovp Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF));
 }
@@ -2253 +2264 @@
 FNIEMOP_DEF(iemOp_cmovnp_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovnp Gv,Ev");
+    IEMOP_MNEMONIC(cmovnp_Gv_Ev, "cmovnp Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_PF));
 }
@@ -2261 +2272 @@
 FNIEMOP_DEF(iemOp_cmovl_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovl Gv,Ev");
+    IEMOP_MNEMONIC(cmovl_Gv_Ev, "cmovl Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF));
 }
@@ -2269 +2280 @@
 FNIEMOP_DEF(iemOp_cmovnl_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovnl Gv,Ev");
+    IEMOP_MNEMONIC(cmovnl_Gv_Ev, "cmovnl Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BITS_EQ(X86_EFL_SF, X86_EFL_OF));
 }
@@ -2277 +2288 @@
 FNIEMOP_DEF(iemOp_cmovle_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovle Gv,Ev");
+    IEMOP_MNEMONIC(cmovle_Gv_Ev, "cmovle Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF));
 }
@@ -2285 +2296 @@
 FNIEMOP_DEF(iemOp_cmovnle_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmovnle Gv,Ev");
+    IEMOP_MNEMONIC(cmovnle_Gv_Ev, "cmovnle Gv,Ev");
     CMOV_X(IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF));
 }
@@ -2440 +2451 @@
 FNIEMOP_DEF(iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpcklbw");
+    IEMOP_MNEMONIC(punpcklbw, "punpcklbw");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_LowLow_To_Full, &g_iemAImpl_punpcklbw);
 }
@@ -2448 +2459 @@
 FNIEMOP_DEF(iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpcklwd"); /** @todo AMD mark the MMX version as 3DNow!. Intel says MMX CPUID req. */
+    IEMOP_MNEMONIC(punpcklwd, "punpcklwd"); /** @todo AMD mark the MMX version as 3DNow!. Intel says MMX CPUID req. */
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_LowLow_To_Full, &g_iemAImpl_punpcklwd);
 }
@@ -2456 +2467 @@
 FNIEMOP_DEF(iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpckldq");
+    IEMOP_MNEMONIC(punpckldq, "punpckldq");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_LowLow_To_Full, &g_iemAImpl_punpckldq);
 }
@@ -2588 +2599 @@
 FNIEMOP_DEF(iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpckhbw");
+    IEMOP_MNEMONIC(punpckhbw, "punpckhbw");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_HighHigh_To_Full, &g_iemAImpl_punpckhbw);
 }
@@ -2596 +2607 @@
 FNIEMOP_DEF(iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpckhwd");
+    IEMOP_MNEMONIC(punpckhwd, "punpckhwd");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_HighHigh_To_Full, &g_iemAImpl_punpckhwd);
 }
@@ -2604 +2615 @@
 FNIEMOP_DEF(iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpckhdq");
+    IEMOP_MNEMONIC(punpckhdq, "punpckhdq");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_HighHigh_To_Full, &g_iemAImpl_punpckhdq);
 }
@@ -2615 +2626 @@
 FNIEMOP_DEF(iemOp_punpcklqdq_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpcklqdq");
+    IEMOP_MNEMONIC(punpcklqdq, "punpcklqdq");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_LowLow_To_Full, &g_iemAImpl_punpcklqdq);
 }
@@ -2623 +2634 @@
 FNIEMOP_DEF(iemOp_punpckhqdq_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("punpckhqdq");
+    IEMOP_MNEMONIC(punpckhqdq, "punpckhqdq");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse_HighHigh_To_Full, &g_iemAImpl_punpckhqdq);
 }
@@ -2635 +2646 @@
     {
         case IEM_OP_PRF_SIZE_OP: /* SSE */
-            IEMOP_MNEMONIC("movd/q Wd/q,Ed/q");
+            if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
+                IEMOP_MNEMONIC(movdq_Wq_Eq, "movq Wq,Eq");
+            else
+                IEMOP_MNEMONIC(movdq_Wd_Ed, "movd Wd,Ed");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -2685 +2699 @@
 
         case 0: /* MMX */
-            IEMOP_MNEMONIC("movq/d Pd/q,Ed/q");
+            if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
+                IEMOP_MNEMONIC(movq_Pq_Eq, "movq Pq,Eq");
+            else
+                IEMOP_MNEMONIC(movd_Pd_Ed, "movd Pd,Ed");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -2745 +2762 @@
         case IEM_OP_PRF_REPZ: /* SSE unaligned */
             if (fAligned)
-                IEMOP_MNEMONIC("movdqa Vdq,Wdq");
+                IEMOP_MNEMONIC(movdqa_Vdq_Wdq, "movdqa Vdq,Wdq");
             else
-                IEMOP_MNEMONIC("movdqu Vdq,Wdq");
+                IEMOP_MNEMONIC(movdqu_Vdq_Wdq, "movdqu Vdq,Wdq");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -2787 +2804 @@
 
         case 0: /* MMX */
-            IEMOP_MNEMONIC("movq Pq,Qq");
+            IEMOP_MNEMONIC(movq_Pq_Qq, "movq Pq,Qq");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -2846 +2863 @@
             {
                 case IEM_OP_PRF_SIZE_OP:
-                    IEMOP_MNEMONIC("pshufd Vdq,Wdq,Ib");
+                    IEMOP_MNEMONIC(pshufd_Vdq_Wdq, "pshufd Vdq,Wdq,Ib");
                     pfnAImpl = iemAImpl_pshufd;
                     break;
                 case IEM_OP_PRF_REPNZ:
-                    IEMOP_MNEMONIC("pshuflw Vdq,Wdq,Ib");
+                    IEMOP_MNEMONIC(pshuflw_Vdq_Wdq, "pshuflw Vdq,Wdq,Ib");
                     pfnAImpl = iemAImpl_pshuflw;
                     break;
                 case IEM_OP_PRF_REPZ:
-                    IEMOP_MNEMONIC("pshufhw Vdq,Wdq,Ib");
+                    IEMOP_MNEMONIC(pshufhw_Vdq_Wdq, "pshufhw Vdq,Wdq,Ib");
                     pfnAImpl = iemAImpl_pshufhw;
                     break;
@@ -2908 +2925 @@
 
         case 0: /* MMX Extension */
-            IEMOP_MNEMONIC("pshufw Pq,Qq,Ib");
+            IEMOP_MNEMONIC(pshufw_Pq_Qq, "pshufw Pq,Qq,Ib");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -3242 +3259 @@
 FNIEMOP_DEF(iemOp_pcmpeqb_Pq_Qq__pcmpeqb_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("pcmpeqb");
+    IEMOP_MNEMONIC(pcmpeqb, "pcmpeqb");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse2_FullFull_To_Full, &g_iemAImpl_pcmpeqb);
 }
@@ -3250 +3267 @@
 FNIEMOP_DEF(iemOp_pcmpeqw_Pq_Qq__pcmpeqw_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("pcmpeqw");
+    IEMOP_MNEMONIC(pcmpeqw, "pcmpeqw");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse2_FullFull_To_Full, &g_iemAImpl_pcmpeqw);
 }
@@ -3258 +3275 @@
 FNIEMOP_DEF(iemOp_pcmped_Pq_Qq__pcmpeqd_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("pcmpeqd");
+    IEMOP_MNEMONIC(pcmpeqd, "pcmpeqd");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse2_FullFull_To_Full, &g_iemAImpl_pcmpeqd);
 }
@@ -3282 +3299 @@
     {
         case IEM_OP_PRF_SIZE_OP: /* SSE */
-            IEMOP_MNEMONIC("movd/q Ed/q,Wd/q");
+            if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
+                IEMOP_MNEMONIC(movq_Eq_Wq, "movq Eq,Wq");
+            else
+                IEMOP_MNEMONIC(movd_Ed_Wd, "movd Ed,Wd");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -3332 +3352 @@
 
         case 0: /* MMX */
-            IEMOP_MNEMONIC("movq/d Ed/q,Pd/q");
+            if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
+                IEMOP_MNEMONIC(movq_Eq_Pq, "movq Eq,Pq");
+            else
+                IEMOP_MNEMONIC(movd_Ed_Pd, "movd Ed,Pd");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -3398 +3421 @@
         case IEM_OP_PRF_REPZ: /* SSE unaligned */
             if (fAligned)
-                IEMOP_MNEMONIC("movdqa Wdq,Vdq");
+                IEMOP_MNEMONIC(movdqa_Wdq_Vdq, "movdqa Wdq,Vdq");
             else
-                IEMOP_MNEMONIC("movdqu Wdq,Vdq");
+                IEMOP_MNEMONIC(movdqu_Wdq_Vdq, "movdqu Wdq,Vdq");
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
             {
@@ -3441 +3464 @@
 
         case 0: /* MMX */
-            IEMOP_MNEMONIC("movq Qq,Pq");
+            IEMOP_MNEMONIC(movq_Qq_Pq, "movq Qq,Pq");
 
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -3492 +3515 @@
 FNIEMOP_DEF(iemOp_jo_Jv)
 {
-    IEMOP_MNEMONIC("jo  Jv");
+    IEMOP_MNEMONIC(jo_Jv, "jo  Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3528 +3551 @@
 FNIEMOP_DEF(iemOp_jno_Jv)
 {
-    IEMOP_MNEMONIC("jno Jv");
+    IEMOP_MNEMONIC(jno_Jv, "jno Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3564 +3587 @@
 FNIEMOP_DEF(iemOp_jc_Jv)
 {
-    IEMOP_MNEMONIC("jc/jb/jnae Jv");
+    IEMOP_MNEMONIC(jc_Jv, "jc/jb/jnae Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3600 +3623 @@
 FNIEMOP_DEF(iemOp_jnc_Jv)
 {
-    IEMOP_MNEMONIC("jnc/jnb/jae Jv");
+    IEMOP_MNEMONIC(jnc_Jv, "jnc/jnb/jae Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3636 +3659 @@
 FNIEMOP_DEF(iemOp_je_Jv)
 {
-    IEMOP_MNEMONIC("je/jz Jv");
+    IEMOP_MNEMONIC(je_Jv, "je/jz Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3672 +3695 @@
 FNIEMOP_DEF(iemOp_jne_Jv)
 {
-    IEMOP_MNEMONIC("jne/jnz Jv");
+    IEMOP_MNEMONIC(jne_Jv, "jne/jnz Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3708 +3731 @@
 FNIEMOP_DEF(iemOp_jbe_Jv)
 {
-    IEMOP_MNEMONIC("jbe/jna Jv");
+    IEMOP_MNEMONIC(jbe_Jv, "jbe/jna Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3744 +3767 @@
 FNIEMOP_DEF(iemOp_jnbe_Jv)
 {
-    IEMOP_MNEMONIC("jnbe/ja Jv");
+    IEMOP_MNEMONIC(ja_Jv, "jnbe/ja Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3780 +3803 @@
 FNIEMOP_DEF(iemOp_js_Jv)
 {
-    IEMOP_MNEMONIC("js  Jv");
+    IEMOP_MNEMONIC(js_Jv, "js  Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3816 +3839 @@
 FNIEMOP_DEF(iemOp_jns_Jv)
 {
-    IEMOP_MNEMONIC("jns Jv");
+    IEMOP_MNEMONIC(jns_Jv, "jns Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3852 +3875 @@
 FNIEMOP_DEF(iemOp_jp_Jv)
 {
-    IEMOP_MNEMONIC("jp  Jv");
+    IEMOP_MNEMONIC(jp_Jv, "jp  Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3888 +3911 @@
 FNIEMOP_DEF(iemOp_jnp_Jv)
 {
-    IEMOP_MNEMONIC("jo  Jv");
+    IEMOP_MNEMONIC(jnp_Jv, "jnp Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3924 +3947 @@
 FNIEMOP_DEF(iemOp_jl_Jv)
 {
-    IEMOP_MNEMONIC("jl/jnge Jv");
+    IEMOP_MNEMONIC(jl_Jv, "jl/jnge Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3960 +3983 @@
 FNIEMOP_DEF(iemOp_jnl_Jv)
 {
-    IEMOP_MNEMONIC("jnl/jge Jv");
+    IEMOP_MNEMONIC(jge_Jv, "jnl/jge Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -3996 +4019 @@
 FNIEMOP_DEF(iemOp_jle_Jv)
 {
-    IEMOP_MNEMONIC("jle/jng Jv");
+    IEMOP_MNEMONIC(jle_Jv, "jle/jng Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -4032 +4055 @@
 FNIEMOP_DEF(iemOp_jnle_Jv)
 {
-    IEMOP_MNEMONIC("jnle/jg Jv");
+    IEMOP_MNEMONIC(jg_Jv, "jnle/jg Jv");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -4068 +4091 @@
 FNIEMOP_DEF(iemOp_seto_Eb)
 {
-    IEMOP_MNEMONIC("seto Eb");
+    IEMOP_MNEMONIC(seto_Eb, "seto Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4110 +4133 @@
 FNIEMOP_DEF(iemOp_setno_Eb)
 {
-    IEMOP_MNEMONIC("setno Eb");
+    IEMOP_MNEMONIC(setno_Eb, "setno Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4152 +4175 @@
 FNIEMOP_DEF(iemOp_setc_Eb)
 {
-    IEMOP_MNEMONIC("setc Eb");
+    IEMOP_MNEMONIC(setc_Eb, "setc Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4194 +4217 @@
 FNIEMOP_DEF(iemOp_setnc_Eb)
 {
-    IEMOP_MNEMONIC("setnc Eb");
+    IEMOP_MNEMONIC(setnc_Eb, "setnc Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4236 +4259 @@
 FNIEMOP_DEF(iemOp_sete_Eb)
 {
-    IEMOP_MNEMONIC("sete Eb");
+    IEMOP_MNEMONIC(sete_Eb, "sete Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4278 +4301 @@
 FNIEMOP_DEF(iemOp_setne_Eb)
 {
-    IEMOP_MNEMONIC("setne Eb");
+    IEMOP_MNEMONIC(setne_Eb, "setne Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4320 +4343 @@
 FNIEMOP_DEF(iemOp_setbe_Eb)
 {
-    IEMOP_MNEMONIC("setbe Eb");
+    IEMOP_MNEMONIC(setbe_Eb, "setbe Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4362 +4385 @@
 FNIEMOP_DEF(iemOp_setnbe_Eb)
 {
-    IEMOP_MNEMONIC("setnbe Eb");
+    IEMOP_MNEMONIC(setnbe_Eb, "setnbe Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4404 +4427 @@
 FNIEMOP_DEF(iemOp_sets_Eb)
 {
-    IEMOP_MNEMONIC("sets Eb");
+    IEMOP_MNEMONIC(sets_Eb, "sets Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4446 +4469 @@
 FNIEMOP_DEF(iemOp_setns_Eb)
 {
-    IEMOP_MNEMONIC("setns Eb");
+    IEMOP_MNEMONIC(setns_Eb, "setns Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4488 +4511 @@
 FNIEMOP_DEF(iemOp_setp_Eb)
 {
-    IEMOP_MNEMONIC("setnp Eb");
+    IEMOP_MNEMONIC(setp_Eb, "setp Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4530 +4553 @@
 FNIEMOP_DEF(iemOp_setnp_Eb)
 {
-    IEMOP_MNEMONIC("setnp Eb");
+    IEMOP_MNEMONIC(setnp_Eb, "setnp Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4572 +4595 @@
 FNIEMOP_DEF(iemOp_setl_Eb)
 {
-    IEMOP_MNEMONIC("setl Eb");
+    IEMOP_MNEMONIC(setl_Eb, "setl Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4614 +4637 @@
 FNIEMOP_DEF(iemOp_setnl_Eb)
 {
-    IEMOP_MNEMONIC("setnl Eb");
+    IEMOP_MNEMONIC(setnl_Eb, "setnl Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4656 +4679 @@
 FNIEMOP_DEF(iemOp_setle_Eb)
 {
-    IEMOP_MNEMONIC("setle Eb");
+    IEMOP_MNEMONIC(setle_Eb, "setle Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4698 +4721 @@
 FNIEMOP_DEF(iemOp_setnle_Eb)
 {
-    IEMOP_MNEMONIC("setnle Eb");
+    IEMOP_MNEMONIC(setnle_Eb, "setnle Eb");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -4784 +4807 @@
 FNIEMOP_DEF(iemOp_push_fs)
 {
-    IEMOP_MNEMONIC("push fs");
+    IEMOP_MNEMONIC(push_fs, "push fs");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -4794 +4817 @@
 FNIEMOP_DEF(iemOp_pop_fs)
 {
-    IEMOP_MNEMONIC("pop fs");
+    IEMOP_MNEMONIC(pop_fs, "pop fs");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -4804 +4827 @@
 FNIEMOP_DEF(iemOp_cpuid)
 {
-    IEMOP_MNEMONIC("cpuid");
+    IEMOP_MNEMONIC(cpuid, "cpuid");
     IEMOP_HLP_MIN_486(); /* not all 486es. */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -5001 +5024 @@
 FNIEMOP_DEF(iemOp_bt_Ev_Gv)
 {
-    IEMOP_MNEMONIC("bt  Gv,Gv");
+    IEMOP_MNEMONIC(bt_Gv_Gv, "bt  Gv,Gv");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_bt);
@@ -5302 +5325 @@
 FNIEMOP_DEF(iemOp_shld_Ev_Gv_Ib)
 {
-    IEMOP_MNEMONIC("shld Ev,Gv,Ib");
+    IEMOP_MNEMONIC(shld_Ev_Gv_Ib, "shld Ev,Gv,Ib");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonShldShrd_Ib, &g_iemAImpl_shld);
@@ -5311 +5334 @@
 FNIEMOP_DEF(iemOp_shld_Ev_Gv_CL)
 {
-    IEMOP_MNEMONIC("shld Ev,Gv,CL");
+    IEMOP_MNEMONIC(shld_Ev_Gv_CL, "shld Ev,Gv,CL");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonShldShrd_CL, &g_iemAImpl_shld);
@@ -5320 +5343 @@
 FNIEMOP_DEF(iemOp_push_gs)
 {
-    IEMOP_MNEMONIC("push gs");
+    IEMOP_MNEMONIC(push_gs, "push gs");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -5330 +5353 @@
 FNIEMOP_DEF(iemOp_pop_gs)
 {
-    IEMOP_MNEMONIC("pop gs");
+    IEMOP_MNEMONIC(pop_gs, "pop gs");
     IEMOP_HLP_MIN_386();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -5345 +5368 @@
 FNIEMOP_DEF(iemOp_bts_Ev_Gv)
 {
-    IEMOP_MNEMONIC("bts Ev,Gv");
+    IEMOP_MNEMONIC(bts_Ev_Gv, "bts Ev,Gv");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_bts);
@@ -5354 +5377 @@
 FNIEMOP_DEF(iemOp_shrd_Ev_Gv_Ib)
 {
-    IEMOP_MNEMONIC("shrd Ev,Gv,Ib");
+    IEMOP_MNEMONIC(shrd_Ev_Gv_Ib, "shrd Ev,Gv,Ib");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonShldShrd_Ib, &g_iemAImpl_shrd);
@@ -5363 +5386 @@
 FNIEMOP_DEF(iemOp_shrd_Ev_Gv_CL)
 {
-    IEMOP_MNEMONIC("shrd Ev,Gv,CL");
+    IEMOP_MNEMONIC(shrd_Ev_Gv_CL, "shrd Ev,Gv,CL");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonShldShrd_CL, &g_iemAImpl_shrd);
@@ -5372 +5395 @@
 FNIEMOP_DEF_1(iemOp_Grp15_fxsave,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fxsave m512");
+    IEMOP_MNEMONIC(fxsave, "fxsave m512");
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fFxSaveRstor)
         return IEMOP_RAISE_INVALID_OPCODE();
@@ -5392 +5415 @@
 FNIEMOP_DEF_1(iemOp_Grp15_fxrstor,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fxrstor m512");
+    IEMOP_MNEMONIC(fxrstor, "fxrstor m512");
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fFxSaveRstor)
         return IEMOP_RAISE_INVALID_OPCODE();
@@ -5432 +5455 @@
 {
     RT_NOREF_PV(bRm);
-    IEMOP_MNEMONIC("lfence");
+    IEMOP_MNEMONIC(lfence, "lfence");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2)
@@ -5452 +5475 @@
 {
     RT_NOREF_PV(bRm);
-    IEMOP_MNEMONIC("mfence");
+    IEMOP_MNEMONIC(mfence, "mfence");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2)
@@ -5472 +5495 @@
 {
     RT_NOREF_PV(bRm);
-    IEMOP_MNEMONIC("sfence");
+    IEMOP_MNEMONIC(sfence, "sfence");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2)
@@ -5565 +5588 @@
 FNIEMOP_DEF(iemOp_imul_Gv_Ev)
 {
-    IEMOP_MNEMONIC("imul Gv,Ev");
+    IEMOP_MNEMONIC(imul_Gv_Ev, "imul Gv,Ev");
     IEMOP_HLP_MIN_386();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
@@ -5575 +5598 @@
 FNIEMOP_DEF(iemOp_cmpxchg_Eb_Gb)
 {
-    IEMOP_MNEMONIC("cmpxchg Eb,Gb");
+    IEMOP_MNEMONIC(cmpxchg_Eb_Gb, "cmpxchg Eb,Gb");
     IEMOP_HLP_MIN_486();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -5634 +5657 @@
 FNIEMOP_DEF(iemOp_cmpxchg_Ev_Gv)
 {
-    IEMOP_MNEMONIC("cmpxchg Ev,Gv");
+    IEMOP_MNEMONIC(cmpxchg_Ev_Gv, "cmpxchg Ev,Gv");
     IEMOP_HLP_MIN_486();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -5892 +5915 @@
 FNIEMOP_DEF(iemOp_lss_Gv_Mp)
 {
-    IEMOP_MNEMONIC("lss Gv,Mp");
+    IEMOP_MNEMONIC(lss_Gv_Mp, "lss Gv,Mp");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -5904 +5927 @@
 FNIEMOP_DEF(iemOp_btr_Ev_Gv)
 {
-    IEMOP_MNEMONIC("btr Ev,Gv");
+    IEMOP_MNEMONIC(btr_Ev_Gv, "btr Ev,Gv");
     return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_btr);
 }
@@ -5912 +5935 @@
 FNIEMOP_DEF(iemOp_lfs_Gv_Mp)
 {
-    IEMOP_MNEMONIC("lfs Gv,Mp");
+    IEMOP_MNEMONIC(lfs_Gv_Mp, "lfs Gv,Mp");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -5924 +5947 @@
 FNIEMOP_DEF(iemOp_lgs_Gv_Mp)
 {
-    IEMOP_MNEMONIC("lgs Gv,Mp");
+    IEMOP_MNEMONIC(lgs_Gv_Mp, "lgs Gv,Mp");
     IEMOP_HLP_MIN_386();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -5936 +5959 @@
 FNIEMOP_DEF(iemOp_movzx_Gv_Eb)
 {
-    IEMOP_MNEMONIC("movzx Gv,Eb");
+    IEMOP_MNEMONIC(movzx_Gv_Eb, "movzx Gv,Eb");
     IEMOP_HLP_MIN_386();
 
@@ -6031 +6054 @@
 FNIEMOP_DEF(iemOp_movzx_Gv_Ew)
 {
-    IEMOP_MNEMONIC("movzx Gv,Ew");
+    IEMOP_MNEMONIC(movzx_Gv_Ew, "movzx Gv,Ew");
     IEMOP_HLP_MIN_386();
 
@@ -6120 +6143 @@
         case 0: case 1: case 2: case 3:
             return IEMOP_RAISE_INVALID_OPCODE();
-        case 4: pImpl = &g_iemAImpl_bt;  IEMOP_MNEMONIC("bt  Ev,Ib"); break;
-        case 5: pImpl = &g_iemAImpl_bts; IEMOP_MNEMONIC("bts Ev,Ib"); break;
-        case 6: pImpl = &g_iemAImpl_btr; IEMOP_MNEMONIC("btr Ev,Ib"); break;
-        case 7: pImpl = &g_iemAImpl_btc; IEMOP_MNEMONIC("btc Ev,Ib"); break;
+        case 4: pImpl = &g_iemAImpl_bt;  IEMOP_MNEMONIC(bt_Ev_Ib,  "bt  Ev,Ib"); break;
+        case 5: pImpl = &g_iemAImpl_bts; IEMOP_MNEMONIC(bts_Ev_Ib, "bts Ev,Ib"); break;
+        case 6: pImpl = &g_iemAImpl_btr; IEMOP_MNEMONIC(btr_Ev_Ib, "btr Ev,Ib"); break;
+        case 7: pImpl = &g_iemAImpl_btc; IEMOP_MNEMONIC(btc_Ev_Ib, "btc Ev,Ib"); break;
         IEM_NOT_REACHED_DEFAULT_CASE_RET();
     }
@@ -6286 +6309 @@
 FNIEMOP_DEF(iemOp_btc_Ev_Gv)
 {
-    IEMOP_MNEMONIC("btc Ev,Gv");
+    IEMOP_MNEMONIC(btc_Ev_Gv, "btc Ev,Gv");
     IEMOP_HLP_MIN_386();
     return FNIEMOP_CALL_1(iemOpCommonBit_Ev_Gv, &g_iemAImpl_btc);
@@ -6295 +6318 @@
 FNIEMOP_DEF(iemOp_bsf_Gv_Ev)
 {
-    IEMOP_MNEMONIC("bsf Gv,Ev");
+    IEMOP_MNEMONIC(bsf_Gv_Ev, "bsf Gv,Ev");
     IEMOP_HLP_MIN_386();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
@@ -6305 +6328 @@
 FNIEMOP_DEF(iemOp_bsr_Gv_Ev)
 {
-    IEMOP_MNEMONIC("bsr Gv,Ev");
+    IEMOP_MNEMONIC(bsr_Gv_Ev, "bsr Gv,Ev");
     IEMOP_HLP_MIN_386();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF);
@@ -6315 +6338 @@
 FNIEMOP_DEF(iemOp_movsx_Gv_Eb)
 {
-    IEMOP_MNEMONIC("movsx Gv,Eb");
+    IEMOP_MNEMONIC(movsx_Gv_Eb, "movsx Gv,Eb");
     IEMOP_HLP_MIN_386();
 
@@ -6410 +6433 @@
 FNIEMOP_DEF(iemOp_movsx_Gv_Ew)
 {
-    IEMOP_MNEMONIC("movsx Gv,Ew");
+    IEMOP_MNEMONIC(movsx_Gv_Ew, "movsx Gv,Ew");
     IEMOP_HLP_MIN_386();
 
@@ -6482 +6505 @@
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_MIN_486();
-    IEMOP_MNEMONIC("xadd Eb,Gb");
+    IEMOP_MNEMONIC(xadd_Eb_Gb, "xadd Eb,Gb");
 
     /*
@@ -6540 +6563 @@
 FNIEMOP_DEF(iemOp_xadd_Ev_Gv)
 {
-    IEMOP_MNEMONIC("xadd Ev,Gv");
+    IEMOP_MNEMONIC(xadd_Ev_Gv, "xadd Ev,Gv");
     IEMOP_HLP_MIN_486();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -6697 +6720 @@
 FNIEMOP_DEF(iemOp_movnti_My_Gy)
 {
-    IEMOP_MNEMONIC("movnti My,Gy");
+    IEMOP_MNEMONIC(movnti_My_Gy, "movnti My,Gy");
 
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -6762 +6785 @@
 FNIEMOP_DEF_1(iemOp_Grp9_cmpxchg8b_Mq, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("cmpxchg8b Mq");
+    IEMOP_MNEMONIC(cmpxchg8b, "cmpxchg8b Mq");
 
     IEM_MC_BEGIN(4, 3);
@@ -6913 +6936 @@
 FNIEMOP_DEF(iemOp_bswap_rAX_r8)
 {
-    IEMOP_MNEMONIC("bswap rAX/r8");
+    IEMOP_MNEMONIC(bswap_rAX_r8, "bswap rAX/r8");
     /* Note! Intel manuals states that R8-R15 can be accessed by using a REX.X
              prefix.  REX.B is the correct prefix it appears.  For a parallel
@@ -6925 +6948 @@
 FNIEMOP_DEF(iemOp_bswap_rCX_r9)
 {
-    IEMOP_MNEMONIC("bswap rCX/r9");
+    IEMOP_MNEMONIC(bswap_rCX_r9, "bswap rCX/r9");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xCX | pVCpu->iem.s.uRexB);
@@ -6934 +6957 @@
 FNIEMOP_DEF(iemOp_bswap_rDX_r10)
 {
-    IEMOP_MNEMONIC("bswap rDX/r9");
+    IEMOP_MNEMONIC(bswap_rDX_r9, "bswap rDX/r9");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDX | pVCpu->iem.s.uRexB);
@@ -6943 +6966 @@
 FNIEMOP_DEF(iemOp_bswap_rBX_r11)
 {
-    IEMOP_MNEMONIC("bswap rBX/r9");
+    IEMOP_MNEMONIC(bswap_rBX_r9, "bswap rBX/r9");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBX | pVCpu->iem.s.uRexB);
@@ -6952 +6975 @@
 FNIEMOP_DEF(iemOp_bswap_rSP_r12)
 {
-    IEMOP_MNEMONIC("bswap rSP/r12");
+    IEMOP_MNEMONIC(bswap_rSP_r12, "bswap rSP/r12");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSP | pVCpu->iem.s.uRexB);
@@ -6961 +6984 @@
 FNIEMOP_DEF(iemOp_bswap_rBP_r13)
 {
-    IEMOP_MNEMONIC("bswap rBP/r13");
+    IEMOP_MNEMONIC(bswap_rBP_r13, "bswap rBP/r13");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBP | pVCpu->iem.s.uRexB);
@@ -6970 +6993 @@
 FNIEMOP_DEF(iemOp_bswap_rSI_r14)
 {
-    IEMOP_MNEMONIC("bswap rSI/r14");
+    IEMOP_MNEMONIC(bswap_rSI_r14, "bswap rSI/r14");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSI | pVCpu->iem.s.uRexB);
@@ -6979 +7002 @@
 FNIEMOP_DEF(iemOp_bswap_rDI_r15)
 {
-    IEMOP_MNEMONIC("bswap rDI/r15");
+    IEMOP_MNEMONIC(bswap_rDI_r15, "bswap rDI/r15");
     IEMOP_HLP_MIN_486();
     return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDI | pVCpu->iem.s.uRexB);
@@ -7018 +7041 @@
     {
         case IEM_OP_PRF_SIZE_OP: /* SSE */
-            IEMOP_MNEMONIC("pmovmskb Gd,Nq");
+            IEMOP_MNEMONIC(pmovmskb_Gd_Nq, "pmovmskb Gd,Nq");
             IEMOP_HLP_DECODED_NL_2(OP_PMOVMSKB, IEMOPFORM_RM_REG, OP_PARM_Gd, OP_PARM_Vdq, DISOPTYPE_SSE | DISOPTYPE_HARMLESS);
             IEM_MC_BEGIN(2, 0);
@@ -7033 +7056 @@
 
         case 0: /* MMX */
-            IEMOP_MNEMONIC("pmovmskb Gd,Udq");
+            IEMOP_MNEMONIC(pmovmskb_Gd_Udq, "pmovmskb Gd,Udq");
             IEMOP_HLP_DECODED_NL_2(OP_PMOVMSKB, IEMOPFORM_RM_REG, OP_PARM_Gd, OP_PARM_Vdq, DISOPTYPE_MMX | DISOPTYPE_HARMLESS);
             IEM_MC_BEGIN(2, 0);
@@ -7088 +7111 @@
 FNIEMOP_DEF(iemOp_movntq_Mq_Pq__movntdq_Mdq_Vdq)
 {
-    IEMOP_MNEMONIC(!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP) ? "movntq mr,r" : "movntdq mr,r");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
@@ -7100 +7122 @@
 
             case IEM_OP_PRF_SIZE_OP: /* SSE */
+                IEMOP_MNEMONIC(movntq_Mq_Pq, "movntq Mq,Pq");
                 IEM_MC_BEGIN(0, 2);
                 IEM_MC_LOCAL(uint128_t,                 uSrc);
@@ -7117 +7140 @@
 
             case 0: /* MMX */
+                IEMOP_MNEMONIC(movntdq_Mdq_Vdq, "movntdq Mdq,Vdq");
                 IEM_MC_BEGIN(0, 2);
                 IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -7163 +7187 @@
 FNIEMOP_DEF(iemOp_pxor_Pq_Qq__pxor_Vdq_Wdq)
 {
-    IEMOP_MNEMONIC("pxor");
+    IEMOP_MNEMONIC(pxor, "pxor");
     return FNIEMOP_CALL_1(iemOpCommonMmxSse2_FullFull_To_Full, &g_iemAImpl_pxor);
 }
@@ -7471 +7495 @@
 FNIEMOP_DEF(iemOp_add_Eb_Gb)
 {
-    IEMOP_MNEMONIC("add Eb,Gb");
+    IEMOP_MNEMONIC(add_Eb_Gb, "add Eb,Gb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_add);
 }
@@ -7479 +7503 @@
 FNIEMOP_DEF(iemOp_add_Ev_Gv)
 {
-    IEMOP_MNEMONIC("add Ev,Gv");
+    IEMOP_MNEMONIC(add_Ev_Gv, "add Ev,Gv");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_add);
 }
@@ -7487 +7511 @@
 FNIEMOP_DEF(iemOp_add_Gb_Eb)
 {
-    IEMOP_MNEMONIC("add Gb,Eb");
+    IEMOP_MNEMONIC(add_Gb_Eb, "add Gb,Eb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_add);
 }
@@ -7495 +7519 @@
 FNIEMOP_DEF(iemOp_add_Gv_Ev)
 {
-    IEMOP_MNEMONIC("add Gv,Ev");
+    IEMOP_MNEMONIC(add_Gv_Ev, "add Gv,Ev");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_add);
 }
@@ -7503 +7527 @@
 FNIEMOP_DEF(iemOp_add_Al_Ib)
 {
-    IEMOP_MNEMONIC("add al,Ib");
+    IEMOP_MNEMONIC(add_al_Ib, "add al,Ib");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_add);
 }
@@ -7511 +7535 @@
 FNIEMOP_DEF(iemOp_add_eAX_Iz)
 {
-    IEMOP_MNEMONIC("add rAX,Iz");
+    IEMOP_MNEMONIC(add_rAX_Iz, "add rAX,Iz");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_add);
 }
@@ -7519 +7543 @@
 FNIEMOP_DEF(iemOp_push_ES)
 {
-    IEMOP_MNEMONIC("push es");
+    IEMOP_MNEMONIC(push_es, "push es");
     return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_ES);
 }
@@ -7527 +7551 @@
 FNIEMOP_DEF(iemOp_pop_ES)
 {
-    IEMOP_MNEMONIC("pop es");
+    IEMOP_MNEMONIC(pop_es, "pop es");
     IEMOP_HLP_NO_64BIT();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7537 +7561 @@
 FNIEMOP_DEF(iemOp_or_Eb_Gb)
 {
-    IEMOP_MNEMONIC("or  Eb,Gb");
+    IEMOP_MNEMONIC(or_Eb_Gb, "or  Eb,Gb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_or);
@@ -7546 +7570 @@
 FNIEMOP_DEF(iemOp_or_Ev_Gv)
 {
-    IEMOP_MNEMONIC("or  Ev,Gv ");
+    IEMOP_MNEMONIC(or_Ev_Gv, "or  Ev,Gv");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_or);
@@ -7555 +7579 @@
 FNIEMOP_DEF(iemOp_or_Gb_Eb)
 {
-    IEMOP_MNEMONIC("or  Gb,Eb");
+    IEMOP_MNEMONIC(or_Gb_Eb, "or  Gb,Eb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_or);
@@ -7564 +7588 @@
 FNIEMOP_DEF(iemOp_or_Gv_Ev)
 {
-    IEMOP_MNEMONIC("or  Gv,Ev");
+    IEMOP_MNEMONIC(or_Gv_Ev, "or  Gv,Ev");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_or);
@@ -7573 +7597 @@
 FNIEMOP_DEF(iemOp_or_Al_Ib)
 {
-    IEMOP_MNEMONIC("or  al,Ib");
+    IEMOP_MNEMONIC(or_al_Ib, "or  al,Ib");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_or);
@@ -7582 +7606 @@
 FNIEMOP_DEF(iemOp_or_eAX_Iz)
 {
-    IEMOP_MNEMONIC("or  rAX,Iz");
+    IEMOP_MNEMONIC(or_rAX_Iz, "or  rAX,Iz");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_or);
@@ -7591 +7615 @@
 FNIEMOP_DEF(iemOp_push_CS)
 {
-    IEMOP_MNEMONIC("push cs");
+    IEMOP_MNEMONIC(push_cs, "push cs");
     return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_CS);
 }
@@ -7608 +7632 @@
 FNIEMOP_DEF(iemOp_adc_Eb_Gb)
 {
-    IEMOP_MNEMONIC("adc Eb,Gb");
+    IEMOP_MNEMONIC(adc_Eb_Gb, "adc Eb,Gb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_adc);
 }
@@ -7616 +7640 @@
 FNIEMOP_DEF(iemOp_adc_Ev_Gv)
 {
-    IEMOP_MNEMONIC("adc Ev,Gv");
+    IEMOP_MNEMONIC(adc_Ev_Gv, "adc Ev,Gv");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_adc);
 }
@@ -7624 +7648 @@
 FNIEMOP_DEF(iemOp_adc_Gb_Eb)
 {
-    IEMOP_MNEMONIC("adc Gb,Eb");
+    IEMOP_MNEMONIC(adc_Gb_Eb, "adc Gb,Eb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_adc);
 }
@@ -7632 +7656 @@
 FNIEMOP_DEF(iemOp_adc_Gv_Ev)
 {
-    IEMOP_MNEMONIC("adc Gv,Ev");
+    IEMOP_MNEMONIC(adc_Gv_Ev, "adc Gv,Ev");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_adc);
 }
@@ -7640 +7664 @@
 FNIEMOP_DEF(iemOp_adc_Al_Ib)
 {
-    IEMOP_MNEMONIC("adc al,Ib");
+    IEMOP_MNEMONIC(adc_al_Ib, "adc al,Ib");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_adc);
 }
@@ -7648 +7672 @@
 FNIEMOP_DEF(iemOp_adc_eAX_Iz)
 {
-    IEMOP_MNEMONIC("adc rAX,Iz");
+    IEMOP_MNEMONIC(adc_rAX_Iz, "adc rAX,Iz");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_adc);
 }
@@ -7656 +7680 @@
 FNIEMOP_DEF(iemOp_push_SS)
 {
-    IEMOP_MNEMONIC("push ss");
+    IEMOP_MNEMONIC(push_ss, "push ss");
     return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_SS);
 }
@@ -7664 +7688 @@
 FNIEMOP_DEF(iemOp_pop_SS)
 {
-    IEMOP_MNEMONIC("pop ss"); /** @todo implies instruction fusing? */
+    IEMOP_MNEMONIC(pop_ss, "pop ss"); /** @todo implies instruction fusing? */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEMOP_HLP_NO_64BIT();
@@ -7674 +7698 @@
 FNIEMOP_DEF(iemOp_sbb_Eb_Gb)
 {
-    IEMOP_MNEMONIC("sbb Eb,Gb");
+    IEMOP_MNEMONIC(sbb_Eb_Gb, "sbb Eb,Gb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_sbb);
 }
@@ -7682 +7706 @@
 FNIEMOP_DEF(iemOp_sbb_Ev_Gv)
 {
-    IEMOP_MNEMONIC("sbb Ev,Gv");
+    IEMOP_MNEMONIC(sbb_Ev_Gv, "sbb Ev,Gv");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_sbb);
 }
@@ -7690 +7714 @@
 FNIEMOP_DEF(iemOp_sbb_Gb_Eb)
 {
-    IEMOP_MNEMONIC("sbb Gb,Eb");
+    IEMOP_MNEMONIC(sbb_Gb_Eb, "sbb Gb,Eb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_sbb);
 }
@@ -7698 +7722 @@
 FNIEMOP_DEF(iemOp_sbb_Gv_Ev)
 {
-    IEMOP_MNEMONIC("sbb Gv,Ev");
+    IEMOP_MNEMONIC(sbb_Gv_Ev, "sbb Gv,Ev");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_sbb);
 }
@@ -7706 +7730 @@
 FNIEMOP_DEF(iemOp_sbb_Al_Ib)
 {
-    IEMOP_MNEMONIC("sbb al,Ib");
+    IEMOP_MNEMONIC(sbb_al_Ib, "sbb al,Ib");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_sbb);
 }
@@ -7714 +7738 @@
 FNIEMOP_DEF(iemOp_sbb_eAX_Iz)
 {
-    IEMOP_MNEMONIC("sbb rAX,Iz");
+    IEMOP_MNEMONIC(sbb_rAX_Iz, "sbb rAX,Iz");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_sbb);
 }
@@ -7722 +7746 @@
 FNIEMOP_DEF(iemOp_push_DS)
 {
-    IEMOP_MNEMONIC("push ds");
+    IEMOP_MNEMONIC(push_ds, "push ds");
     return FNIEMOP_CALL_1(iemOpCommonPushSReg, X86_SREG_DS);
 }
@@ -7730 +7754 @@
 FNIEMOP_DEF(iemOp_pop_DS)
 {
-    IEMOP_MNEMONIC("pop ds");
+    IEMOP_MNEMONIC(pop_ds, "pop ds");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEMOP_HLP_NO_64BIT();
@@ -7740 +7764 @@
 FNIEMOP_DEF(iemOp_and_Eb_Gb)
 {
-    IEMOP_MNEMONIC("and Eb,Gb");
+    IEMOP_MNEMONIC(and_Eb_Gb, "and Eb,Gb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_and);
@@ -7749 +7773 @@
 FNIEMOP_DEF(iemOp_and_Ev_Gv)
 {
-    IEMOP_MNEMONIC("and Ev,Gv");
+    IEMOP_MNEMONIC(and_Ev_Gv, "and Ev,Gv");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_and);
@@ -7758 +7782 @@
 FNIEMOP_DEF(iemOp_and_Gb_Eb)
 {
-    IEMOP_MNEMONIC("and Gb,Eb");
+    IEMOP_MNEMONIC(and_Gb_Eb, "and Gb,Eb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_and);
@@ -7767 +7791 @@
 FNIEMOP_DEF(iemOp_and_Gv_Ev)
 {
-    IEMOP_MNEMONIC("and Gv,Ev");
+    IEMOP_MNEMONIC(and_Gv_Ev, "and Gv,Ev");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_and);
@@ -7776 +7800 @@
 FNIEMOP_DEF(iemOp_and_Al_Ib)
 {
-    IEMOP_MNEMONIC("and al,Ib");
+    IEMOP_MNEMONIC(and_al_Ib, "and al,Ib");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_and);
@@ -7785 +7809 @@
 FNIEMOP_DEF(iemOp_and_eAX_Iz)
 {
-    IEMOP_MNEMONIC("and rAX,Iz");
+    IEMOP_MNEMONIC(and_rAX_Iz, "and rAX,Iz");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_and);
@@ -7806 +7830 @@
 FNIEMOP_DEF(iemOp_daa)
 {
-    IEMOP_MNEMONIC("daa AL");
+    IEMOP_MNEMONIC(daa_AL, "daa AL");
     IEMOP_HLP_NO_64BIT();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7817 +7841 @@
 FNIEMOP_DEF(iemOp_sub_Eb_Gb)
 {
-    IEMOP_MNEMONIC("sub Eb,Gb");
+    IEMOP_MNEMONIC(sub_Eb_Gb, "sub Eb,Gb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_sub);
 }
@@ -7825 +7849 @@
 FNIEMOP_DEF(iemOp_sub_Ev_Gv)
 {
-    IEMOP_MNEMONIC("sub Ev,Gv");
+    IEMOP_MNEMONIC(sub_Ev_Gv, "sub Ev,Gv");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_sub);
 }
@@ -7833 +7857 @@
 FNIEMOP_DEF(iemOp_sub_Gb_Eb)
 {
-    IEMOP_MNEMONIC("sub Gb,Eb");
+    IEMOP_MNEMONIC(sub_Gb_Eb, "sub Gb,Eb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_sub);
 }
@@ -7841 +7865 @@
 FNIEMOP_DEF(iemOp_sub_Gv_Ev)
 {
-    IEMOP_MNEMONIC("sub Gv,Ev");
+    IEMOP_MNEMONIC(sub_Gv_Ev, "sub Gv,Ev");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_sub);
 }
@@ -7849 +7873 @@
 FNIEMOP_DEF(iemOp_sub_Al_Ib)
 {
-    IEMOP_MNEMONIC("sub al,Ib");
+    IEMOP_MNEMONIC(sub_al_Ib, "sub al,Ib");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_sub);
 }
@@ -7857 +7881 @@
 FNIEMOP_DEF(iemOp_sub_eAX_Iz)
 {
-    IEMOP_MNEMONIC("sub rAX,Iz");
+    IEMOP_MNEMONIC(sub_rAX_Iz, "sub rAX,Iz");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_sub);
 }
@@ -7877 +7901 @@
 FNIEMOP_DEF(iemOp_das)
 {
-    IEMOP_MNEMONIC("das AL");
+    IEMOP_MNEMONIC(das_AL, "das AL");
     IEMOP_HLP_NO_64BIT();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7888 +7912 @@
 FNIEMOP_DEF(iemOp_xor_Eb_Gb)
 {
-    IEMOP_MNEMONIC("xor Eb,Gb");
+    IEMOP_MNEMONIC(xor_Eb_Gb, "xor Eb,Gb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_xor);
@@ -7897 +7921 @@
 FNIEMOP_DEF(iemOp_xor_Ev_Gv)
 {
-    IEMOP_MNEMONIC("xor Ev,Gv");
+    IEMOP_MNEMONIC(xor_Ev_Gv, "xor Ev,Gv");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_xor);
@@ -7906 +7930 @@
 FNIEMOP_DEF(iemOp_xor_Gb_Eb)
 {
-    IEMOP_MNEMONIC("xor Gb,Eb");
+    IEMOP_MNEMONIC(xor_Gb_Eb, "xor Gb,Eb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_xor);
@@ -7915 +7939 @@
 FNIEMOP_DEF(iemOp_xor_Gv_Ev)
 {
-    IEMOP_MNEMONIC("xor Gv,Ev");
+    IEMOP_MNEMONIC(xor_Gv_Ev, "xor Gv,Ev");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_xor);
@@ -7924 +7948 @@
 FNIEMOP_DEF(iemOp_xor_Al_Ib)
 {
-    IEMOP_MNEMONIC("xor al,Ib");
+    IEMOP_MNEMONIC(xor_al_Ib, "xor al,Ib");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_xor);
@@ -7933 +7957 @@
 FNIEMOP_DEF(iemOp_xor_eAX_Iz)
 {
-    IEMOP_MNEMONIC("xor rAX,Iz");
+    IEMOP_MNEMONIC(xor_rAX_Iz, "xor rAX,Iz");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_xor);
@@ -7958 +7982 @@
 FNIEMOP_DEF(iemOp_cmp_Eb_Gb)
 {
-    IEMOP_MNEMONIC("cmp Eb,Gb");
+    IEMOP_MNEMONIC(cmp_Eb_Gb, "cmp Eb,Gb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_cmp);
 }
@@ -7966 +7990 @@
 FNIEMOP_DEF(iemOp_cmp_Ev_Gv)
 {
-    IEMOP_MNEMONIC("cmp Ev,Gv");
+    IEMOP_MNEMONIC(cmp_Ev_Gv, "cmp Ev,Gv");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_cmp);
 }
@@ -7974 +7998 @@
 FNIEMOP_DEF(iemOp_cmp_Gb_Eb)
 {
-    IEMOP_MNEMONIC("cmp Gb,Eb");
+    IEMOP_MNEMONIC(cmp_Gb_Eb, "cmp Gb,Eb");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_r8_rm, &g_iemAImpl_cmp);
 }
@@ -7982 +8006 @@
 FNIEMOP_DEF(iemOp_cmp_Gv_Ev)
 {
-    IEMOP_MNEMONIC("cmp Gv,Ev");
+    IEMOP_MNEMONIC(cmp_Gv_Ev, "cmp Gv,Ev");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_cmp);
 }
@@ -7990 +8014 @@
 FNIEMOP_DEF(iemOp_cmp_Al_Ib)
 {
-    IEMOP_MNEMONIC("cmp al,Ib");
+    IEMOP_MNEMONIC(cmp_al_Ib, "cmp al,Ib");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_cmp);
 }
@@ -7998 +8022 @@
 FNIEMOP_DEF(iemOp_cmp_eAX_Iz)
 {
-    IEMOP_MNEMONIC("cmp rAX,Iz");
+    IEMOP_MNEMONIC(cmp_rAX_Iz, "cmp rAX,Iz");
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_cmp);
 }
@@ -8079 +8103 @@
     }
 
-    IEMOP_MNEMONIC("inc eAX");
+    IEMOP_MNEMONIC(inc_eAX, "inc eAX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xAX);
 }
@@ -8100 +8124 @@
     }
 
-    IEMOP_MNEMONIC("inc eCX");
+    IEMOP_MNEMONIC(inc_eCX, "inc eCX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xCX);
 }
@@ -8121 +8145 @@
     }
 
-    IEMOP_MNEMONIC("inc eDX");
+    IEMOP_MNEMONIC(inc_eDX, "inc eDX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xDX);
 }
@@ -8144 +8168 @@
     }
 
-    IEMOP_MNEMONIC("inc eBX");
+    IEMOP_MNEMONIC(inc_eBX, "inc eBX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xBX);
 }
@@ -8165 +8189 @@
     }
 
-    IEMOP_MNEMONIC("inc eSP");
+    IEMOP_MNEMONIC(inc_eSP, "inc eSP");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xSP);
 }
@@ -8187 +8211 @@
     }
 
-    IEMOP_MNEMONIC("inc eBP");
+    IEMOP_MNEMONIC(inc_eBP, "inc eBP");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xBP);
 }
@@ -8209 +8233 @@
     }
 
-    IEMOP_MNEMONIC("inc eSI");
+    IEMOP_MNEMONIC(inc_eSI, "inc eSI");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xSI);
 }
@@ -8232 +8256 @@
     }
 
-    IEMOP_MNEMONIC("inc eDI");
+    IEMOP_MNEMONIC(inc_eDI, "inc eDI");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xDI);
 }
@@ -8253 +8277 @@
     }
 
-    IEMOP_MNEMONIC("dec eAX");
+    IEMOP_MNEMONIC(dec_eAX, "dec eAX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xAX);
 }
@@ -8275 +8299 @@
     }
 
-    IEMOP_MNEMONIC("dec eCX");
+    IEMOP_MNEMONIC(dec_eCX, "dec eCX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xCX);
 }
@@ -8297 +8321 @@
     }
 
-    IEMOP_MNEMONIC("dec eDX");
+    IEMOP_MNEMONIC(dec_eDX, "dec eDX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xDX);
 }
@@ -8320 +8344 @@
     }
 
-    IEMOP_MNEMONIC("dec eBX");
+    IEMOP_MNEMONIC(dec_eBX, "dec eBX");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xBX);
 }
@@ -8342 +8366 @@
     }
 
-    IEMOP_MNEMONIC("dec eSP");
+    IEMOP_MNEMONIC(dec_eSP, "dec eSP");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xSP);
 }
@@ -8365 +8389 @@
     }
 
-    IEMOP_MNEMONIC("dec eBP");
+    IEMOP_MNEMONIC(dec_eBP, "dec eBP");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xBP);
 }
@@ -8388 +8412 @@
     }
 
-    IEMOP_MNEMONIC("dec eSI");
+    IEMOP_MNEMONIC(dec_eSI, "dec eSI");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xSI);
 }
@@ -8412 +8436 @@
     }
 
-    IEMOP_MNEMONIC("dec eDI");
+    IEMOP_MNEMONIC(dec_eDI, "dec eDI");
     return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_dec, X86_GREG_xDI);
 }
@@ -8467 +8491 @@
 FNIEMOP_DEF(iemOp_push_eAX)
 {
-    IEMOP_MNEMONIC("push rAX");
+    IEMOP_MNEMONIC(push_rAX, "push rAX");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xAX);
 }
@@ -8475 +8499 @@
 FNIEMOP_DEF(iemOp_push_eCX)
 {
-    IEMOP_MNEMONIC("push rCX");
+    IEMOP_MNEMONIC(push_rCX, "push rCX");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xCX);
 }
@@ -8483 +8507 @@
 FNIEMOP_DEF(iemOp_push_eDX)
 {
-    IEMOP_MNEMONIC("push rDX");
+    IEMOP_MNEMONIC(push_rDX, "push rDX");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xDX);
 }
@@ -8491 +8515 @@
 FNIEMOP_DEF(iemOp_push_eBX)
 {
-    IEMOP_MNEMONIC("push rBX");
+    IEMOP_MNEMONIC(push_rBX, "push rBX");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xBX);
 }
@@ -8499 +8523 @@
 FNIEMOP_DEF(iemOp_push_eSP)
 {
-    IEMOP_MNEMONIC("push rSP");
+    IEMOP_MNEMONIC(push_rSP, "push rSP");
     if (IEM_GET_TARGET_CPU(pVCpu) == IEMTARGETCPU_8086)
     {
@@ -8517 +8541 @@
 FNIEMOP_DEF(iemOp_push_eBP)
 {
-    IEMOP_MNEMONIC("push rBP");
+    IEMOP_MNEMONIC(push_rBP, "push rBP");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xBP);
 }
@@ -8525 +8549 @@
 FNIEMOP_DEF(iemOp_push_eSI)
 {
-    IEMOP_MNEMONIC("push rSI");
+    IEMOP_MNEMONIC(push_rSI, "push rSI");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xSI);
 }
@@ -8533 +8557 @@
 FNIEMOP_DEF(iemOp_push_eDI)
 {
-    IEMOP_MNEMONIC("push rDI");
+    IEMOP_MNEMONIC(push_rDI, "push rDI");
     return FNIEMOP_CALL_1(iemOpCommonPushGReg, X86_GREG_xDI);
 }
@@ -8589 +8613 @@
 FNIEMOP_DEF(iemOp_pop_eAX)
 {
-    IEMOP_MNEMONIC("pop rAX");
+    IEMOP_MNEMONIC(pop_rAX, "pop rAX");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xAX);
 }
@@ -8597 +8621 @@
 FNIEMOP_DEF(iemOp_pop_eCX)
 {
-    IEMOP_MNEMONIC("pop rCX");
+    IEMOP_MNEMONIC(pop_rCX, "pop rCX");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xCX);
 }
@@ -8605 +8629 @@
 FNIEMOP_DEF(iemOp_pop_eDX)
 {
-    IEMOP_MNEMONIC("pop rDX");
+    IEMOP_MNEMONIC(pop_rDX, "pop rDX");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xDX);
 }
@@ -8613 +8637 @@
 FNIEMOP_DEF(iemOp_pop_eBX)
 {
-    IEMOP_MNEMONIC("pop rBX");
+    IEMOP_MNEMONIC(pop_rBX, "pop rBX");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xBX);
 }
@@ -8621 +8645 @@
 FNIEMOP_DEF(iemOp_pop_eSP)
 {
-    IEMOP_MNEMONIC("pop rSP");
+    IEMOP_MNEMONIC(pop_rSP, "pop rSP");
     if (pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT)
     {
@@ -8670 +8694 @@
 FNIEMOP_DEF(iemOp_pop_eBP)
 {
-    IEMOP_MNEMONIC("pop rBP");
+    IEMOP_MNEMONIC(pop_rBP, "pop rBP");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xBP);
 }
@@ -8678 +8702 @@
 FNIEMOP_DEF(iemOp_pop_eSI)
 {
-    IEMOP_MNEMONIC("pop rSI");
+    IEMOP_MNEMONIC(pop_rSI, "pop rSI");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xSI);
 }
@@ -8686 +8710 @@
 FNIEMOP_DEF(iemOp_pop_eDI)
 {
-    IEMOP_MNEMONIC("pop rDI");
+    IEMOP_MNEMONIC(pop_rDI, "pop rDI");
     return FNIEMOP_CALL_1(iemOpCommonPopGReg, X86_GREG_xDI);
 }
@@ -8694 +8718 @@
 FNIEMOP_DEF(iemOp_pusha)
 {
-    IEMOP_MNEMONIC("pusha");
+    IEMOP_MNEMONIC(pusha, "pusha");
     IEMOP_HLP_MIN_186();
     IEMOP_HLP_NO_64BIT();
@@ -8707 +8731 @@
 FNIEMOP_DEF(iemOp_popa)
 {
-    IEMOP_MNEMONIC("popa");
+    IEMOP_MNEMONIC(popa, "popa");
     IEMOP_HLP_MIN_186();
     IEMOP_HLP_NO_64BIT();
@@ -8725 +8749 @@
 FNIEMOP_DEF(iemOp_arpl_Ew_Gw)
 {
-    IEMOP_MNEMONIC("arpl Ew,Gw");
+    IEMOP_MNEMONIC(arpl_Ew_Gw, "arpl Ew,Gw");
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_NO_REAL_OR_V86_MODE();
@@ -8781 +8805 @@
     Assert(pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT); /* Caller branched already . */
 
-    IEMOP_MNEMONIC("movsxd Gv,Ev");
+    IEMOP_MNEMONIC(movsxd_Gv_Ev, "movsxd Gv,Ev");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
 
@@ -8881 +8905 @@
 FNIEMOP_DEF(iemOp_push_Iz)
 {
-    IEMOP_MNEMONIC("push Iz");
+    IEMOP_MNEMONIC(push_Iz, "push Iz");
     IEMOP_HLP_MIN_186();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -8927 +8951 @@
 FNIEMOP_DEF(iemOp_imul_Gv_Ev_Iz)
 {
-    IEMOP_MNEMONIC("imul Gv,Ev,Iz"); /* Gv = Ev * Iz; */
+    IEMOP_MNEMONIC(imul_Gv_Ev_Iz, "imul Gv,Ev,Iz"); /* Gv = Ev * Iz; */
     IEMOP_HLP_MIN_186();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -9088 +9112 @@
 FNIEMOP_DEF(iemOp_push_Ib)
 {
-    IEMOP_MNEMONIC("push Ib");
+    IEMOP_MNEMONIC(push_Ib, "push Ib");
     IEMOP_HLP_MIN_186();
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
@@ -9116 +9140 @@
 FNIEMOP_DEF(iemOp_imul_Gv_Ev_Ib)
 {
-    IEMOP_MNEMONIC("imul Gv,Ev,Ib"); /* Gv = Ev * Iz; */
+    IEMOP_MNEMONIC(imul_Gv_Ev_Ib, "imul Gv,Ev,Ib"); /* Gv = Ev * Iz; */
     IEMOP_HLP_MIN_186();
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -9275 +9299 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep ins Yb,DX");
+        IEMOP_MNEMONIC(rep_insb_Yb_DX, "rep ins Yb,DX");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -9286 +9310 @@
     else
     {
-        IEMOP_MNEMONIC("ins Yb,DX");
+        IEMOP_MNEMONIC(ins_Yb_DX, "ins Yb,DX");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -9305 +9329 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
     {
-        IEMOP_MNEMONIC("rep ins Yv,DX");
+        IEMOP_MNEMONIC(rep_ins_Yv_DX, "rep ins Yv,DX");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -9332 +9356 @@
     else
     {
-        IEMOP_MNEMONIC("ins Yv,DX");
+        IEMOP_MNEMONIC(ins_Yv_DX, "ins Yv,DX");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -9367 +9391 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep outs DX,Yb");
+        IEMOP_MNEMONIC(rep_outsb_DX_Yb, "rep outs DX,Yb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -9378 +9402 @@
     else
     {
-        IEMOP_MNEMONIC("outs DX,Yb");
+        IEMOP_MNEMONIC(outs_DX_Yb, "outs DX,Yb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -9397 +9421 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPZ | IEM_OP_PRF_REPNZ))
     {
-        IEMOP_MNEMONIC("rep outs DX,Yv");
+        IEMOP_MNEMONIC(rep_outs_DX_Yv, "rep outs DX,Yv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -9424 +9448 @@
     else
     {
-        IEMOP_MNEMONIC("outs DX,Yv");
+        IEMOP_MNEMONIC(outs_DX_Yv, "outs DX,Yv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -9455 +9479 @@
 FNIEMOP_DEF(iemOp_jo_Jb)
 {
-    IEMOP_MNEMONIC("jo  Jb");
+    IEMOP_MNEMONIC(jo_Jb, "jo  Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9474 +9498 @@
 FNIEMOP_DEF(iemOp_jno_Jb)
 {
-    IEMOP_MNEMONIC("jno Jb");
+    IEMOP_MNEMONIC(jno_Jb, "jno Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9492 +9516 @@
 FNIEMOP_DEF(iemOp_jc_Jb)
 {
-    IEMOP_MNEMONIC("jc/jnae Jb");
+    IEMOP_MNEMONIC(jc_Jb, "jc/jnae Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9511 +9535 @@
 FNIEMOP_DEF(iemOp_jnc_Jb)
 {
-    IEMOP_MNEMONIC("jnc/jnb Jb");
+    IEMOP_MNEMONIC(jnc_Jb, "jnc/jnb Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9530 +9554 @@
 FNIEMOP_DEF(iemOp_je_Jb)
 {
-    IEMOP_MNEMONIC("je/jz   Jb");
+    IEMOP_MNEMONIC(je_Jb, "je/jz   Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9549 +9573 @@
 FNIEMOP_DEF(iemOp_jne_Jb)
 {
-    IEMOP_MNEMONIC("jne/jnz Jb");
+    IEMOP_MNEMONIC(jne_Jb, "jne/jnz Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9568 +9592 @@
 FNIEMOP_DEF(iemOp_jbe_Jb)
 {
-    IEMOP_MNEMONIC("jbe/jna Jb");
+    IEMOP_MNEMONIC(jbe_Jb, "jbe/jna Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9587 +9611 @@
 FNIEMOP_DEF(iemOp_jnbe_Jb)
 {
-    IEMOP_MNEMONIC("jnbe/ja Jb");
+    IEMOP_MNEMONIC(ja_Jb, "ja/jnbe Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9606 +9630 @@
 FNIEMOP_DEF(iemOp_js_Jb)
 {
-    IEMOP_MNEMONIC("js  Jb");
+    IEMOP_MNEMONIC(js_Jb, "js  Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9625 +9649 @@
 FNIEMOP_DEF(iemOp_jns_Jb)
 {
-    IEMOP_MNEMONIC("jns Jb");
+    IEMOP_MNEMONIC(jns_Jb, "jns Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9644 +9668 @@
 FNIEMOP_DEF(iemOp_jp_Jb)
 {
-    IEMOP_MNEMONIC("jp  Jb");
+    IEMOP_MNEMONIC(jp_Jb, "jp  Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9663 +9687 @@
 FNIEMOP_DEF(iemOp_jnp_Jb)
 {
-    IEMOP_MNEMONIC("jnp Jb");
+    IEMOP_MNEMONIC(jnp_Jb, "jnp Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9682 +9706 @@
 FNIEMOP_DEF(iemOp_jl_Jb)
 {
-    IEMOP_MNEMONIC("jl/jnge Jb");
+    IEMOP_MNEMONIC(jl_Jb, "jl/jnge Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9701 +9725 @@
 FNIEMOP_DEF(iemOp_jnl_Jb)
 {
-    IEMOP_MNEMONIC("jnl/jge Jb");
+    IEMOP_MNEMONIC(jge_Jb, "jnl/jge Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9720 +9744 @@
 FNIEMOP_DEF(iemOp_jle_Jb)
 {
-    IEMOP_MNEMONIC("jle/jng Jb");
+    IEMOP_MNEMONIC(jle_Jb, "jle/jng Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9739 +9763 @@
 FNIEMOP_DEF(iemOp_jnle_Jb)
 {
-    IEMOP_MNEMONIC("jnle/jg Jb");
+    IEMOP_MNEMONIC(jg_Jb, "jnle/jg Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9758 +9782 @@
 FNIEMOP_DEF(iemOp_Grp1_Eb_Ib_80)
 {
-    uint8_t bRm;   IEM_OPCODE_GET_NEXT_U8(&bRm);
-    IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Eb,Ib");
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
+    switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
+    {
+        case 0: IEMOP_MNEMONIC(add_Eb_Ib, "add Eb,Ib"); break;
+        case 1: IEMOP_MNEMONIC(or_Eb_Ib,  "or  Eb,Ib"); break;
+        case 2: IEMOP_MNEMONIC(adc_Eb_Ib, "adc Eb,Ib"); break;
+        case 3: IEMOP_MNEMONIC(sbb_Eb_Ib, "sbb Eb,Ib"); break;
+        case 4: IEMOP_MNEMONIC(and_Eb_Ib, "and Eb,Ib"); break;
+        case 5: IEMOP_MNEMONIC(sub_Eb_Ib, "sub Eb,Ib"); break;
+        case 6: IEMOP_MNEMONIC(xor_Eb_Ib, "xor Eb,Ib"); break;
+        case 7: IEMOP_MNEMONIC(cmp_Eb_Ib, "cmp Eb,Ib"); break;
+    }
     PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
 
@@ -9820 +9854 @@
 {
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
-    IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Iz");
+    switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
+    {
+        case 0: IEMOP_MNEMONIC(add_Ev_Iz, "add Ev,Iz"); break;
+        case 1: IEMOP_MNEMONIC(or_Ev_Iz,  "or  Ev,Iz"); break;
+        case 2: IEMOP_MNEMONIC(adc_Ev_Iz, "adc Ev,Iz"); break;
+        case 3: IEMOP_MNEMONIC(sbb_Ev_Iz, "sbb Ev,Iz"); break;
+        case 4: IEMOP_MNEMONIC(and_Ev_Iz, "and Ev,Iz"); break;
+        case 5: IEMOP_MNEMONIC(sub_Ev_Iz, "sub Ev,Iz"); break;
+        case 6: IEMOP_MNEMONIC(xor_Ev_Iz, "xor Ev,Iz"); break;
+        case 7: IEMOP_MNEMONIC(cmp_Ev_Iz, "cmp Ev,Iz"); break;
+    }
     PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
 
@@ -10007 +10051 @@
 {
     uint8_t bRm;   IEM_OPCODE_GET_NEXT_U8(&bRm);
-    IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Ib");
+    switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
+    {
+        case 0: IEMOP_MNEMONIC(add_Ev_Ib, "add Ev,Ib"); break;
+        case 1: IEMOP_MNEMONIC(or_Ev_Ib,  "or  Ev,Ib"); break;
+        case 2: IEMOP_MNEMONIC(adc_Ev_Ib, "adc Ev,Ib"); break;
+        case 3: IEMOP_MNEMONIC(sbb_Ev_Ib, "sbb Ev,Ib"); break;
+        case 4: IEMOP_MNEMONIC(and_Ev_Ib, "and Ev,Ib"); break;
+        case 5: IEMOP_MNEMONIC(sub_Ev_Ib, "sub Ev,Ib"); break;
+        case 6: IEMOP_MNEMONIC(xor_Ev_Ib, "xor Ev,Ib"); break;
+        case 7: IEMOP_MNEMONIC(cmp_Ev_Ib, "cmp Ev,Ib"); break;
+    }
     /* Note! Seems the OR, AND, and XOR instructions are present on CPUs prior
              to the 386 even if absent in the intel reference manuals and some
@@ -10180 +10234 @@
 FNIEMOP_DEF(iemOp_test_Eb_Gb)
 {
-    IEMOP_MNEMONIC("test Eb,Gb");
+    IEMOP_MNEMONIC(test_Eb_Gb, "test Eb,Gb");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_r8, &g_iemAImpl_test);
@@ -10189 +10243 @@
 FNIEMOP_DEF(iemOp_test_Ev_Gv)
 {
-    IEMOP_MNEMONIC("test Ev,Gv");
+    IEMOP_MNEMONIC(test_Ev_Gv, "test Ev,Gv");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rm_rv, &g_iemAImpl_test);
@@ -10199 +10253 @@
 {
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
-    IEMOP_MNEMONIC("xchg Eb,Gb");
+    IEMOP_MNEMONIC(xchg_Eb_Gb, "xchg Eb,Gb");
 
     /*
@@ -10247 +10301 @@
 FNIEMOP_DEF(iemOp_xchg_Ev_Gv)
 {
-    IEMOP_MNEMONIC("xchg Ev,Gv");
+    IEMOP_MNEMONIC(xchg_Ev_Gv, "xchg Ev,Gv");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
 
@@ -10370 +10424 @@
 FNIEMOP_DEF(iemOp_mov_Eb_Gb)
 {
-    IEMOP_MNEMONIC("mov Eb,Gb");
+    IEMOP_MNEMONIC(mov_Eb_Gb, "mov Eb,Gb");
 
     uint8_t bRm;
@@ -10411 +10465 @@
 FNIEMOP_DEF(iemOp_mov_Ev_Gv)
 {
-    IEMOP_MNEMONIC("mov Ev,Gv");
+    IEMOP_MNEMONIC(mov_Ev_Gv, "mov Ev,Gv");
 
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -10502 +10556 @@
 FNIEMOP_DEF(iemOp_mov_Gb_Eb)
 {
-    IEMOP_MNEMONIC("mov Gb,Eb");
+    IEMOP_MNEMONIC(mov_Gb_Eb, "mov Gb,Eb");
 
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -10541 +10595 @@
 FNIEMOP_DEF(iemOp_mov_Gv_Ev)
 {
-    IEMOP_MNEMONIC("mov Gv,Ev");
+    IEMOP_MNEMONIC(mov_Gv_Ev, "mov Gv,Ev");
 
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -10643 +10697 @@
 FNIEMOP_DEF(iemOp_mov_Ev_Sw)
 {
-    IEMOP_MNEMONIC("mov Ev,Sw");
+    IEMOP_MNEMONIC(mov_Ev_Sw, "mov Ev,Sw");
 
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -10720 +10774 @@
 FNIEMOP_DEF(iemOp_lea_Gv_M)
 {
-    IEMOP_MNEMONIC("lea Gv,M");
+    IEMOP_MNEMONIC(lea_Gv_M, "lea Gv,M");
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -10768 +10822 @@
 FNIEMOP_DEF(iemOp_mov_Sw_Ev)
 {
-    IEMOP_MNEMONIC("mov Sw,Ev");
+    IEMOP_MNEMONIC(mov_Sw_Ev, "mov Sw,Ev");
 
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
@@ -10834 +10888 @@
     /** @todo What's the deal with the 'reg' field and pop Ev?  Ignorning it for
      *        now until tests show it's checked.. */
-    IEMOP_MNEMONIC("pop Ev");
+    IEMOP_MNEMONIC(pop_Ev, "pop Ev");
 
     /* Register access is relatively easy and can share code. */
@@ -10926 +10980 @@
     /* AMD has defined /1 thru /7 as XOP prefix (similar to three byte VEX). */
     /** @todo XOP decoding. */
-    IEMOP_MNEMONIC("3-byte-xop");
+    IEMOP_MNEMONIC(xop_amd, "3-byte-xop");
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -10988 +11042 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REX_B)
     {
-        IEMOP_MNEMONIC("xchg r8,rAX");
+        IEMOP_MNEMONIC(xchg_r8_rAX, "xchg r8,rAX");
         return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xAX);
     }
 
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)
-        IEMOP_MNEMONIC("pause");
+        IEMOP_MNEMONIC(pause, "pause");
     else
-        IEMOP_MNEMONIC("nop");
+        IEMOP_MNEMONIC(nop, "nop");
     IEM_MC_BEGIN(0, 0);
     IEM_MC_ADVANCE_RIP();
@@ -11006 +11060 @@
 FNIEMOP_DEF(iemOp_xchg_eCX_eAX)
 {
-    IEMOP_MNEMONIC("xchg rCX,rAX");
+    IEMOP_MNEMONIC(xchg_rCX_rAX, "xchg rCX,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xCX);
 }
@@ -11014 +11068 @@
 FNIEMOP_DEF(iemOp_xchg_eDX_eAX)
 {
-    IEMOP_MNEMONIC("xchg rDX,rAX");
+    IEMOP_MNEMONIC(xchg_rDX_rAX, "xchg rDX,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xDX);
 }
@@ -11022 +11076 @@
 FNIEMOP_DEF(iemOp_xchg_eBX_eAX)
 {
-    IEMOP_MNEMONIC("xchg rBX,rAX");
+    IEMOP_MNEMONIC(xchg_rBX_rAX, "xchg rBX,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xBX);
 }
@@ -11030 +11084 @@
 FNIEMOP_DEF(iemOp_xchg_eSP_eAX)
 {
-    IEMOP_MNEMONIC("xchg rSX,rAX");
+    IEMOP_MNEMONIC(xchg_rSX_rAX, "xchg rSX,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xSP);
 }
@@ -11038 +11092 @@
 FNIEMOP_DEF(iemOp_xchg_eBP_eAX)
 {
-    IEMOP_MNEMONIC("xchg rBP,rAX");
+    IEMOP_MNEMONIC(xchg_rBP_rAX, "xchg rBP,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xBP);
 }
@@ -11046 +11100 @@
 FNIEMOP_DEF(iemOp_xchg_eSI_eAX)
 {
-    IEMOP_MNEMONIC("xchg rSI,rAX");
+    IEMOP_MNEMONIC(xchg_rSI_rAX, "xchg rSI,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xSI);
 }
@@ -11054 +11108 @@
 FNIEMOP_DEF(iemOp_xchg_eDI_eAX)
 {
-    IEMOP_MNEMONIC("xchg rDI,rAX");
+    IEMOP_MNEMONIC(xchg_rDI_rAX, "xchg rDI,rAX");
     return FNIEMOP_CALL_1(iemOpCommonXchgGRegRax, X86_GREG_xDI);
 }
@@ -11066 +11120 @@
     {
         case IEMMODE_16BIT:
-            IEMOP_MNEMONIC("cbw");
+            IEMOP_MNEMONIC(cbw, "cbw");
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 7) {
@@ -11078 +11132 @@
 
         case IEMMODE_32BIT:
-            IEMOP_MNEMONIC("cwde");
+            IEMOP_MNEMONIC(cwde, "cwde");
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 15) {
@@ -11090 +11144 @@
 
         case IEMMODE_64BIT:
-            IEMOP_MNEMONIC("cdqe");
+            IEMOP_MNEMONIC(cdqe, "cdqe");
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 31) {
@@ -11113 +11167 @@
     {
         case IEMMODE_16BIT:
-            IEMOP_MNEMONIC("cwd");
+            IEMOP_MNEMONIC(cwd, "cwd");
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 15) {
@@ -11125 +11179 @@
 
         case IEMMODE_32BIT:
-            IEMOP_MNEMONIC("cdq");
+            IEMOP_MNEMONIC(cdq, "cdq");
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 31) {
@@ -11137 +11191 @@
 
         case IEMMODE_64BIT:
-            IEMOP_MNEMONIC("cqo");
+            IEMOP_MNEMONIC(cqo, "cqo");
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 63) {
@@ -11156 +11210 @@
 FNIEMOP_DEF(iemOp_call_Ap)
 {
-    IEMOP_MNEMONIC("call Ap");
+    IEMOP_MNEMONIC(call_Ap, "call Ap");
     IEMOP_HLP_NO_64BIT();
 
@@ -11174 +11228 @@
 FNIEMOP_DEF(iemOp_wait)
 {
-    IEMOP_MNEMONIC("wait");
+    IEMOP_MNEMONIC(wait, "wait");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -11207 +11261 @@
 FNIEMOP_DEF(iemOp_sahf)
 {
-    IEMOP_MNEMONIC("sahf");
+    IEMOP_MNEMONIC(sahf, "sahf");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     if (   pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT
@@ -11231 +11285 @@
 FNIEMOP_DEF(iemOp_lahf)
 {
-    IEMOP_MNEMONIC("lahf");
+    IEMOP_MNEMONIC(lahf, "lahf");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     if (   pVCpu->iem.s.enmCpuMode == IEMMODE_64BIT
@@ -11299 +11353 @@
      * Get the offset and fend of lock prefixes.
      */
-    IEMOP_MNEMONIC("mov rAX,Ov");
+    IEMOP_MNEMONIC(mov_rAX_Ov, "mov rAX,Ov");
     RTGCPTR GCPtrMemOff;
     IEMOP_FETCH_MOFFS_XX(GCPtrMemOff);
@@ -11436 +11490 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep movsb Xb,Yb");
+        IEMOP_MNEMONIC(rep_movsb_Xb_Yb, "rep movsb Xb,Yb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -11445 +11499 @@
         }
     }
-    IEMOP_MNEMONIC("movsb Xb,Yb");
+    IEMOP_MNEMONIC(movsb_Xb_Yb, "movsb Xb,Yb");
 
     /*
@@ -11471 +11525 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep movs Xv,Yv");
+        IEMOP_MNEMONIC(rep_movs_Xv_Yv, "rep movs Xv,Yv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -11502 +11556 @@
         }
     }
-    IEMOP_MNEMONIC("movs Xv,Yv");
+    IEMOP_MNEMONIC(movs_Xv_Yv, "movs Xv,Yv");
 
     /*
@@ -11583 +11637 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPZ)
     {
-        IEMOP_MNEMONIC("repe cmps Xb,Yb");
+        IEMOP_MNEMONIC(repz_cmps_Xb_Yb, "repz cmps Xb,Yb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -11594 +11648 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPNZ)
     {
-        IEMOP_MNEMONIC("repe cmps Xb,Yb");
+        IEMOP_MNEMONIC(repnz_cmps_Xb_Yb, "repnz cmps Xb,Yb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -11603 +11657 @@
         }
     }
-    IEMOP_MNEMONIC("cmps Xb,Yb");
+    IEMOP_MNEMONIC(cmps_Xb_Yb, "cmps Xb,Yb");
 
     /*
@@ -11630 +11684 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPZ)
     {
-        IEMOP_MNEMONIC("repe cmps Xv,Yv");
+        IEMOP_MNEMONIC(repe_cmps_Xv_Yv, "repe cmps Xv,Yv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -11664 +11718 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPNZ)
     {
-        IEMOP_MNEMONIC("repne cmps Xv,Yv");
+        IEMOP_MNEMONIC(repne_cmps_Xv_Yv, "repne cmps Xv,Yv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -11696 +11750 @@
     }
 
-    IEMOP_MNEMONIC("cmps Xv,Yv");
+    IEMOP_MNEMONIC(cmps_Xv_Yv, "cmps Xv,Yv");
 
     /*
@@ -11744 +11798 @@
 FNIEMOP_DEF(iemOp_test_AL_Ib)
 {
-    IEMOP_MNEMONIC("test al,Ib");
+    IEMOP_MNEMONIC(test_al_Ib, "test al,Ib");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_AL_Ib, &g_iemAImpl_test);
@@ -11753 +11807 @@
 FNIEMOP_DEF(iemOp_test_eAX_Iz)
 {
-    IEMOP_MNEMONIC("test rAX,Iz");
+    IEMOP_MNEMONIC(test_rAX_Iz, "test rAX,Iz");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
     return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rAX_Iz, &g_iemAImpl_test);
@@ -11785 +11839 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep stos Yb,al");
+        IEMOP_MNEMONIC(rep_stos_Yb_al, "rep stos Yb,al");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -11794 +11848 @@
         }
     }
-    IEMOP_MNEMONIC("stos Yb,al");
+    IEMOP_MNEMONIC(stos_Yb_al, "stos Yb,al");
 
     /*
@@ -11820 +11874 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep stos Yv,rAX");
+        IEMOP_MNEMONIC(rep_stos_Yv_rAX, "rep stos Yv,rAX");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -11851 +11905 @@
         }
     }
-    IEMOP_MNEMONIC("stos Yv,rAX");
+    IEMOP_MNEMONIC(stos_Yv_rAX, "stos Yv,rAX");
 
     /*
@@ -11921 +11975 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep lodsb al,Xb");
+        IEMOP_MNEMONIC(rep_lodsb_AL_Xb, "rep lodsb AL,Xb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -11930 +11984 @@
         }
     }
-    IEMOP_MNEMONIC("lodsb al,Xb");
+    IEMOP_MNEMONIC(lodsb_AL_Xb, "lodsb AL,Xb");
 
     /*
@@ -11956 +12010 @@
     if (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REPNZ | IEM_OP_PRF_REPZ))
     {
-        IEMOP_MNEMONIC("rep lods rAX,Xv");
+        IEMOP_MNEMONIC(rep_lods_rAX_Xv, "rep lods rAX,Xv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -11987 +12041 @@
         }
     }
-    IEMOP_MNEMONIC("lods rAX,Xv");
+    IEMOP_MNEMONIC(lods_rAX_Xv, "lods rAX,Xv");
 
     /*
@@ -12063 +12117 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPZ)
     {
-        IEMOP_MNEMONIC("repe scasb al,Xb");
+        IEMOP_MNEMONIC(repe_scasb_AL_Xb, "repe scasb AL,Xb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -12074 +12128 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPNZ)
     {
-        IEMOP_MNEMONIC("repne scasb al,Xb");
+        IEMOP_MNEMONIC(repone_scasb_AL_Xb, "repne scasb AL,Xb");
         switch (pVCpu->iem.s.enmEffAddrMode)
         {
@@ -12083 +12137 @@
         }
     }
-    IEMOP_MNEMONIC("scasb al,Xb");
+    IEMOP_MNEMONIC(scasb_AL_Xb, "scasb AL,Xb");
 
     /*
@@ -12109 +12163 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPZ)
     {
-        IEMOP_MNEMONIC("repe scas rAX,Xv");
+        IEMOP_MNEMONIC(repe_scas_rAX_Xv, "repe scas rAX,Xv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -12142 +12196 @@
     if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REPNZ)
     {
-        IEMOP_MNEMONIC("repne scas rAX,Xv");
+        IEMOP_MNEMONIC(repne_scas_rAX_Xv, "repne scas rAX,Xv");
         switch (pVCpu->iem.s.enmEffOpSize)
         {
@@ -12173 +12227 @@
         }
     }
-    IEMOP_MNEMONIC("scas rAX,Xv");
+    IEMOP_MNEMONIC(scas_rAX_Xv, "scas rAX,Xv");
 
     /*
@@ -12238 +12292 @@
 FNIEMOP_DEF(iemOp_mov_AL_Ib)
 {
-    IEMOP_MNEMONIC("mov AL,Ib");
+    IEMOP_MNEMONIC(mov_AL_Ib, "mov AL,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xAX | pVCpu->iem.s.uRexB);
 }
@@ -12246 +12300 @@
 FNIEMOP_DEF(iemOp_CL_Ib)
 {
-    IEMOP_MNEMONIC("mov CL,Ib");
+    IEMOP_MNEMONIC(mov_CL_Ib, "mov CL,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xCX | pVCpu->iem.s.uRexB);
 }
@@ -12254 +12308 @@
 FNIEMOP_DEF(iemOp_DL_Ib)
 {
-    IEMOP_MNEMONIC("mov DL,Ib");
+    IEMOP_MNEMONIC(mov_DL_Ib, "mov DL,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xDX | pVCpu->iem.s.uRexB);
 }
@@ -12262 +12316 @@
 FNIEMOP_DEF(iemOp_BL_Ib)
 {
-    IEMOP_MNEMONIC("mov BL,Ib");
+    IEMOP_MNEMONIC(mov_BL_Ib, "mov BL,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xBX | pVCpu->iem.s.uRexB);
 }
@@ -12270 +12324 @@
 FNIEMOP_DEF(iemOp_mov_AH_Ib)
 {
-    IEMOP_MNEMONIC("mov AH,Ib");
+    IEMOP_MNEMONIC(mov_AH_Ib, "mov AH,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xSP | pVCpu->iem.s.uRexB);
 }
@@ -12278 +12332 @@
 FNIEMOP_DEF(iemOp_CH_Ib)
 {
-    IEMOP_MNEMONIC("mov CH,Ib");
+    IEMOP_MNEMONIC(mov_CH_Ib, "mov CH,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xBP | pVCpu->iem.s.uRexB);
 }
@@ -12286 +12340 @@
 FNIEMOP_DEF(iemOp_DH_Ib)
 {
-    IEMOP_MNEMONIC("mov DH,Ib");
+    IEMOP_MNEMONIC(mov_DH_Ib, "mov DH,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xSI | pVCpu->iem.s.uRexB);
 }
@@ -12294 +12348 @@
 FNIEMOP_DEF(iemOp_BH_Ib)
 {
-    IEMOP_MNEMONIC("mov BH,Ib");
+    IEMOP_MNEMONIC(mov_BH_Ib, "mov BH,Ib");
     return FNIEMOP_CALL_1(iemOpCommonMov_r8_Ib, X86_GREG_xDI | pVCpu->iem.s.uRexB);
 }
@@ -12352 +12406 @@
 FNIEMOP_DEF(iemOp_eAX_Iv)
 {
-    IEMOP_MNEMONIC("mov rAX,IV");
+    IEMOP_MNEMONIC(mov_rAX_IV, "mov rAX,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xAX | pVCpu->iem.s.uRexB);
 }
@@ -12360 +12414 @@
 FNIEMOP_DEF(iemOp_eCX_Iv)
 {
-    IEMOP_MNEMONIC("mov rCX,IV");
+    IEMOP_MNEMONIC(mov_rCX_IV, "mov rCX,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xCX | pVCpu->iem.s.uRexB);
 }
@@ -12368 +12422 @@
 FNIEMOP_DEF(iemOp_eDX_Iv)
 {
-    IEMOP_MNEMONIC("mov rDX,IV");
+    IEMOP_MNEMONIC(mov_rDX_IV, "mov rDX,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xDX | pVCpu->iem.s.uRexB);
 }
@@ -12376 +12430 @@
 FNIEMOP_DEF(iemOp_eBX_Iv)
 {
-    IEMOP_MNEMONIC("mov rBX,IV");
+    IEMOP_MNEMONIC(mov_rBX_IV, "mov rBX,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xBX | pVCpu->iem.s.uRexB);
 }
@@ -12384 +12438 @@
 FNIEMOP_DEF(iemOp_eSP_Iv)
 {
-    IEMOP_MNEMONIC("mov rSP,IV");
+    IEMOP_MNEMONIC(mov_rSP_IV, "mov rSP,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xSP | pVCpu->iem.s.uRexB);
 }
@@ -12392 +12446 @@
 FNIEMOP_DEF(iemOp_eBP_Iv)
 {
-    IEMOP_MNEMONIC("mov rBP,IV");
+    IEMOP_MNEMONIC(mov_rBP_IV, "mov rBP,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xBP | pVCpu->iem.s.uRexB);
 }
@@ -12400 +12454 @@
 FNIEMOP_DEF(iemOp_eSI_Iv)
 {
-    IEMOP_MNEMONIC("mov rSI,IV");
+    IEMOP_MNEMONIC(mov_rSI_IV, "mov rSI,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xSI | pVCpu->iem.s.uRexB);
 }
@@ -12408 +12462 @@
 FNIEMOP_DEF(iemOp_eDI_Iv)
 {
-    IEMOP_MNEMONIC("mov rDI,IV");
+    IEMOP_MNEMONIC(mov_rDI_IV, "mov rDI,IV");
     return FNIEMOP_CALL_1(iemOpCommonMov_Rv_Iv, X86_GREG_xDI | pVCpu->iem.s.uRexB);
 }
@@ -12421 +12475 @@
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
-        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,Ib"); break;
-        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,Ib"); break;
-        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,Ib"); break;
-        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,Ib"); break;
-        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,Ib"); break;
-        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,Ib"); break;
-        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,Ib"); break;
+        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC(rol_Eb_Ib, "rol Eb,Ib"); break;
+        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC(ror_Eb_Ib, "ror Eb,Ib"); break;
+        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC(rcl_Eb_Ib, "rcl Eb,Ib"); break;
+        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC(rcr_Eb_Ib, "rcr Eb,Ib"); break;
+        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC(shl_Eb_Ib, "shl Eb,Ib"); break;
+        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC(shr_Eb_Ib, "shr Eb,Ib"); break;
+        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC(sar_Eb_Ib, "sar Eb,Ib"); break;
         case 6: return IEMOP_RAISE_INVALID_OPCODE();
         IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
@@ -12482 +12536 @@
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
-        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,Ib"); break;
-        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,Ib"); break;
-        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,Ib"); break;
-        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,Ib"); break;
-        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,Ib"); break;
-        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,Ib"); break;
-        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,Ib"); break;
+        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC(rol_Ev_Ib, "rol Ev,Ib"); break;
+        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC(ror_Ev_Ib, "ror Ev,Ib"); break;
+        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC(rcl_Ev_Ib, "rcl Ev,Ib"); break;
+        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC(rcr_Ev_Ib, "rcr Ev,Ib"); break;
+        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC(shl_Ev_Ib, "shl Ev,Ib"); break;
+        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC(shr_Ev_Ib, "shr Ev,Ib"); break;
+        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC(sar_Ev_Ib, "sar Ev,Ib"); break;
         case 6: return IEMOP_RAISE_INVALID_OPCODE();
         IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
@@ -12618 +12672 @@
 FNIEMOP_DEF(iemOp_retn_Iw)
 {
-    IEMOP_MNEMONIC("retn Iw");
+    IEMOP_MNEMONIC(retn_Iw, "retn Iw");
     uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -12629 +12683 @@
 FNIEMOP_DEF(iemOp_retn)
 {
-    IEMOP_MNEMONIC("retn");
+    IEMOP_MNEMONIC(retn, "retn");
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -12643 +12697 @@
         || (bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     {
-        IEMOP_MNEMONIC("2-byte-vex");
+        IEMOP_MNEMONIC(vex2_prefix, "2-byte-vex");
         /* The LES instruction is invalid 64-bit mode. In legacy and
            compatability mode it is invalid with MOD=3.
@@ -12653 +12707 @@
         return IEMOP_RAISE_INVALID_OPCODE();
     }
-    IEMOP_MNEMONIC("les Gv,Mp");
+    IEMOP_MNEMONIC(les_Gv_Mp, "les Gv,Mp");
     return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_ES, bRm);
 }
@@ -12671 +12725 @@
         if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
         {
-            IEMOP_MNEMONIC("lds Gv,Mp");
+            IEMOP_MNEMONIC(lds_Gv_Mp, "lds Gv,Mp");
             return FNIEMOP_CALL_2(iemOpCommonLoadSRegAndGreg, X86_SREG_DS, bRm);
         }
@@ -12677 +12731 @@
     }
 
-    IEMOP_MNEMONIC("3-byte-vex");
+    IEMOP_MNEMONIC(vex3_prefix, "3-byte-vex");
     /** @todo Test when exctly the VEX conformance checks kick in during
      * instruction decoding and fetching (using \#PF). */
@@ -12703 +12757 @@
     if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
         return IEMOP_RAISE_INVALID_OPCODE();
-    IEMOP_MNEMONIC("mov Eb,Ib");
+    IEMOP_MNEMONIC(mov_Eb_Ib, "mov Eb,Ib");
 
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -12737 +12791 @@
     if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
         return IEMOP_RAISE_INVALID_OPCODE();
-    IEMOP_MNEMONIC("mov Ev,Iz");
+    IEMOP_MNEMONIC(mov_Ev_Iz, "mov Ev,Iz");
 
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -12823 +12877 @@
 FNIEMOP_DEF(iemOp_enter_Iw_Ib)
 {
-    IEMOP_MNEMONIC("enter Iw,Ib");
+    IEMOP_MNEMONIC(enter_Iw_Ib, "enter Iw,Ib");
     IEMOP_HLP_MIN_186();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -12836 +12890 @@
 FNIEMOP_DEF(iemOp_leave)
 {
-    IEMOP_MNEMONIC("retn");
+    IEMOP_MNEMONIC(leave, "leave");
     IEMOP_HLP_MIN_186();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -12847 +12901 @@
 FNIEMOP_DEF(iemOp_retf_Iw)
 {
-    IEMOP_MNEMONIC("retf Iw");
+    IEMOP_MNEMONIC(retf_Iw, "retf Iw");
     uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -12858 +12912 @@
 FNIEMOP_DEF(iemOp_retf)
 {
-    IEMOP_MNEMONIC("retf");
+    IEMOP_MNEMONIC(retf, "retf");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -12885 +12939 @@
 FNIEMOP_DEF(iemOp_into)
 {
-    IEMOP_MNEMONIC("into");
+    IEMOP_MNEMONIC(into, "into");
     IEMOP_HLP_NO_64BIT();
 
@@ -12900 +12954 @@
 FNIEMOP_DEF(iemOp_iret)
 {
-    IEMOP_MNEMONIC("iret");
+    IEMOP_MNEMONIC(iret, "iret");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_iret, pVCpu->iem.s.enmEffOpSize);
@@ -12913 +12967 @@
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
-        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,1"); break;
-        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,1"); break;
-        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,1"); break;
-        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,1"); break;
-        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,1"); break;
-        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,1"); break;
-        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,1"); break;
+        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC(rol_Eb_1, "rol Eb,1"); break;
+        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC(ror_Eb_1, "ror Eb,1"); break;
+        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC(rcl_Eb_1, "rcl Eb,1"); break;
+        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC(rcr_Eb_1, "rcr Eb,1"); break;
+        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC(shl_Eb_1, "shl Eb,1"); break;
+        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC(shr_Eb_1, "shr Eb,1"); break;
+        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC(sar_Eb_1, "sar Eb,1"); break;
         case 6: return IEMOP_RAISE_INVALID_OPCODE();
         IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe, well... */
@@ -12971 +13025 @@
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
-        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,1"); break;
-        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,1"); break;
-        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,1"); break;
-        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,1"); break;
-        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,1"); break;
-        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,1"); break;
-        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,1"); break;
+        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC(rol_Ev_1, "rol Ev,1"); break;
+        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC(ror_Ev_1, "ror Ev,1"); break;
+        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC(rcl_Ev_1, "rcl Ev,1"); break;
+        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC(rcr_Ev_1, "rcr Ev,1"); break;
+        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC(shl_Ev_1, "shl Ev,1"); break;
+        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC(shr_Ev_1, "shr Ev,1"); break;
+        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC(sar_Ev_1, "sar Ev,1"); break;
         case 6: return IEMOP_RAISE_INVALID_OPCODE();
         IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe, well... */
@@ -13104 +13158 @@
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
-        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Eb,CL"); break;
-        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Eb,CL"); break;
-        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Eb,CL"); break;
-        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Eb,CL"); break;
-        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Eb,CL"); break;
-        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Eb,CL"); break;
-        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Eb,CL"); break;
+        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC(rol_Eb_CL, "rol Eb,CL"); break;
+        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC(ror_Eb_CL, "ror Eb,CL"); break;
+        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC(rcl_Eb_CL, "rcl Eb,CL"); break;
+        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC(rcr_Eb_CL, "rcr Eb,CL"); break;
+        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC(shl_Eb_CL, "shl Eb,CL"); break;
+        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC(shr_Eb_CL, "shr Eb,CL"); break;
+        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC(sar_Eb_CL, "sar Eb,CL"); break;
         case 6: return IEMOP_RAISE_INVALID_OPCODE();
         IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc, grr. */
@@ -13163 +13217 @@
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
-        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC("rol Ev,CL"); break;
-        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC("ror Ev,CL"); break;
-        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC("rcl Ev,CL"); break;
-        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC("rcr Ev,CL"); break;
-        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC("shl Ev,CL"); break;
-        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC("shr Ev,CL"); break;
-        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC("sar Ev,CL"); break;
+        case 0: pImpl = &g_iemAImpl_rol; IEMOP_MNEMONIC(rol_Ev_CL, "rol Ev,CL"); break;
+        case 1: pImpl = &g_iemAImpl_ror; IEMOP_MNEMONIC(ror_Ev_CL, "ror Ev,CL"); break;
+        case 2: pImpl = &g_iemAImpl_rcl; IEMOP_MNEMONIC(rcl_Ev_CL, "rcl Ev,CL"); break;
+        case 3: pImpl = &g_iemAImpl_rcr; IEMOP_MNEMONIC(rcr_Ev_CL, "rcr Ev,CL"); break;
+        case 4: pImpl = &g_iemAImpl_shl; IEMOP_MNEMONIC(shl_Ev_CL, "shl Ev,CL"); break;
+        case 5: pImpl = &g_iemAImpl_shr; IEMOP_MNEMONIC(shr_Ev_CL, "shr Ev,CL"); break;
+        case 7: pImpl = &g_iemAImpl_sar; IEMOP_MNEMONIC(sar_Ev_CL, "sar Ev,CL"); break;
         case 6: return IEMOP_RAISE_INVALID_OPCODE();
         IEM_NOT_REACHED_DEFAULT_CASE_RET(); /* gcc maybe stupid */
@@ -13297 +13351 @@
 FNIEMOP_DEF(iemOp_aam_Ib)
 {
-    IEMOP_MNEMONIC("aam Ib");
+    IEMOP_MNEMONIC(aam_Ib, "aam Ib");
     uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -13310 +13364 @@
 FNIEMOP_DEF(iemOp_aad_Ib)
 {
-    IEMOP_MNEMONIC("aad Ib");
+    IEMOP_MNEMONIC(aad_Ib, "aad Ib");
     uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -13321 +13375 @@
 FNIEMOP_DEF(iemOp_salc)
 {
-    IEMOP_MNEMONIC("salc");
+    IEMOP_MNEMONIC(salc, "salc");
     IEMOP_HLP_MIN_286(); /* (undocument at the time) */
     uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
@@ -13342 +13396 @@
 FNIEMOP_DEF(iemOp_xlat)
 {
-    IEMOP_MNEMONIC("xlat");
+    IEMOP_MNEMONIC(xlat, "xlat");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     switch (pVCpu->iem.s.enmEffAddrMode)
@@ -13486 +13540 @@
 FNIEMOP_DEF_1(iemOp_fadd_stN,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fadd st0,stN");
+    IEMOP_MNEMONIC(fadd_st0_stN, "fadd st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fadd_r80_by_r80);
 }
@@ -13494 +13548 @@
 FNIEMOP_DEF_1(iemOp_fmul_stN,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fmul st0,stN");
+    IEMOP_MNEMONIC(fmul_st0_stN, "fmul st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fmul_r80_by_r80);
 }
@@ -13502 +13556 @@
 FNIEMOP_DEF_1(iemOp_fcom_stN,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcom st0,stN");
+    IEMOP_MNEMONIC(fcom_st0_stN, "fcom st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN, bRm, iemAImpl_fcom_r80_by_r80);
 }
@@ -13510 +13564 @@
 FNIEMOP_DEF_1(iemOp_fcomp_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomp st0,stN");
+    IEMOP_MNEMONIC(fcomp_st0_stN, "fcomp st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN_pop, bRm, iemAImpl_fcom_r80_by_r80);
 }
@@ -13518 +13572 @@
 FNIEMOP_DEF_1(iemOp_fsub_stN,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsub st0,stN");
+    IEMOP_MNEMONIC(fsub_st0_stN, "fsub st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fsub_r80_by_r80);
 }
@@ -13526 +13580 @@
 FNIEMOP_DEF_1(iemOp_fsubr_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsubr st0,stN");
+    IEMOP_MNEMONIC(fsubr_st0_stN, "fsubr st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fsubr_r80_by_r80);
 }
@@ -13534 +13588 @@
 FNIEMOP_DEF_1(iemOp_fdiv_stN,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdiv st0,stN");
+    IEMOP_MNEMONIC(fdiv_st0_stN, "fdiv st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fdiv_r80_by_r80);
 }
@@ -13542 +13596 @@
 FNIEMOP_DEF_1(iemOp_fdivr_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdivr st0,stN");
+    IEMOP_MNEMONIC(fdivr_st0_stN, "fdivr st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, bRm, iemAImpl_fdivr_r80_by_r80);
 }
@@ -13587 +13641 @@
 FNIEMOP_DEF_1(iemOp_fadd_m32r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fadd st0,m32r");
+    IEMOP_MNEMONIC(fadd_st0_m32r, "fadd st0,m32r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fadd_r80_by_r32);
 }
@@ -13595 +13649 @@
 FNIEMOP_DEF_1(iemOp_fmul_m32r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fmul st0,m32r");
+    IEMOP_MNEMONIC(fmul_st0_m32r, "fmul st0,m32r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fmul_r80_by_r32);
 }
@@ -13603 +13657 @@
 FNIEMOP_DEF_1(iemOp_fcom_m32r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcom st0,m32r");
+    IEMOP_MNEMONIC(fcom_st0_m32r, "fcom st0,m32r");
 
     IEM_MC_BEGIN(3, 3);
@@ -13637 +13691 @@
 FNIEMOP_DEF_1(iemOp_fcomp_m32r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomp st0,m32r");
+    IEMOP_MNEMONIC(fcomp_st0_m32r, "fcomp st0,m32r");
 
     IEM_MC_BEGIN(3, 3);
@@ -13671 +13725 @@
 FNIEMOP_DEF_1(iemOp_fsub_m32r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsub st0,m32r");
+    IEMOP_MNEMONIC(fsub_st0_m32r, "fsub st0,m32r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fsub_r80_by_r32);
 }
@@ -13679 +13733 @@
 FNIEMOP_DEF_1(iemOp_fsubr_m32r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsubr st0,m32r");
+    IEMOP_MNEMONIC(fsubr_st0_m32r, "fsubr st0,m32r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fsubr_r80_by_r32);
 }
@@ -13687 +13741 @@
 FNIEMOP_DEF_1(iemOp_fdiv_m32r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdiv st0,m32r");
+    IEMOP_MNEMONIC(fdiv_st0_m32r, "fdiv st0,m32r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fdiv_r80_by_r32);
 }
@@ -13695 +13749 @@
 FNIEMOP_DEF_1(iemOp_fdivr_m32r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdivr st0,m32r");
+    IEMOP_MNEMONIC(fdivr_st0_m32r, "fdivr st0,m32r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32r, bRm, iemAImpl_fdivr_r80_by_r32);
 }
@@ -13743 +13797 @@
 FNIEMOP_DEF_1(iemOp_fld_m32r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fld m32r");
+    IEMOP_MNEMONIC(fld_m32r, "fld m32r");
 
     IEM_MC_BEGIN(2, 3);
@@ -13776 +13830 @@
 FNIEMOP_DEF_1(iemOp_fst_m32r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fst m32r");
+    IEMOP_MNEMONIC(fst_m32r, "fst m32r");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -13812 +13866 @@
 FNIEMOP_DEF_1(iemOp_fstp_m32r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fstp m32r");
+    IEMOP_MNEMONIC(fstp_m32r, "fstp m32r");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -13848 +13902 @@
 FNIEMOP_DEF_1(iemOp_fldenv, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fldenv m14/28byte");
+    IEMOP_MNEMONIC(fldenv, "fldenv m14/28byte");
     IEM_MC_BEGIN(3, 0);
     IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
@@ -13867 +13921 @@
 FNIEMOP_DEF_1(iemOp_fldcw, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fldcw m2byte");
+    IEMOP_MNEMONIC(fldcw_m2byte, "fldcw m2byte");
     IEM_MC_BEGIN(1, 1);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -13885 +13939 @@
 FNIEMOP_DEF_1(iemOp_fnstenv, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fstenv m14/m28byte");
+    IEMOP_MNEMONIC(fstenv, "fstenv m14/m28byte");
     IEM_MC_BEGIN(3, 0);
     IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
@@ -13904 +13958 @@
 FNIEMOP_DEF_1(iemOp_fnstcw, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fnstcw m2byte");
+    IEMOP_MNEMONIC(fnstcw_m2byte, "fnstcw m2byte");
     IEM_MC_BEGIN(2, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -13923 +13977 @@
 FNIEMOP_DEF(iemOp_fnop)
 {
-    IEMOP_MNEMONIC("fnop");
+    IEMOP_MNEMONIC(fnop, "fnop");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -13942 +13996 @@
 FNIEMOP_DEF_1(iemOp_fld_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fld stN");
+    IEMOP_MNEMONIC(fld_stN, "fld stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -13971 +14025 @@
 FNIEMOP_DEF_1(iemOp_fxch_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fxch stN");
+    IEMOP_MNEMONIC(fxch_stN, "fxch stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -14003 +14057 @@
 FNIEMOP_DEF_1(iemOp_fstp_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fstp st0,stN");
+    IEMOP_MNEMONIC(fstp_st0_stN, "fstp st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -14082 +14136 @@
 FNIEMOP_DEF(iemOp_fchs)
 {
-    IEMOP_MNEMONIC("fchs st0");
+    IEMOP_MNEMONIC(fchs_st0, "fchs st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fchs_r80);
 }
@@ -14090 +14144 @@
 FNIEMOP_DEF(iemOp_fabs)
 {
-    IEMOP_MNEMONIC("fabs st0");
+    IEMOP_MNEMONIC(fabs_st0, "fabs st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fabs_r80);
 }
@@ -14128 +14182 @@
 FNIEMOP_DEF(iemOp_ftst)
 {
-    IEMOP_MNEMONIC("ftst st0");
+    IEMOP_MNEMONIC(ftst_st0, "ftst st0");
     return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0, iemAImpl_ftst_r80);
 }
@@ -14136 +14190 @@
 FNIEMOP_DEF(iemOp_fxam)
 {
-    IEMOP_MNEMONIC("fxam st0");
+    IEMOP_MNEMONIC(fxam_st0, "fxam st0");
     return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0, iemAImpl_fxam_r80);
 }
@@ -14173 +14227 @@
 FNIEMOP_DEF(iemOp_fld1)
 {
-    IEMOP_MNEMONIC("fld1");
+    IEMOP_MNEMONIC(fld1, "fld1");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fld1);
 }
@@ -14181 +14235 @@
 FNIEMOP_DEF(iemOp_fldl2t)
 {
-    IEMOP_MNEMONIC("fldl2t");
+    IEMOP_MNEMONIC(fldl2t, "fldl2t");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldl2t);
 }
@@ -14189 +14243 @@
 FNIEMOP_DEF(iemOp_fldl2e)
 {
-    IEMOP_MNEMONIC("fldl2e");
+    IEMOP_MNEMONIC(fldl2e, "fldl2e");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldl2e);
 }
@@ -14196 +14250 @@
 FNIEMOP_DEF(iemOp_fldpi)
 {
-    IEMOP_MNEMONIC("fldpi");
+    IEMOP_MNEMONIC(fldpi, "fldpi");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldpi);
 }
@@ -14204 +14258 @@
 FNIEMOP_DEF(iemOp_fldlg2)
 {
-    IEMOP_MNEMONIC("fldlg2");
+    IEMOP_MNEMONIC(fldlg2, "fldlg2");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldlg2);
 }
@@ -14211 +14265 @@
 FNIEMOP_DEF(iemOp_fldln2)
 {
-    IEMOP_MNEMONIC("fldln2");
+    IEMOP_MNEMONIC(fldln2, "fldln2");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldln2);
 }
@@ -14219 +14273 @@
 FNIEMOP_DEF(iemOp_fldz)
 {
-    IEMOP_MNEMONIC("fldz");
+    IEMOP_MNEMONIC(fldz, "fldz");
     return FNIEMOP_CALL_1(iemOpHlpFpuPushConstant, iemAImpl_fldz);
 }
@@ -14227 +14281 @@
 FNIEMOP_DEF(iemOp_f2xm1)
 {
-    IEMOP_MNEMONIC("f2xm1 st0");
+    IEMOP_MNEMONIC(f2xm1_st0, "f2xm1 st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_f2xm1_r80);
 }
@@ -14235 +14289 @@
 FNIEMOP_DEF(iemOp_fylx2)
 {
-    IEMOP_MNEMONIC("fylx2 st0");
+    IEMOP_MNEMONIC(fylx2_st0, "fylx2 st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fyl2x_r80);
 }
@@ -14274 +14328 @@
 FNIEMOP_DEF(iemOp_fptan)
 {
-    IEMOP_MNEMONIC("fptan st0");
+    IEMOP_MNEMONIC(fptan_st0, "fptan st0");
     return FNIEMOP_CALL_1(iemOpHlpFpuReplace_st0_push, iemAImpl_fptan_r80_r80);
 }
@@ -14315 +14369 @@
 FNIEMOP_DEF(iemOp_fpatan)
 {
-    IEMOP_MNEMONIC("fpatan st1,st0");
+    IEMOP_MNEMONIC(fpatan_st1_st0, "fpatan st1,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, 1, iemAImpl_fpatan_r80_by_r80);
 }
@@ -14323 +14377 @@
 FNIEMOP_DEF(iemOp_fxtract)
 {
-    IEMOP_MNEMONIC("fxtract st0");
+    IEMOP_MNEMONIC(fxtract_st0, "fxtract st0");
     return FNIEMOP_CALL_1(iemOpHlpFpuReplace_st0_push, iemAImpl_fxtract_r80_r80);
 }
@@ -14331 +14385 @@
 FNIEMOP_DEF(iemOp_fprem1)
 {
-    IEMOP_MNEMONIC("fprem1 st0, st1");
+    IEMOP_MNEMONIC(fprem1_st0_st1, "fprem1 st0,st1");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, 1, iemAImpl_fprem1_r80_by_r80);
 }
@@ -14339 +14393 @@
 FNIEMOP_DEF(iemOp_fdecstp)
 {
-    IEMOP_MNEMONIC("fdecstp");
+    IEMOP_MNEMONIC(fdecstp, "fdecstp");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     /* Note! C0, C2 and C3 are documented as undefined, we clear them. */
@@ -14363 +14417 @@
 FNIEMOP_DEF(iemOp_fincstp)
 {
-    IEMOP_MNEMONIC("fincstp");
+    IEMOP_MNEMONIC(fincstp, "fincstp");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     /* Note! C0, C2 and C3 are documented as undefined, we clear them. */
@@ -14387 +14441 @@
 FNIEMOP_DEF(iemOp_fprem)
 {
-    IEMOP_MNEMONIC("fprem st0, st1");
+    IEMOP_MNEMONIC(fprem_st0_st1, "fprem st0,st1");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, 1, iemAImpl_fprem_r80_by_r80);
 }
@@ -14395 +14449 @@
 FNIEMOP_DEF(iemOp_fyl2xp1)
 {
-    IEMOP_MNEMONIC("fyl2xp1 st1,st0");
+    IEMOP_MNEMONIC(fyl2xp1_st1_st0, "fyl2xp1 st1,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, 1, iemAImpl_fyl2xp1_r80_by_r80);
 }
@@ -14403 +14457 @@
 FNIEMOP_DEF(iemOp_fsqrt)
 {
-    IEMOP_MNEMONIC("fsqrt st0");
+    IEMOP_MNEMONIC(fsqrt_st0, "fsqrt st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fsqrt_r80);
 }
@@ -14411 +14465 @@
 FNIEMOP_DEF(iemOp_fsincos)
 {
-    IEMOP_MNEMONIC("fsincos st0");
+    IEMOP_MNEMONIC(fsincos_st0, "fsincos st0");
     return FNIEMOP_CALL_1(iemOpHlpFpuReplace_st0_push, iemAImpl_fsincos_r80_r80);
 }
@@ -14419 +14473 @@
 FNIEMOP_DEF(iemOp_frndint)
 {
-    IEMOP_MNEMONIC("frndint st0");
+    IEMOP_MNEMONIC(frndint_st0, "frndint st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_frndint_r80);
 }
@@ -14427 +14481 @@
 FNIEMOP_DEF(iemOp_fscale)
 {
-    IEMOP_MNEMONIC("fscale st0, st1");
+    IEMOP_MNEMONIC(fscale_st0_st1, "fscale st0,st1");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_stN, 1, iemAImpl_fscale_r80_by_r80);
 }
@@ -14435 +14489 @@
 FNIEMOP_DEF(iemOp_fsin)
 {
-    IEMOP_MNEMONIC("fsin st0");
+    IEMOP_MNEMONIC(fsin_st0, "fsin st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fsin_r80);
 }
@@ -14443 +14497 @@
 FNIEMOP_DEF(iemOp_fcos)
 {
-    IEMOP_MNEMONIC("fcos st0");
+    IEMOP_MNEMONIC(fcos_st0, "fcos st0");
     return FNIEMOP_CALL_1(iemOpHlpFpu_st0, iemAImpl_fcos_r80);
 }
@@ -14533 +14587 @@
 FNIEMOP_DEF_1(iemOp_fcmovb_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovb st0,stN");
+    IEMOP_MNEMONIC(fcmovb_st0_stN, "fcmovb st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -14561 +14615 @@
 FNIEMOP_DEF_1(iemOp_fcmove_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmove st0,stN");
+    IEMOP_MNEMONIC(fcmove_st0_stN, "fcmove st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -14589 +14643 @@
 FNIEMOP_DEF_1(iemOp_fcmovbe_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovbe st0,stN");
+    IEMOP_MNEMONIC(fcmovbe_st0_stN, "fcmovbe st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -14617 +14671 @@
 FNIEMOP_DEF_1(iemOp_fcmovu_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovu st0,stN");
+    IEMOP_MNEMONIC(fcmovu_st0_stN, "fcmovu st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -14678 +14732 @@
 FNIEMOP_DEF(iemOp_fucompp)
 {
-    IEMOP_MNEMONIC("fucompp st0,stN");
+    IEMOP_MNEMONIC(fucompp_st0_stN, "fucompp st0,stN");
     return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0_stN_pop_pop, iemAImpl_fucom_r80_by_r80);
 }
@@ -14723 +14777 @@
 FNIEMOP_DEF_1(iemOp_fiadd_m32i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fiadd m32i");
+    IEMOP_MNEMONIC(fiadd_m32i, "fiadd m32i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fiadd_r80_by_i32);
 }
@@ -14731 +14785 @@
 FNIEMOP_DEF_1(iemOp_fimul_m32i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fimul m32i");
+    IEMOP_MNEMONIC(fimul_m32i, "fimul m32i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fimul_r80_by_i32);
 }
@@ -14739 +14793 @@
 FNIEMOP_DEF_1(iemOp_ficom_m32i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("ficom st0,m32i");
+    IEMOP_MNEMONIC(ficom_st0_m32i, "ficom st0,m32i");
 
     IEM_MC_BEGIN(3, 3);
@@ -14773 +14827 @@
 FNIEMOP_DEF_1(iemOp_ficomp_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("ficomp st0,m32i");
+    IEMOP_MNEMONIC(ficomp_st0_m32i, "ficomp st0,m32i");
 
     IEM_MC_BEGIN(3, 3);
@@ -14807 +14861 @@
 FNIEMOP_DEF_1(iemOp_fisub_m32i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisub m32i");
+    IEMOP_MNEMONIC(fisub_m32i, "fisub m32i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fisub_r80_by_i32);
 }
@@ -14815 +14869 @@
 FNIEMOP_DEF_1(iemOp_fisubr_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisubr m32i");
+    IEMOP_MNEMONIC(fisubr_m32i, "fisubr m32i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fisubr_r80_by_i32);
 }
@@ -14823 +14877 @@
 FNIEMOP_DEF_1(iemOp_fidiv_m32i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fidiv m32i");
+    IEMOP_MNEMONIC(fidiv_m32i, "fidiv m32i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fidiv_r80_by_i32);
 }
@@ -14831 +14885 @@
 FNIEMOP_DEF_1(iemOp_fidivr_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fidivr m32i");
+    IEMOP_MNEMONIC(fidivr_m32i, "fidivr m32i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m32i, bRm, iemAImpl_fidivr_r80_by_i32);
 }
@@ -14880 +14934 @@
 FNIEMOP_DEF_1(iemOp_fild_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fild m32i");
+    IEMOP_MNEMONIC(fild_m32i, "fild m32i");
 
     IEM_MC_BEGIN(2, 3);
@@ -14913 +14967 @@
 FNIEMOP_DEF_1(iemOp_fisttp_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisttp m32i");
+    IEMOP_MNEMONIC(fisttp_m32i, "fisttp m32i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -14949 +15003 @@
 FNIEMOP_DEF_1(iemOp_fist_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fist m32i");
+    IEMOP_MNEMONIC(fist_m32i, "fist m32i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -14985 +15039 @@
 FNIEMOP_DEF_1(iemOp_fistp_m32i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisttp m32i");
+    IEMOP_MNEMONIC(fistp_m32i, "fistp m32i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -15021 +15075 @@
 FNIEMOP_DEF_1(iemOp_fld_m80r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fld m80r");
+    IEMOP_MNEMONIC(fld_m80r, "fld m80r");
 
     IEM_MC_BEGIN(2, 3);
@@ -15054 +15108 @@
 FNIEMOP_DEF_1(iemOp_fstp_m80r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fstp m80r");
+    IEMOP_MNEMONIC(fstp_m80r, "fstp m80r");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -15090 +15144 @@
 FNIEMOP_DEF_1(iemOp_fcmovnb_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovnb st0,stN");
+    IEMOP_MNEMONIC(fcmovnb_st0_stN, "fcmovnb st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -15118 +15172 @@
 FNIEMOP_DEF_1(iemOp_fcmovne_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovne st0,stN");
+    IEMOP_MNEMONIC(fcmovne_st0_stN, "fcmovne st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -15146 +15200 @@
 FNIEMOP_DEF_1(iemOp_fcmovnbe_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovnbe st0,stN");
+    IEMOP_MNEMONIC(fcmovnbe_st0_stN, "fcmovnbe st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -15174 +15228 @@
 FNIEMOP_DEF_1(iemOp_fcmovnnu_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcmovnnu st0,stN");
+    IEMOP_MNEMONIC(fcmovnnu_st0_stN, "fcmovnnu st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -15202 +15256 @@
 FNIEMOP_DEF(iemOp_fneni)
 {
-    IEMOP_MNEMONIC("fneni (8087/ign)");
+    IEMOP_MNEMONIC(fneni, "fneni (8087/ign)");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0,0);
@@ -15215 +15269 @@
 FNIEMOP_DEF(iemOp_fndisi)
 {
-    IEMOP_MNEMONIC("fndisi (8087/ign)");
+    IEMOP_MNEMONIC(fndisi, "fndisi (8087/ign)");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0,0);
@@ -15228 +15282 @@
 FNIEMOP_DEF(iemOp_fnclex)
 {
-    IEMOP_MNEMONIC("fnclex");
+    IEMOP_MNEMONIC(fnclex, "fnclex");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -15244 +15298 @@
 FNIEMOP_DEF(iemOp_fninit)
 {
-    IEMOP_MNEMONIC("fninit");
+    IEMOP_MNEMONIC(fninit, "fninit");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_finit, false /*fCheckXcpts*/);
@@ -15253 +15307 @@
 FNIEMOP_DEF(iemOp_fnsetpm)
 {
-    IEMOP_MNEMONIC("fnsetpm (80287/ign)");   /* set protected mode on fpu. */
+    IEMOP_MNEMONIC(fnsetpm, "fnsetpm (80287/ign)");   /* set protected mode on fpu. */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0,0);
@@ -15266 +15320 @@
 FNIEMOP_DEF(iemOp_frstpm)
 {
-    IEMOP_MNEMONIC("frstpm (80287XL/ign)"); /* reset pm, back to real mode. */
+    IEMOP_MNEMONIC(frstpm, "frstpm (80287XL/ign)"); /* reset pm, back to real mode. */
 #if 0 /* #UDs on newer CPUs */
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -15283 +15337 @@
 FNIEMOP_DEF_1(iemOp_fucomi_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fucomi st0,stN");
+    IEMOP_MNEMONIC(fucomi_st0_stN, "fucomi st0,stN");
     return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fucomi_r80_by_r80, false /*fPop*/);
 }
@@ -15291 +15345 @@
 FNIEMOP_DEF_1(iemOp_fcomi_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomi st0,stN");
+    IEMOP_MNEMONIC(fcomi_st0_stN, "fcomi st0,stN");
     return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, false /*fPop*/);
 }
@@ -15383 +15437 @@
 FNIEMOP_DEF_1(iemOp_fadd_stN_st0,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fadd stN,st0");
+    IEMOP_MNEMONIC(fadd_stN_st0, "fadd stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fadd_r80_by_r80);
 }
@@ -15391 +15445 @@
 FNIEMOP_DEF_1(iemOp_fmul_stN_st0,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fmul stN,st0");
+    IEMOP_MNEMONIC(fmul_stN_st0, "fmul stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fmul_r80_by_r80);
 }
@@ -15399 +15453 @@
 FNIEMOP_DEF_1(iemOp_fsubr_stN_st0,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsubr stN,st0");
+    IEMOP_MNEMONIC(fsubr_stN_st0, "fsubr stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fsubr_r80_by_r80);
 }
@@ -15407 +15461 @@
 FNIEMOP_DEF_1(iemOp_fsub_stN_st0,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsub stN,st0");
+    IEMOP_MNEMONIC(fsub_stN_st0, "fsub stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fsub_r80_by_r80);
 }
@@ -15415 +15469 @@
 FNIEMOP_DEF_1(iemOp_fdivr_stN_st0,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdivr stN,st0");
+    IEMOP_MNEMONIC(fdivr_stN_st0, "fdivr stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fdivr_r80_by_r80);
 }
@@ -15423 +15477 @@
 FNIEMOP_DEF_1(iemOp_fdiv_stN_st0,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdiv stN,st0");
+    IEMOP_MNEMONIC(fdiv_stN_st0, "fdiv stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0, bRm, iemAImpl_fdiv_r80_by_r80);
 }
@@ -15467 +15521 @@
 FNIEMOP_DEF_1(iemOp_fadd_m64r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fadd m64r");
+    IEMOP_MNEMONIC(fadd_m64r, "fadd m64r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fadd_r80_by_r64);
 }
@@ -15475 +15529 @@
 FNIEMOP_DEF_1(iemOp_fmul_m64r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fmul m64r");
+    IEMOP_MNEMONIC(fmul_m64r, "fmul m64r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fmul_r80_by_r64);
 }
@@ -15483 +15537 @@
 FNIEMOP_DEF_1(iemOp_fcom_m64r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcom st0,m64r");
+    IEMOP_MNEMONIC(fcom_st0_m64r, "fcom st0,m64r");
 
     IEM_MC_BEGIN(3, 3);
@@ -15517 +15571 @@
 FNIEMOP_DEF_1(iemOp_fcomp_m64r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomp st0,m64r");
+    IEMOP_MNEMONIC(fcomp_st0_m64r, "fcomp st0,m64r");
 
     IEM_MC_BEGIN(3, 3);
@@ -15551 +15605 @@
 FNIEMOP_DEF_1(iemOp_fsub_m64r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsub m64r");
+    IEMOP_MNEMONIC(fsub_m64r, "fsub m64r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fsub_r80_by_r64);
 }
@@ -15559 +15613 @@
 FNIEMOP_DEF_1(iemOp_fsubr_m64r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsubr m64r");
+    IEMOP_MNEMONIC(fsubr_m64r, "fsubr m64r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fsubr_r80_by_r64);
 }
@@ -15567 +15621 @@
 FNIEMOP_DEF_1(iemOp_fdiv_m64r,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdiv m64r");
+    IEMOP_MNEMONIC(fdiv_m64r, "fdiv m64r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fdiv_r80_by_r64);
 }
@@ -15575 +15629 @@
 FNIEMOP_DEF_1(iemOp_fdivr_m64r, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdivr m64r");
+    IEMOP_MNEMONIC(fdivr_m64r, "fdivr m64r");
     return FNIEMOP_CALL_2(iemOpHlpFpu_ST0_m64r, bRm, iemAImpl_fdivr_r80_by_r64);
 }
@@ -15622 +15676 @@
 FNIEMOP_DEF_1(iemOp_fld_m64r,    uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fld m64r");
+    IEMOP_MNEMONIC(fld_m64r, "fld m64r");
 
     IEM_MC_BEGIN(2, 3);
@@ -15654 +15708 @@
 FNIEMOP_DEF_1(iemOp_fisttp_m64i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisttp m64i");
+    IEMOP_MNEMONIC(fisttp_m64i, "fisttp m64i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -15690 +15744 @@
 FNIEMOP_DEF_1(iemOp_fst_m64r,    uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fst m64r");
+    IEMOP_MNEMONIC(fst_m64r, "fst m64r");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -15728 +15782 @@
 FNIEMOP_DEF_1(iemOp_fstp_m64r,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fstp m64r");
+    IEMOP_MNEMONIC(fstp_m64r, "fstp m64r");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -15764 +15818 @@
 FNIEMOP_DEF_1(iemOp_frstor,      uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("frstor m94/108byte");
+    IEMOP_MNEMONIC(frstor, "frstor m94/108byte");
     IEM_MC_BEGIN(3, 0);
     IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
@@ -15783 +15837 @@
 FNIEMOP_DEF_1(iemOp_fnsave,      uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fnsave m94/108byte");
+    IEMOP_MNEMONIC(fnsave, "fnsave m94/108byte");
     IEM_MC_BEGIN(3, 0);
     IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
@@ -15802 +15856 @@
 FNIEMOP_DEF_1(iemOp_fnstsw,      uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fnstsw m16");
+    IEMOP_MNEMONIC(fnstsw_m16, "fnstsw m16");
 
     IEM_MC_BEGIN(0, 2);
@@ -15828 +15882 @@
 FNIEMOP_DEF_1(iemOp_ffree_stN,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("ffree stN");
+    IEMOP_MNEMONIC(ffree_stN, "ffree stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     /* Note! C0, C1, C2 and C3 are documented as undefined, we leave the
@@ -15851 +15905 @@
 FNIEMOP_DEF_1(iemOp_fst_stN,     uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fst st0,stN");
+    IEMOP_MNEMONIC(fst_st0_stN, "fst st0,stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -15877 +15931 @@
 FNIEMOP_DEF_1(iemOp_fucom_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcom st0,stN");
+    IEMOP_MNEMONIC(fucom_st0_stN, "fucom st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN, bRm, iemAImpl_fucom_r80_by_r80);
 }
@@ -15885 +15939 @@
 FNIEMOP_DEF_1(iemOp_fucomp_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomp st0,stN");
+    IEMOP_MNEMONIC(fucomp_st0_stN, "fucomp st0,stN");
     return FNIEMOP_CALL_2(iemOpHlpFpuNoStore_st0_stN_pop, bRm, iemAImpl_fucom_r80_by_r80);
 }
@@ -15931 +15985 @@
 FNIEMOP_DEF_1(iemOp_faddp_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("faddp stN,st0");
+    IEMOP_MNEMONIC(faddp_stN_st0, "faddp stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fadd_r80_by_r80);
 }
@@ -15939 +15993 @@
 FNIEMOP_DEF_1(iemOp_fmulp_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fmulp stN,st0");
+    IEMOP_MNEMONIC(fmulp_stN_st0, "fmulp stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fmul_r80_by_r80);
 }
@@ -15947 +16001 @@
 FNIEMOP_DEF(iemOp_fcompp)
 {
-    IEMOP_MNEMONIC("fucompp st0,stN");
+    IEMOP_MNEMONIC(fcompp_st0_stN, "fcompp st0,stN");
     return FNIEMOP_CALL_1(iemOpHlpFpuNoStore_st0_stN_pop_pop, iemAImpl_fcom_r80_by_r80);
 }
@@ -15955 +16009 @@
 FNIEMOP_DEF_1(iemOp_fsubrp_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsubrp stN,st0");
+    IEMOP_MNEMONIC(fsubrp_stN_st0, "fsubrp stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fsubr_r80_by_r80);
 }
@@ -15963 +16017 @@
 FNIEMOP_DEF_1(iemOp_fsubp_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fsubp stN,st0");
+    IEMOP_MNEMONIC(fsubp_stN_st0, "fsubp stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fsub_r80_by_r80);
 }
@@ -15971 +16025 @@
 FNIEMOP_DEF_1(iemOp_fdivrp_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdivrp stN,st0");
+    IEMOP_MNEMONIC(fdivrp_stN_st0, "fdivrp stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fdivr_r80_by_r80);
 }
@@ -15979 +16033 @@
 FNIEMOP_DEF_1(iemOp_fdivp_stN_st0, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fdivp stN,st0");
+    IEMOP_MNEMONIC(fdivp_stN_st0, "fdivp stN,st0");
     return FNIEMOP_CALL_2(iemOpHlpFpu_stN_st0_pop, bRm, iemAImpl_fdiv_r80_by_r80);
 }
@@ -16024 +16078 @@
 FNIEMOP_DEF_1(iemOp_fiadd_m16i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fiadd m16i");
+    IEMOP_MNEMONIC(fiadd_m16i, "fiadd m16i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fiadd_r80_by_i16);
 }
@@ -16032 +16086 @@
 FNIEMOP_DEF_1(iemOp_fimul_m16i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fimul m16i");
+    IEMOP_MNEMONIC(fimul_m16i, "fimul m16i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fimul_r80_by_i16);
 }
@@ -16040 +16094 @@
 FNIEMOP_DEF_1(iemOp_ficom_m16i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("ficom st0,m16i");
+    IEMOP_MNEMONIC(ficom_st0_m16i, "ficom st0,m16i");
 
     IEM_MC_BEGIN(3, 3);
@@ -16074 +16128 @@
 FNIEMOP_DEF_1(iemOp_ficomp_m16i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("ficomp st0,m16i");
+    IEMOP_MNEMONIC(ficomp_st0_m16i, "ficomp st0,m16i");
 
     IEM_MC_BEGIN(3, 3);
@@ -16108 +16162 @@
 FNIEMOP_DEF_1(iemOp_fisub_m16i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisub m16i");
+    IEMOP_MNEMONIC(fisub_m16i, "fisub m16i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fisub_r80_by_i16);
 }
@@ -16116 +16170 @@
 FNIEMOP_DEF_1(iemOp_fisubr_m16i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisubr m16i");
+    IEMOP_MNEMONIC(fisubr_m16i, "fisubr m16i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fisubr_r80_by_i16);
 }
@@ -16124 +16178 @@
 FNIEMOP_DEF_1(iemOp_fidiv_m16i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fiadd m16i");
+    IEMOP_MNEMONIC(fidiv_m16i, "fidiv m16i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fidiv_r80_by_i16);
 }
@@ -16132 +16186 @@
 FNIEMOP_DEF_1(iemOp_fidivr_m16i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fiadd m16i");
+    IEMOP_MNEMONIC(fidivr_m16i, "fidivr m16i");
     return FNIEMOP_CALL_2(iemOpHlpFpu_st0_m16i, bRm, iemAImpl_fidivr_r80_by_i16);
 }
@@ -16181 +16235 @@
 FNIEMOP_DEF_1(iemOp_ffreep_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("ffreep stN");
+    IEMOP_MNEMONIC(ffreep_stN, "ffreep stN");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -16203 +16257 @@
 FNIEMOP_DEF(iemOp_fnstsw_ax)
 {
-    IEMOP_MNEMONIC("fnstsw ax");
+    IEMOP_MNEMONIC(fnstsw_ax, "fnstsw ax");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -16221 +16275 @@
 FNIEMOP_DEF_1(iemOp_fucomip_st0_stN, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomip st0,stN");
+    IEMOP_MNEMONIC(fucomip_st0_stN, "fucomip st0,stN");
     return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, true /*fPop*/);
 }
@@ -16229 +16283 @@
 FNIEMOP_DEF_1(iemOp_fcomip_st0_stN,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fcomip st0,stN");
+    IEMOP_MNEMONIC(fcomip_st0_stN, "fcomip st0,stN");
     return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_fcomi_fucomi, bRm & X86_MODRM_RM_MASK, iemAImpl_fcomi_r80_by_r80, true /*fPop*/);
 }
@@ -16237 +16291 @@
 FNIEMOP_DEF_1(iemOp_fild_m16i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fild m16i");
+    IEMOP_MNEMONIC(fild_m16i, "fild m16i");
 
     IEM_MC_BEGIN(2, 3);
@@ -16270 +16324 @@
 FNIEMOP_DEF_1(iemOp_fisttp_m16i, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fisttp m16i");
+    IEMOP_MNEMONIC(fisttp_m16i, "fisttp m16i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -16306 +16360 @@
 FNIEMOP_DEF_1(iemOp_fist_m16i,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fistp m16i");
+    IEMOP_MNEMONIC(fist_m16i, "fist m16i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -16342 +16396 @@
 FNIEMOP_DEF_1(iemOp_fistp_m16i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fistp m16i");
+    IEMOP_MNEMONIC(fistp_m16i, "fistp m16i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -16382 +16436 @@
 FNIEMOP_DEF_1(iemOp_fild_m64i,   uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fild m64i");
+    IEMOP_MNEMONIC(fild_m64i, "fild m64i");
 
     IEM_MC_BEGIN(2, 3);
@@ -16419 +16473 @@
 FNIEMOP_DEF_1(iemOp_fistp_m64i,  uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("fistp m64i");
+    IEMOP_MNEMONIC(fistp_m64i, "fistp m64i");
     IEM_MC_BEGIN(3, 2);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
@@ -16494 +16548 @@
 FNIEMOP_DEF(iemOp_loopne_Jb)
 {
-    IEMOP_MNEMONIC("loopne Jb");
+    IEMOP_MNEMONIC(loopne_Jb, "loopne Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16542 +16596 @@
 FNIEMOP_DEF(iemOp_loope_Jb)
 {
-    IEMOP_MNEMONIC("loope Jb");
+    IEMOP_MNEMONIC(loope_Jb, "loope Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16590 +16644 @@
 FNIEMOP_DEF(iemOp_loop_Jb)
 {
-    IEMOP_MNEMONIC("loop Jb");
+    IEMOP_MNEMONIC(loop_Jb, "loop Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16665 +16719 @@
 FNIEMOP_DEF(iemOp_jecxz_Jb)
 {
-    IEMOP_MNEMONIC("jecxz Jb");
+    IEMOP_MNEMONIC(jecxz_Jb, "jecxz Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16710 +16764 @@
 FNIEMOP_DEF(iemOp_in_AL_Ib)
 {
-    IEMOP_MNEMONIC("in eAX,Ib");
+    IEMOP_MNEMONIC(in_AL_Ib, "in AL,Ib");
     uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16720 +16774 @@
 FNIEMOP_DEF(iemOp_in_eAX_Ib)
 {
-    IEMOP_MNEMONIC("in eAX,Ib");
+    IEMOP_MNEMONIC(in_eAX_Ib, "in eAX,Ib");
     uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16730 +16784 @@
 FNIEMOP_DEF(iemOp_out_Ib_AL)
 {
-    IEMOP_MNEMONIC("out Ib,AL");
+    IEMOP_MNEMONIC(out_Ib_AL, "out Ib,AL");
     uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16740 +16794 @@
 FNIEMOP_DEF(iemOp_out_Ib_eAX)
 {
-    IEMOP_MNEMONIC("out Ib,eAX");
+    IEMOP_MNEMONIC(out_Ib_eAX, "out Ib,eAX");
     uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16750 +16804 @@
 FNIEMOP_DEF(iemOp_call_Jv)
 {
-    IEMOP_MNEMONIC("call Jv");
+    IEMOP_MNEMONIC(call_Jv, "call Jv");
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
     switch (pVCpu->iem.s.enmEffOpSize)
@@ -16780 +16834 @@
 FNIEMOP_DEF(iemOp_jmp_Jv)
 {
-    IEMOP_MNEMONIC("jmp Jv");
+    IEMOP_MNEMONIC(jmp_Jv, "jmp Jv");
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
     switch (pVCpu->iem.s.enmEffOpSize)
@@ -16811 +16865 @@
 FNIEMOP_DEF(iemOp_jmp_Ap)
 {
-    IEMOP_MNEMONIC("jmp Ap");
+    IEMOP_MNEMONIC(jmp_Ap, "jmp Ap");
     IEMOP_HLP_NO_64BIT();
 
@@ -16829 +16883 @@
 FNIEMOP_DEF(iemOp_jmp_Jb)
 {
-    IEMOP_MNEMONIC("jmp Jb");
+    IEMOP_MNEMONIC(jmp_Jb, "jmp Jb");
     int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -16844 +16898 @@
 FNIEMOP_DEF(iemOp_in_AL_DX)
 {
-    IEMOP_MNEMONIC("in  AL,DX");
+    IEMOP_MNEMONIC(in_AL_DX, "in  AL,DX");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_in_eAX_DX, 1);
@@ -16853 +16907 @@
 FNIEMOP_DEF(iemOp_eAX_DX)
 {
-    IEMOP_MNEMONIC("in  eAX,DX");
+    IEMOP_MNEMONIC(in_eAX_DX, "in  eAX,DX");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_in_eAX_DX, pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
@@ -16862 +16916 @@
 FNIEMOP_DEF(iemOp_out_DX_AL)
 {
-    IEMOP_MNEMONIC("out DX,AL");
+    IEMOP_MNEMONIC(out_DX_AL, "out DX,AL");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, 1);
@@ -16871 +16925 @@
 FNIEMOP_DEF(iemOp_out_DX_eAX)
 {
-    IEMOP_MNEMONIC("out DX,eAX");
+    IEMOP_MNEMONIC(out_DX_eAX, "out DX,eAX");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_out_DX_eAX, pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
@@ -16891 +16945 @@
 FNIEMOP_DEF(iemOp_int_1)
 {
-    IEMOP_MNEMONIC("int1"); /* icebp */
+    IEMOP_MNEMONIC(int1, "int1"); /* icebp */
     IEMOP_HLP_MIN_386(); /** @todo does not generate #UD on 286, or so they say... */
     /** @todo testcase! */
@@ -16935 +16989 @@
 FNIEMOP_DEF(iemOp_cmc)
 {
-    IEMOP_MNEMONIC("cmc");
+    IEMOP_MNEMONIC(cmc, "cmc");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0, 0);
@@ -17073 +17127 @@
 FNIEMOP_DEF_1(iemOp_grp3_test_Eb, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("test Eb,Ib");
+    IEMOP_MNEMONIC(test_Eb_Ib, "test Eb,Ib");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
 
@@ -17121 +17175 @@
 FNIEMOP_DEF_1(iemOp_grp3_test_Ev, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("test Ev,Iv");
+    IEMOP_MNEMONIC(test_Ev_Iv, "test Ev,Iv");
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF);
 
@@ -17508 +17562 @@
             return IEMOP_RAISE_INVALID_OPCODE();
         case 2:
-            IEMOP_MNEMONIC("not Eb");
+            IEMOP_MNEMONIC(not_Eb, "not Eb");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_not);
         case 3:
-            IEMOP_MNEMONIC("neg Eb");
+            IEMOP_MNEMONIC(neg_Eb, "neg Eb");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_neg);
         case 4:
-            IEMOP_MNEMONIC("mul Eb");
+            IEMOP_MNEMONIC(mul_Eb, "mul Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_mul_u8);
         case 5:
-            IEMOP_MNEMONIC("imul Eb");
+            IEMOP_MNEMONIC(imul_Eb, "imul Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_imul_u8);
         case 6:
-            IEMOP_MNEMONIC("div Eb");
+            IEMOP_MNEMONIC(div_Eb, "div Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_div_u8);
         case 7:
-            IEMOP_MNEMONIC("idiv Eb");
+            IEMOP_MNEMONIC(idiv_Eb, "idiv Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_idiv_u8);
@@ -17546 +17600 @@
             return IEMOP_RAISE_INVALID_OPCODE();
         case 2:
-            IEMOP_MNEMONIC("not Ev");
+            IEMOP_MNEMONIC(not_Ev, "not Ev");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_not);
         case 3:
-            IEMOP_MNEMONIC("neg Ev");
+            IEMOP_MNEMONIC(neg_Ev, "neg Ev");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_neg);
         case 4:
-            IEMOP_MNEMONIC("mul Ev");
+            IEMOP_MNEMONIC(mul_Ev, "mul Ev");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_mul);
         case 5:
-            IEMOP_MNEMONIC("imul Ev");
+            IEMOP_MNEMONIC(imul_Ev, "imul Ev");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_imul);
         case 6:
-            IEMOP_MNEMONIC("div Ev");
+            IEMOP_MNEMONIC(div_Ev, "div Ev");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_div);
         case 7:
-            IEMOP_MNEMONIC("idiv Ev");
+            IEMOP_MNEMONIC(idiv_Ev, "idiv Ev");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
             return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEv, bRm, &g_iemAImpl_idiv);
@@ -17575 +17629 @@
 FNIEMOP_DEF(iemOp_clc)
 {
-    IEMOP_MNEMONIC("clc");
+    IEMOP_MNEMONIC(clc, "clc");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0, 0);
@@ -17588 +17642 @@
 FNIEMOP_DEF(iemOp_stc)
 {
-    IEMOP_MNEMONIC("stc");
+    IEMOP_MNEMONIC(stc, "stc");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0, 0);
@@ -17601 +17655 @@
 FNIEMOP_DEF(iemOp_cli)
 {
-    IEMOP_MNEMONIC("cli");
+    IEMOP_MNEMONIC(cli, "cli");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_cli);
@@ -17609 +17663 @@
 FNIEMOP_DEF(iemOp_sti)
 {
-    IEMOP_MNEMONIC("sti");
+    IEMOP_MNEMONIC(sti, "sti");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_0(iemCImpl_sti);
@@ -17618 +17672 @@
 FNIEMOP_DEF(iemOp_cld)
 {
-    IEMOP_MNEMONIC("cld");
+    IEMOP_MNEMONIC(cld, "cld");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0, 0);
@@ -17631 +17685 @@
 FNIEMOP_DEF(iemOp_std)
 {
-    IEMOP_MNEMONIC("std");
+    IEMOP_MNEMONIC(std, "std");
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_BEGIN(0, 0);
@@ -17648 +17702 @@
     {
         case 0:
-            IEMOP_MNEMONIC("inc Ev");
+            IEMOP_MNEMONIC(inc_Eb, "inc Eb");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_inc);
         case 1:
-            IEMOP_MNEMONIC("dec Ev");
+            IEMOP_MNEMONIC(dec_Eb, "dec Eb");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEb, bRm, &g_iemAImpl_dec);
         default:
-            IEMOP_MNEMONIC("grp4-ud");
+            IEMOP_MNEMONIC(grp4_ud, "grp4-ud");
             return IEMOP_RAISE_INVALID_OPCODE();
     }
@@ -17666 +17720 @@
 FNIEMOP_DEF_1(iemOp_Grp5_calln_Ev, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("calln Ev");
+    IEMOP_MNEMONIC(calln_Ev, "calln Ev");
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
 
@@ -17818 +17872 @@
 FNIEMOP_DEF_1(iemOp_Grp5_callf_Ep, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("callf Ep");
+    IEMOP_MNEMONIC(callf_Ep, "callf Ep");
     return FNIEMOP_CALL_2(iemOpHlp_Grp5_far_Ep, bRm, iemCImpl_callf);
 }
@@ -17829 +17883 @@
 FNIEMOP_DEF_1(iemOp_Grp5_jmpn_Ev, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("jmpn Ev");
+    IEMOP_MNEMONIC(jmpn_Ev, "jmpn Ev");
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
 
@@ -17915 +17969 @@
 FNIEMOP_DEF_1(iemOp_Grp5_jmpf_Ep, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("jmpf Ep");
+    IEMOP_MNEMONIC(jmpf_Ep, "jmpf Ep");
     return FNIEMOP_CALL_2(iemOpHlp_Grp5_far_Ep, bRm, iemCImpl_FarJmp);
 }
@@ -17926 +17980 @@
 FNIEMOP_DEF_1(iemOp_Grp5_push_Ev, uint8_t, bRm)
 {
-    IEMOP_MNEMONIC("push Ev");
+    IEMOP_MNEMONIC(push_Ev, "push Ev");
 
     /* Registers are handled by a common worker. */
@@ -17984 +18038 @@
     {
         case 0:
-            IEMOP_MNEMONIC("inc Ev");
+            IEMOP_MNEMONIC(inc_Ev, "inc Ev");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_inc);
         case 1:
-            IEMOP_MNEMONIC("dec Ev");
+            IEMOP_MNEMONIC(dec_Ev, "dec Ev");
             return FNIEMOP_CALL_2(iemOpCommonUnaryEv, bRm, &g_iemAImpl_dec);
         case 2:
@@ -18000 +18054 @@
             return FNIEMOP_CALL_1(iemOp_Grp5_push_Ev, bRm);
         case 7:
-            IEMOP_MNEMONIC("grp5-ud");
+            IEMOP_MNEMONIC(grp5_ud, "grp5-ud");
             return IEMOP_RAISE_INVALID_OPCODE();
     }

trunk/src/VBox/VMM/VMMAll/MMAll.cpp

@@ -590 +590 @@
         TAG2STR(EM);
 
+        TAG2STR(IEM);
+
         TAG2STR(IOM);
         TAG2STR(IOM_STATS);

trunk/src/VBox/VMM/VMMR3/IEMR3.cpp

@@ -23 +23 @@
 #include <VBox/vmm/iem.h>
 #include <VBox/vmm/cpum.h>
+#include <VBox/vmm/mm.h>
 #include "IEMInternal.h"
 #include <VBox/vmm/vm.h>
@@ -114 +115 @@
                         "Data TLB physical revision",               "/IEM/CPU%u/DataTlb-PhysRev", idCpu);
 
+#ifdef VBOX_WITH_STATISTICS
+        /* Allocate instruction statistics and register them. */
+        pVCpu->iem.s.pStatsR3 = (PIEMINSTRSTATS)MMR3HeapAllocZ(pVM, MM_TAG_IEM, sizeof(IEMINSTRSTATS));
+        AssertLogRelReturn(pVCpu->iem.s.pStatsR3, VERR_NO_MEMORY);
+        int rc = MMHyperAlloc(pVM, sizeof(IEMINSTRSTATS), sizeof(uint64_t), MM_TAG_IEM, (void **)&pVCpu->iem.s.pStatsCCR3);
+        AssertLogRelRCReturn(rc, rc);
+        pVCpu->iem.s.pStatsR0 = MMHyperR3ToR0(pVM, pVCpu->iem.s.pStatsCCR3);
+        pVCpu->iem.s.pStatsRC = MMHyperR3ToR0(pVM, pVCpu->iem.s.pStatsCCR3);
+# define IEM_DO_INSTR_STAT(a_Name, a_szDesc) \
+            STAMR3RegisterF(pVM, &pVCpu->iem.s.pStatsCCR3->a_Name, STAMTYPE_U32_RESET, STAMVISIBILITY_USED, \
+                            STAMUNIT_COUNT, a_szDesc, "/IEM/CPU%u/r0-rc-Instr/" #a_Name, idCpu); \
+            STAMR3RegisterF(pVM, &pVCpu->iem.s.pStatsR3->a_Name, STAMTYPE_U32_RESET, STAMVISIBILITY_USED, \
+                            STAMUNIT_COUNT, a_szDesc, "/IEM/CPU%u/r3-Instr/" #a_Name, idCpu);
+# include "IEMInstructionStatisticsTmpl.h"
+# undef IEM_DO_INSTR_STAT
+#endif
 
         /*
@@ -169 +186 @@
 {
     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
+    {
         pVM->aCpus[idCpu].iem.s.pCtxRC = VM_RC_ADDR(pVM, pVM->aCpus[idCpu].iem.s.pCtxR3);
+        if (pVM->aCpus[idCpu].iem.s.pStatsRC)
+            pVM->aCpus[idCpu].iem.s.pStatsRC = MMHyperR3ToRC(pVM, pVM->aCpus[idCpu].iem.s.pStatsCCR3);
+    }
 }
 

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -67 +67 @@
 //#define IEM_WITH_CODE_TLB// - work in progress
 
+
+#ifndef IN_TSTVMSTRUCT
+/** Instruction statistics.   */
+typedef struct IEMINSTRSTATS
+{
+# define IEM_DO_INSTR_STAT(a_Name, a_szDesc) uint32_t a_Name;
+# include "IEMInstructionStatisticsTmpl.h"
+# undef IEM_DO_INSTR_STAT
+} IEMINSTRSTATS;
+#else
+struct IEMINSTRSTATS;
+typedef struct IEMINSTRSTATS IEMINSTRSTATS;
+#endif
+/** Pointer to IEM instruction statistics. */
+typedef IEMINSTRSTATS *PIEMINSTRSTATS;
 
 /** Finish and move to types.h */
@@ -681 +696 @@
     /** Pointer to the CPU context - raw-mode context. */
     RCPTRTYPE(PCPUMCTX)     pCtxRC;
-    /** Alignment padding. */
-    RTRCPTR                 uAlignment9;
+
+    /** Pointer to instruction statistics for raw-mode context (same as R0). */
+    RCPTRTYPE(PIEMINSTRSTATS) pStatsRC;
+    /** Pointer to instruction statistics for ring-0 context (same as RC). */
+    R0PTRTYPE(PIEMINSTRSTATS) pStatsR0;
+    /** Pointer to instruction statistics for non-ring-3 code. */
+    R3PTRTYPE(PIEMINSTRSTATS) pStatsCCR3;
+    /** Pointer to instruction statistics for ring-3 context. */
+    R3PTRTYPE(PIEMINSTRSTATS) pStatsR3;
 
 #ifdef IEM_VERIFICATION_MODE_FULL

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -27 +27 @@
 #include <VBox/err.h>
 #include <VBox/log.h>
+#define IN_TSTVMSTRUCT 1
 #include "../include/IEMInternal.h"
 #include <VBox/vmm/vm.h>
@@ -126 +127 @@
 #define IEMOP_RAISE_INVALID_OPCODE()                        VERR_TRPM_ACTIVE_TRAP
 #define IEMOP_RAISE_INVALID_LOCK_PREFIX()                   VERR_TRPM_ACTIVE_TRAP
-#define IEMOP_MNEMONIC(a_szMnemonic)                        do { } while (0)
-#define IEMOP_MNEMONIC2(a_szMnemonic, a_szOps)              do { } while (0)
+#define IEMOP_MNEMONIC(a_Stats, a_szMnemonic)               do { } while (0)
 #define IEMOP_BITCH_ABOUT_STUB()                            do { } while (0)
 #define FNIEMOP_STUB(a_Name) \

trunk/src/VBox/VMM/testcase/tstVMStructDTrace.cpp

@@ -22 +22 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define IN_TSTVMSTRUCT 1
 #define IN_TSTVMSTRUCTGC 1
 #include <VBox/vmm/cfgm.h>

trunk/src/VBox/VMM/testcase/tstVMStructRC.cpp

@@ -50 +50 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define IN_TSTVMSTRUCT 1
 #define IN_TSTVMSTRUCTGC 1
 #include <VBox/vmm/cfgm.h>

trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

@@ -22 +22 @@
 *   Header Files                                                                                                                 *
 *********************************************************************************************************************************/
+#define IN_TSTVMSTRUCT 1
 #include <VBox/vmm/cfgm.h>
 #include <VBox/vmm/cpum.h>