Changeset 64596 in vbox for trunk/src/VBox/VMM/VMMRC
- Timestamp:
- Nov 8, 2016 3:03:18 PM (8 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp
r64378 r64596 46 46 extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp; 47 47 extern DECLEXPORT(const PDMPICHLPRC) g_pdmRCPicHlp; 48 extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp;49 48 extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp; 50 49 extern DECLEXPORT(const PDMPCIHLPRC) g_pdmRCPciHlp; … … 510 509 511 510 512 513 514 /** @name APIC RC Helpers515 * @{516 */517 518 /** @interface_method_impl{PDMAPICHLPRC,pfnSetInterruptFF} */519 static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)520 {521 PDMDEV_ASSERT_DEVINS(pDevIns);522 PVM pVM = pDevIns->Internal.s.pVMRC;523 PVMCPU pVCpu = &pVM->aCpus[idCpu];524 525 AssertReturnVoid(idCpu < pVM->cCpus);526 527 LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",528 pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));529 switch (enmType)530 {531 case PDMAPICIRQ_UPDATE_PENDING:532 VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);533 break;534 case PDMAPICIRQ_HARDWARE:535 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);536 break;537 case PDMAPICIRQ_NMI:538 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);539 break;540 case PDMAPICIRQ_SMI:541 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);542 break;543 case PDMAPICIRQ_EXTINT:544 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);545 break;546 default:547 AssertMsgFailed(("enmType=%d\n", enmType));548 break;549 }550 }551 552 553 /** @interface_method_impl{PDMAPICHLPRC,pfnClearInterruptFF} */554 static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)555 {556 PDMDEV_ASSERT_DEVINS(pDevIns);557 PVM pVM = pDevIns->Internal.s.pVMRC;558 PVMCPU pVCpu = &pVM->aCpus[idCpu];559 560 AssertReturnVoid(idCpu < pVM->cCpus);561 562 LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",563 pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));564 565 /* Note: NMI/SMI can't be cleared. */566 switch (enmType)567 {568 case PDMAPICIRQ_HARDWARE:569 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);570 break;571 case PDMAPICIRQ_EXTINT:572 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);573 break;574 case PDMAPICIRQ_UPDATE_PENDING:575 VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);576 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC);577 break;578 default:579 AssertMsgFailed(("enmType=%d\n", enmType));580 break;581 }582 }583 584 585 /** @interface_method_impl{PDMAPICHLPRC,pfnBusBroadcastEoi} */586 static DECLCALLBACK(int) pdmRCApicHlp_BusBroadcastEoi(PPDMDEVINS pDevIns, uint8_t u8Vector)587 {588 /* pfnSetEoi will be NULL in the old IOAPIC code as it's not implemented. */589 #ifdef VBOX_WITH_NEW_IOAPIC590 PDMDEV_ASSERT_DEVINS(pDevIns);591 PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);592 593 /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having594 multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */595 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))596 {597 Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));598 return pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Vector);599 }600 #endif601 return VINF_SUCCESS;602 }603 604 605 /** @interface_method_impl{PDMAPICHLPRC,pfnCalcIrqTag} */606 static DECLCALLBACK(uint32_t) pdmRCApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)607 {608 PDMDEV_ASSERT_DEVINS(pDevIns);609 PVM pVM = pDevIns->Internal.s.pVMRC;610 611 pdmLock(pVM);612 613 uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);614 if (u8Level == PDM_IRQ_LEVEL_HIGH)615 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));616 else617 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));618 619 620 pdmUnlock(pVM);621 LogFlow(("pdmRCApicHlp_CalcIrqTag: caller=%p/%d: returns %#x (u8Level=%d)\n",622 pDevIns, pDevIns->iInstance, uTagSrc, u8Level));623 return uTagSrc;624 }625 626 627 /** @interface_method_impl{PDMAPICHLPRC,pfnLock} */628 static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc)629 {630 PDMDEV_ASSERT_DEVINS(pDevIns);631 return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);632 }633 634 635 /** @interface_method_impl{PDMAPICHLPRC,pfnUnlock} */636 static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns)637 {638 PDMDEV_ASSERT_DEVINS(pDevIns);639 pdmUnlock(pDevIns->Internal.s.pVMRC);640 }641 642 643 /** @interface_method_impl{PDMAPICHLPRC,pfnGetCpuId} */644 static DECLCALLBACK(VMCPUID) pdmRCApicHlp_GetCpuId(PPDMDEVINS pDevIns)645 {646 PDMDEV_ASSERT_DEVINS(pDevIns);647 return VMMGetCpuId(pDevIns->Internal.s.pVMRC);648 }649 650 651 /**652 * The Raw-Mode Context APIC Helper Callbacks.653 */654 extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp =655 {656 PDM_APICHLPRC_VERSION,657 pdmRCApicHlp_SetInterruptFF,658 pdmRCApicHlp_ClearInterruptFF,659 pdmRCApicHlp_BusBroadcastEoi,660 pdmRCApicHlp_CalcIrqTag,661 pdmRCApicHlp_Lock,662 pdmRCApicHlp_Unlock,663 pdmRCApicHlp_GetCpuId,664 PDM_APICHLPRC_VERSION665 };666 667 /** @} */668 669 670 671 672 511 /** @name I/O APIC RC Helpers 673 512 * @{
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