Index: trunk/src/VBox/Devices/testcase/tstDeviceStructSize.cpp
===================================================================
--- trunk/src/VBox/Devices/testcase/tstDeviceStructSize.cpp	(revision 64595)
+++ trunk/src/VBox/Devices/testcase/tstDeviceStructSize.cpp	(revision 64596)
@@ -291,7 +291,5 @@
 #ifdef VBOX_WITH_NEW_APIC
     CHECK_MEMBER_ALIGNMENT(APICDEV, pDevInsR0, 8);
-    CHECK_MEMBER_ALIGNMENT(APICDEV, pCritSectR0, 8);
     CHECK_MEMBER_ALIGNMENT(APICDEV, pDevInsRC, 8);
-    CHECK_MEMBER_ALIGNMENT(APICDEV, pCritSectRC, 8);
 #else
 # ifdef VBOX_WITH_STATISTICS
Index: trunk/src/VBox/VMM/VMMAll/APICAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/APICAll.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMAll/APICAll.cpp	(revision 64596)
@@ -23,5 +23,8 @@
 #include "APICInternal.h"
 #include <VBox/vmm/pdmdev.h>
+#include <VBox/vmm/pdmapi.h>
+#include <VBox/vmm/rem.h>
 #include <VBox/vmm/vm.h>
+#include <VBox/vmm/vmm.h>
 #include <VBox/vmm/vmcpuset.h>
 
@@ -471,18 +474,4 @@
     uint8_t *pbXApic = (uint8_t *)pXApicPage;
     *(uint32_t *)(pbXApic + offReg) = uReg;
-}
-
-
-/**
- * Broadcasts the EOI to the I/O APICs.
- *
- * @param   pVCpu           The cross context virtual CPU structure.
- * @param   uVector         The interrupt vector corresponding to the EOI.
- */
-DECLINLINE(int) apicBusBroadcastEoi(PVMCPU pVCpu, uint8_t uVector)
-{
-    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
-    PAPICDEV pApicDev = VM_TO_APICDEV(pVM);
-    return pApicDev->CTX_SUFF(pApicHlp)->pfnBusBroadcastEoi(pApicDev->CTX_SUFF(pDevIns), uVector);
 }
 
@@ -1265,5 +1254,5 @@
         if (fLevelTriggered)
         {
-            int rc = apicBusBroadcastEoi(pVCpu, uVector);
+            int rc = PDMIoApicBroadcastEoi(pVCpu->CTX_SUFF(pVM), uVector);
             if (rc == VINF_SUCCESS)
             { /* likely */ }
@@ -2682,7 +2671,49 @@
 VMM_INT_DECL(void) apicSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
 {
-    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
-    PAPICDEV pApicDev = VM_TO_APICDEV(pVM);
-    CTX_SUFF(pApicDev->pApicHlp)->pfnSetInterruptFF(pApicDev->CTX_SUFF(pDevIns), enmType, pVCpu->idCpu);
+    switch (enmType)
+    {
+        case PDMAPICIRQ_HARDWARE:
+            VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
+            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
+            break;
+        case PDMAPICIRQ_UPDATE_PENDING: VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);    break;
+        case PDMAPICIRQ_NMI:            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);  break;
+        case PDMAPICIRQ_SMI:            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);  break;
+        case PDMAPICIRQ_EXTINT:         VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);  break;
+        default:
+            AssertMsgFailed(("enmType=%d\n", enmType));
+            break;
+    }
+
+    /*
+     * We need to wake up the target CPU if we're not on EMT.
+     */
+#if defined(IN_RING0)
+    PVM     pVM   = pVCpu->CTX_SUFF(pVM);
+    VMCPUID idCpu = pVCpu->idCpu;
+    if (   enmType != PDMAPICIRQ_HARDWARE
+        && VMMGetCpuId(pVM) != idCpu)
+    {
+        switch (VMCPU_GET_STATE(pVCpu))
+        {
+            case VMCPUSTATE_STARTED_EXEC:
+                GVMMR0SchedPokeEx(pVM, idCpu, false /* fTakeUsedLock */);
+                break;
+
+            case VMCPUSTATE_STARTED_HALTED:
+                GVMMR0SchedWakeUpEx(pVM, idCpu, false /* fTakeUsedLock */);
+                break;
+
+            default:
+                break; /* nothing to do in other states. */
+        }
+    }
+#elif defined(IN_RING3)
+# ifdef VBOX_WITH_REM
+    REMR3NotifyInterruptSet(pVCpu->CTX_SUFF(pVM), pVCpu);
+# endif
+    if (enmType != PDMAPICIRQ_HARDWARE)
+        VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
+#endif
 }
 
@@ -2696,7 +2727,17 @@
 VMM_INT_DECL(void) apicClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType)
 {
-    PVM      pVM      = pVCpu->CTX_SUFF(pVM);
-    PAPICDEV pApicDev = VM_TO_APICDEV(pVM);
-    pApicDev->CTX_SUFF(pApicHlp)->pfnClearInterruptFF(pApicDev->CTX_SUFF(pDevIns), enmType, pVCpu->idCpu);
+    /* NMI/SMI can't be cleared. */
+    switch (enmType)
+    {
+        case PDMAPICIRQ_HARDWARE:   VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC); break;
+        case PDMAPICIRQ_EXTINT:     VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);  break;
+        default:
+            AssertMsgFailed(("enmType=%d\n", enmType));
+            break;
+    }
+
+#if defined(IN_RING3) && defined(VBOX_WITH_REM)
+    REMR3NotifyInterruptClear(pVCpu->CTX_SUFF(pVM), pVCpu);
+#endif
 }
 
Index: trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/PDMAll.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMAll/PDMAll.cpp	(revision 64596)
@@ -207,4 +207,27 @@
 }
 
+
+/**
+ * Broadcasts an EOI to the I/O APICs.
+ *
+ * @return VBox status code (incl. scheduling status codes).
+ * @param   pVCpu           The cross context virtual CPU structure.
+ * @param   uVector         The interrupt vector corresponding to the EOI.
+ */
+VMM_INT_DECL(int) PDMIoApicBroadcastEoi(PVM pVM, uint8_t uVector)
+{
+    /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having
+       multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */
+    if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
+    {
+        Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));
+        return pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), uVector);
+    }
+
+    /* We shouldn't return failure if no I/O APIC is present. */
+    return VINF_SUCCESS;
+}
+
+
 /**
  * Send a MSI to an I/O APIC.
Index: trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp	(revision 64596)
@@ -48,5 +48,4 @@
 extern DECLEXPORT(const PDMDEVHLPR0)    g_pdmR0DevHlp;
 extern DECLEXPORT(const PDMPICHLPR0)    g_pdmR0PicHlp;
-extern DECLEXPORT(const PDMAPICHLPR0)   g_pdmR0ApicHlp;
 extern DECLEXPORT(const PDMIOAPICHLPR0) g_pdmR0IoApicHlp;
 extern DECLEXPORT(const PDMPCIHLPR0)    g_pdmR0PciHlp;
@@ -525,191 +524,4 @@
 
 
-
-
-/** @name APIC Ring-0 Helpers
- * @{
- */
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnSetInterruptFF} */
-static DECLCALLBACK(void) pdmR0ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM    pVM   = pDevIns->Internal.s.pVMR0;
-    PVMCPU pVCpu = &pVM->aCpus[idCpu];
-
-    AssertReturnVoid(idCpu < pVM->cCpus);
-
-    LogFlow(("pdmR0ApicHlp_SetInterruptFF: CPU%d=caller=%p/%d: VM_FF_INTERRUPT %d -> 1 (CPU%d)\n",
-             VMMGetCpuId(pVM), pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC), idCpu));
-
-    switch (enmType)
-    {
-        case PDMAPICIRQ_UPDATE_PENDING:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);
-            break;
-        case PDMAPICIRQ_HARDWARE:
-#ifdef VBOX_WITH_NEW_APIC
-            VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
-#endif
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
-            break;
-        case PDMAPICIRQ_NMI:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
-            break;
-        case PDMAPICIRQ_SMI:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
-            break;
-        case PDMAPICIRQ_EXTINT:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
-            break;
-        default:
-            AssertMsgFailed(("enmType=%d\n", enmType));
-            break;
-    }
-
-    /* We need to wake up the target CPU. */
-    if (
-#ifdef VBOX_WITH_NEW_APIC
-        /* We are already on EMT if enmType is PDMAPICIRQ_HARDWARE. Don't bother with poking! */
-        enmType != PDMAPICIRQ_HARDWARE &&
-#endif
-        VMMGetCpuId(pVM) != idCpu)
-    {
-        switch (VMCPU_GET_STATE(pVCpu))
-        {
-            case VMCPUSTATE_STARTED_EXEC:
-                GVMMR0SchedPokeEx(pVM, pVCpu->idCpu, false /* don't take the used lock */);
-                break;
-
-            case VMCPUSTATE_STARTED_HALTED:
-                GVMMR0SchedWakeUpEx(pVM, pVCpu->idCpu, false /* don't take the used lock */);
-                break;
-
-            default:
-                break; /* nothing to do in other states. */
-        }
-    }
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnClearInterruptFF} */
-static DECLCALLBACK(void) pdmR0ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM    pVM   = pDevIns->Internal.s.pVMR0;
-    PVMCPU pVCpu = &pVM->aCpus[idCpu];
-
-    AssertReturnVoid(idCpu < pVM->cCpus);
-
-    LogFlow(("pdmR0ApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
-             pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
-
-    /* Note: NMI/SMI can't be cleared. */
-    switch (enmType)
-    {
-        case PDMAPICIRQ_HARDWARE:
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
-            break;
-        case PDMAPICIRQ_EXTINT:
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
-            break;
-        case PDMAPICIRQ_UPDATE_PENDING:
-            VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC);
-            break;
-        default:
-            AssertMsgFailed(("enmType=%d\n", enmType));
-            break;
-    }
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnBusBroadcastEoi} */
-static DECLCALLBACK(int) pdmR0ApicHlp_BusBroadcastEoi(PPDMDEVINS pDevIns, uint8_t u8Vector)
-{
-    /* pfnSetEoi will be NULL in the old IOAPIC code as it's not implemented. */
-#ifdef VBOX_WITH_NEW_IOAPIC
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
-
-    /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having
-       multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */
-    if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
-    {
-        Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));
-        return pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Vector);
-    }
-#endif
-    return VINF_SUCCESS;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnCalcIrqTag} */
-static DECLCALLBACK(uint32_t) pdmR0ApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR0;
-
-    pdmLock(pVM);
-
-    uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
-    if (u8Level == PDM_IRQ_LEVEL_HIGH)
-        VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
-    else
-        VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
-
-
-    pdmUnlock(pVM);
-    LogFlow(("pdmR0ApicHlp_CalcIrqTag: caller=%p/%d: returns %#x (u8Level=%d)\n",
-             pDevIns, pDevIns->iInstance, uTagSrc, u8Level));
-    return uTagSrc;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnLock} */
-static DECLCALLBACK(int) pdmR0ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    return pdmLockEx(pDevIns->Internal.s.pVMR0, rc);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnUnlock} */
-static DECLCALLBACK(void) pdmR0ApicHlp_Unlock(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    pdmUnlock(pDevIns->Internal.s.pVMR0);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR0,pfnGetCpuId} */
-static DECLCALLBACK(VMCPUID) pdmR0ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    return VMMGetCpuId(pDevIns->Internal.s.pVMR0);
-}
-
-
-/**
- * The Ring-0 APIC Helper Callbacks.
- */
-extern DECLEXPORT(const PDMAPICHLPR0) g_pdmR0ApicHlp =
-{
-    PDM_APICHLPR0_VERSION,
-    pdmR0ApicHlp_SetInterruptFF,
-    pdmR0ApicHlp_ClearInterruptFF,
-    pdmR0ApicHlp_BusBroadcastEoi,
-    pdmR0ApicHlp_CalcIrqTag,
-    pdmR0ApicHlp_Lock,
-    pdmR0ApicHlp_Unlock,
-    pdmR0ApicHlp_GetCpuId,
-    PDM_APICHLPR0_VERSION
-};
-
-/** @} */
-
-
-
-
 /** @name I/O APIC Ring-0 Helpers
  * @{
Index: trunk/src/VBox/VMM/VMMR3/APIC.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/APIC.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMR3/APIC.cpp	(revision 64596)
@@ -250,4 +250,35 @@
 
 /**
+ * Sets the CPUID feature bits for the APIC mode.
+ *
+ * @param   pVM             The cross context VM structure.
+ * @param   enmMode         The APIC mode.
+ */
+static void apicR3SetCpuIdFeatureLevel(PVM pVM, PDMAPICMODE enmMode)
+{
+    switch (enmMode)
+    {
+        case PDMAPICMODE_NONE:
+            CPUMR3ClearGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_X2APIC);
+            CPUMR3ClearGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_APIC);
+            break;
+
+        case PDMAPICMODE_APIC:
+            CPUMR3ClearGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_X2APIC);
+            CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_APIC);
+            break;
+
+        case PDMAPICMODE_X2APIC:
+            CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_APIC);
+            CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_X2APIC);
+            break;
+
+        default:
+            AssertMsgFailed(("Unknown/invalid APIC mode: %d\n", (int)enmMode));
+    }
+}
+
+
+/**
  * Resets the APIC base MSR.
  *
@@ -1076,21 +1107,4 @@
 }
 
-#if 0 /** @todo not referenced and will cause assertion in apicR3LoadExec (VERR_WRONG_ORDER). */
-/**
- * @copydoc FNSSMDEVLIVEEXEC
- */
-static DECLCALLBACK(int) apicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
-{
-    PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV);
-    PVM      pVM      = PDMDevHlpGetVM(pApicDev->pDevInsR3);
-    RT_NOREF1(uPass);
-
-    LogFlow(("APIC: apicR3LiveExec: uPass=%u\n", uPass));
-
-    int rc = apicR3SaveVMData(pVM, pSSM);
-    AssertRCReturn(rc, rc);
-    return VINF_SSM_DONT_CALL_AGAIN;
-}
-#endif
 
 /**
@@ -1345,7 +1359,5 @@
     LogFlow(("APIC: apicR3Relocate: pVM=%p pDevIns=%p offDelta=%RGi\n", pVM, pDevIns, offDelta));
 
-    pApicDev->pDevInsRC   = PDMDEVINS_2_RCPTR(pDevIns);
-    pApicDev->pApicHlpRC  = pApicDev->pApicHlpR3->pfnGetRCHelpers(pDevIns);
-    pApicDev->pCritSectRC = pApicDev->pApicHlpR3->pfnGetRCCritSect(pDevIns);
+    pApicDev->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
 
     pApic->pApicDevRC   = PDMINS_2_DATA_RCPTR(pDevIns);
@@ -1654,10 +1666,8 @@
     {
         case PDMAPICMODE_NONE:
-#if 1
             /** @todo permanently disabling the APIC won't really work (needs
              *        fixing in HM, CPUM, PDM and possibly other places). See
              *        @bugref{8353}. */
             return VMR3SetError(pVM->pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS, "APIC mode 'none' is not supported yet.");
-#endif
         case PDMAPICMODE_APIC:
         case PDMAPICMODE_X2APIC:
@@ -1720,7 +1730,6 @@
     }
 
-    rc = PDMDevHlpAPICRegister(pDevIns, &ApicReg, &pApicDev->pApicHlpR3);
+    rc = PDMDevHlpAPICRegister(pDevIns, &ApicReg);
     AssertLogRelRCReturn(rc, rc);
-    pApicDev->pCritSectR3 = pApicDev->pApicHlpR3->pfnGetR3CritSect(pDevIns);
 
     /*
@@ -1741,5 +1750,5 @@
 
     /* Tell CPUM about the APIC feature level so it can adjust APICBASE MSR GP mask and CPUID bits. */
-    pApicDev->pApicHlpR3->pfnSetFeatureLevel(pDevIns, pApic->enmMaxMode);
+    apicR3SetCpuIdFeatureLevel(pVM, pApic->enmMaxMode);
 
     /* Initialize the state. */
@@ -1761,6 +1770,4 @@
     if (pApic->fRZEnabled)
     {
-        pApicDev->pApicHlpRC  = pApicDev->pApicHlpR3->pfnGetRCHelpers(pDevIns);
-        pApicDev->pCritSectRC = pApicDev->pApicHlpR3->pfnGetRCCritSect(pDevIns);
         rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTRCPTR /*pvUser*/,
                                      "apicWriteMmio", "apicReadMmio");
@@ -1768,6 +1775,4 @@
             return rc;
 
-        pApicDev->pApicHlpR0  = pApicDev->pApicHlpR3->pfnGetR0Helpers(pDevIns);
-        pApicDev->pCritSectR0 = pApicDev->pApicHlpR3->pfnGetR0CritSect(pDevIns);
         rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTR0PTR /*pvUser*/,
                                      "apicWriteMmio", "apicReadMmio");
Index: trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp	(revision 64596)
@@ -2845,5 +2845,5 @@
 
 /** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
-static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
+static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg)
 {
     PDMDEV_ASSERT_DEVINS(pDevIns);
@@ -2851,10 +2851,10 @@
     LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseMsrR3=%p, .pfnGetBaseMsrR3=%p, "
              ".pfnSetTprR3=%p, .pfnGetTprR3=%p, .pfnWriteMsr3=%p, .pfnReadMsr3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p .pfnGetTimerFreqR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseMsrRC=%p:{%s}, pszGetBaseMsrRC=%p:{%s}, "
-             ".pszSetTprRC=%p:{%s}, .pszGetTprRC=%p:{%s}, .pszWriteMsrRC=%p:{%s}, .pszReadMsrRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}, .pszGetTimerFreqRC=%p:{%s}} ppApicHlpR3=%p\n",
+             ".pszSetTprRC=%p:{%s}, .pszGetTprRC=%p:{%s}, .pszWriteMsrRC=%p:{%s}, .pszReadMsrRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}, .pszGetTimerFreqRC=%p:{%s}}\n",
              pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseMsrR3,
              pApicReg->pfnGetBaseMsrR3, pApicReg->pfnSetTprR3, pApicReg->pfnGetTprR3, pApicReg->pfnWriteMsrR3, pApicReg->pfnReadMsrR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pfnGetTimerFreqR3, pApicReg->pszGetInterruptRC,
              pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseMsrRC, pApicReg->pszSetBaseMsrRC, pApicReg->pszGetBaseMsrRC, pApicReg->pszGetBaseMsrRC,
              pApicReg->pszSetTprRC, pApicReg->pszSetTprRC, pApicReg->pszGetTprRC, pApicReg->pszGetTprRC, pApicReg->pszWriteMsrRC, pApicReg->pszWriteMsrRC, pApicReg->pszReadMsrRC, pApicReg->pszReadMsrRC, pApicReg->pszBusDeliverRC,
-             pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, pApicReg->pszGetTimerFreqRC, pApicReg->pszGetTimerFreqRC, ppApicHlpR3));
+             pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, pApicReg->pszGetTimerFreqRC, pApicReg->pszGetTimerFreqRC));
 
     /*
@@ -2961,10 +2961,4 @@
         return VERR_INVALID_PARAMETER;
     }
-    if (!ppApicHlpR3)
-    {
-        Assert(ppApicHlpR3);
-        LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
-        return VERR_INVALID_PARAMETER;
-    }
 
     /*
@@ -3145,6 +3139,4 @@
     Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
 
-    /* set the helper pointer and return. */
-    *ppApicHlpR3 = &g_pdmR3DevApicHlp;
     LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
     return VINF_SUCCESS;
@@ -3427,5 +3419,5 @@
     {
         Assert(ppPciRawHlpR3);
-        LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
+        LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppPciRawHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
         return VERR_INVALID_PARAMETER;
     }
Index: trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp	(revision 64596)
@@ -178,285 +178,4 @@
 
 
-
-
-/** @name R3 APIC Helpers
- * @{
- */
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnSetInterruptFF} */
-static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    PVMCPU pVCpu = &pVM->aCpus[idCpu];
-
-    AssertReturnVoid(idCpu < pVM->cCpus);
-
-    LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_APIC(%d) %d -> 1\n",
-             pDevIns->pReg->szName, pDevIns->iInstance, idCpu, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
-
-    switch (enmType)
-    {
-        case PDMAPICIRQ_UPDATE_PENDING:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);
-            break;
-        case PDMAPICIRQ_HARDWARE:
-#ifdef VBOX_WITH_NEW_APIC
-            VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
-#endif
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
-            break;
-        case PDMAPICIRQ_NMI:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
-            break;
-        case PDMAPICIRQ_SMI:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
-            break;
-        case PDMAPICIRQ_EXTINT:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
-            break;
-        default:
-            AssertMsgFailed(("enmType=%d\n", enmType));
-            break;
-    }
-#ifdef VBOX_WITH_REM
-    REMR3NotifyInterruptSet(pVM, pVCpu);
-#endif
-
-#ifdef VBOX_WITH_NEW_APIC
-    if (enmType != PDMAPICIRQ_HARDWARE)
-        VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
-#else
-    VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
-#endif
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnClearInterruptFF} */
-static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    PVMCPU pVCpu = &pVM->aCpus[idCpu];
-
-    AssertReturnVoid(idCpu < pVM->cCpus);
-
-    LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_APIC(%d) %d -> 0\n",
-             pDevIns->pReg->szName, pDevIns->iInstance, idCpu, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
-
-    /* Note: NMI/SMI can't be cleared. */
-    switch (enmType)
-    {
-        case PDMAPICIRQ_HARDWARE:
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
-            break;
-        case PDMAPICIRQ_EXTINT:
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
-            break;
-        case PDMAPICIRQ_UPDATE_PENDING:
-            VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC);
-            break;
-        default:
-            AssertMsgFailed(("enmType=%d\n", enmType));
-            break;
-    }
-#ifdef VBOX_WITH_REM
-    REMR3NotifyInterruptClear(pVM, pVCpu);
-#endif
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnBusBroadcastEoi} */
-static DECLCALLBACK(int) pdmR3ApicHlp_BusBroadcastEoi(PPDMDEVINS pDevIns, uint8_t u8Vector)
-{
-    /* pfnSetEoi will be NULL in the old IOAPIC code as it's not implemented. */
-#ifdef VBOX_WITH_NEW_IOAPIC
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
-
-    /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having
-       multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */
-    if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
-    {
-        Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));
-        return pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Vector);
-    }
-#endif
-    return VINF_SUCCESS;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnCalcIrqTag} */
-static DECLCALLBACK(uint32_t) pdmR3ApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    Assert(u8Level == PDM_IRQ_LEVEL_HIGH || u8Level == PDM_IRQ_LEVEL_FLIP_FLOP);
-
-    pdmLock(pVM);
-
-    uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
-    if (u8Level == PDM_IRQ_LEVEL_HIGH)
-        VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
-    else
-        VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
-
-
-    pdmUnlock(pVM);
-    LogFlow(("pdmR3ApicHlp_CalcIrqTag: caller='%s'/%d: returns %#x (u8Level=%d)\n",
-             pDevIns->pReg->szName, pDevIns->iInstance, uTagSrc, u8Level));
-    return uTagSrc;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnSetFeatureLevel} */
-static DECLCALLBACK(void) pdmR3ApicHlp_SetFeatureLevel(PPDMDEVINS pDevIns, PDMAPICMODE enmMode)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    LogFlow(("pdmR3ApicHlp_SetFeatureLevel: caller='%s'/%d: mode=%d\n",
-             pDevIns->pReg->szName, pDevIns->iInstance, (int)enmMode));
-    switch (enmMode)
-    {
-        case PDMAPICMODE_NONE:
-            CPUMR3ClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
-            CPUMR3ClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
-            break;
-        case PDMAPICMODE_APIC:
-            CPUMR3ClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
-            CPUMR3SetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
-            break;
-        case PDMAPICMODE_X2APIC:
-            CPUMR3SetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
-            CPUMR3SetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
-            break;
-        default:
-            AssertMsgFailed(("Unknown APIC mode: %d\n", (int)enmMode));
-    }
-}
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnGetCpuId} */
-static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
-    return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnSendStartupIpi} */
-static DECLCALLBACK(void) pdmR3ApicHlp_SendStartupIpi(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
-    VMMR3SendStartupIpi(pDevIns->Internal.s.pVMR3, idCpu, uVector);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnSendInitIpi} */
-static DECLCALLBACK(void) pdmR3ApicHlp_SendInitIpi(PPDMDEVINS pDevIns, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
-    VMMR3SendInitIpi(pDevIns->Internal.s.pVMR3, idCpu);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnGetRCHelpers} */
-static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    VM_ASSERT_EMT(pVM);
-
-    RTRCPTR pRCHelpers = NIL_RTRCPTR;
-    if (!HMIsEnabled(pVM))
-    {
-        int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCApicHlp", &pRCHelpers);
-        AssertReleaseRC(rc);
-        AssertRelease(pRCHelpers);
-    }
-
-    LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
-             pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
-    return pRCHelpers;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnGetR0Helpers} */
-static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    VM_ASSERT_EMT(pVM);
-    PCPDMAPICHLPR0 pR0Helpers = 0;
-    int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
-    AssertReleaseRC(rc);
-    AssertRelease(pR0Helpers);
-    LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
-             pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
-    return pR0Helpers;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnGetR3CritSect} */
-static DECLCALLBACK(R3PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR3CritSect(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
-    return &pDevIns->Internal.s.pVMR3->pdm.s.CritSect;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnGetRCCritSect} */
-static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetRCCritSect(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    RTRCPTR RCPtr = MMHyperCCToRC(pVM, &pVM->pdm.s.CritSect);
-    LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, RCPtr));
-    return RCPtr;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPR3,pfnGetR3CritSect} */
-static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR0CritSect(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMR3;
-    RTR0PTR R0Ptr = MMHyperCCToR0(pVM, &pVM->pdm.s.CritSect);
-    LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, R0Ptr));
-    return R0Ptr;
-}
-
-
-
-/**
- * APIC Device Helpers.
- */
-const PDMAPICHLPR3 g_pdmR3DevApicHlp =
-{
-    PDM_APICHLPR3_VERSION,
-    pdmR3ApicHlp_SetInterruptFF,
-    pdmR3ApicHlp_ClearInterruptFF,
-    pdmR3ApicHlp_BusBroadcastEoi,
-    pdmR3ApicHlp_CalcIrqTag,
-    pdmR3ApicHlp_SetFeatureLevel,
-    pdmR3ApicHlp_GetCpuId,
-    pdmR3ApicHlp_SendStartupIpi,
-    pdmR3ApicHlp_SendInitIpi,
-    pdmR3ApicHlp_GetRCHelpers,
-    pdmR3ApicHlp_GetR0Helpers,
-    pdmR3ApicHlp_GetR3CritSect,
-    pdmR3ApicHlp_GetRCCritSect,
-    pdmR3ApicHlp_GetR0CritSect,
-    PDM_APICHLPR3_VERSION /* the end */
-};
-
-/** @} */
-
-
-
-
 /** @name Ring-3 I/O APIC Helpers
  * @{
Index: trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp	(revision 64595)
+++ trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp	(revision 64596)
@@ -46,5 +46,4 @@
 extern DECLEXPORT(const PDMDEVHLPRC)    g_pdmRCDevHlp;
 extern DECLEXPORT(const PDMPICHLPRC)    g_pdmRCPicHlp;
-extern DECLEXPORT(const PDMAPICHLPRC)   g_pdmRCApicHlp;
 extern DECLEXPORT(const PDMIOAPICHLPRC) g_pdmRCIoApicHlp;
 extern DECLEXPORT(const PDMPCIHLPRC)    g_pdmRCPciHlp;
@@ -510,164 +509,4 @@
 
 
-
-
-/** @name APIC RC Helpers
- * @{
- */
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnSetInterruptFF} */
-static DECLCALLBACK(void) pdmRCApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMRC;
-    PVMCPU pVCpu = &pVM->aCpus[idCpu];
-
-    AssertReturnVoid(idCpu < pVM->cCpus);
-
-    LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
-             pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
-    switch (enmType)
-    {
-        case PDMAPICIRQ_UPDATE_PENDING:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);
-            break;
-        case PDMAPICIRQ_HARDWARE:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
-            break;
-        case PDMAPICIRQ_NMI:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
-            break;
-        case PDMAPICIRQ_SMI:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
-            break;
-        case PDMAPICIRQ_EXTINT:
-            VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
-            break;
-        default:
-            AssertMsgFailed(("enmType=%d\n", enmType));
-            break;
-    }
-}
-
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnClearInterruptFF} */
-static DECLCALLBACK(void) pdmRCApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMRC;
-    PVMCPU pVCpu = &pVM->aCpus[idCpu];
-
-    AssertReturnVoid(idCpu < pVM->cCpus);
-
-    LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
-             pDevIns, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
-
-    /* Note: NMI/SMI can't be cleared. */
-    switch (enmType)
-    {
-        case PDMAPICIRQ_HARDWARE:
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
-            break;
-        case PDMAPICIRQ_EXTINT:
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
-            break;
-        case PDMAPICIRQ_UPDATE_PENDING:
-            VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
-            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC);
-            break;
-        default:
-            AssertMsgFailed(("enmType=%d\n", enmType));
-            break;
-    }
-}
-
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnBusBroadcastEoi} */
-static DECLCALLBACK(int) pdmRCApicHlp_BusBroadcastEoi(PPDMDEVINS pDevIns, uint8_t u8Vector)
-{
-    /* pfnSetEoi will be NULL in the old IOAPIC code as it's not implemented. */
-#ifdef VBOX_WITH_NEW_IOAPIC
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
-
-    /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having
-       multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */
-    if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
-    {
-        Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));
-        return pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Vector);
-    }
-#endif
-    return VINF_SUCCESS;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnCalcIrqTag} */
-static DECLCALLBACK(uint32_t) pdmRCApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    PVM pVM = pDevIns->Internal.s.pVMRC;
-
-    pdmLock(pVM);
-
-    uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
-    if (u8Level == PDM_IRQ_LEVEL_HIGH)
-        VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
-    else
-        VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
-
-
-    pdmUnlock(pVM);
-    LogFlow(("pdmRCApicHlp_CalcIrqTag: caller=%p/%d: returns %#x (u8Level=%d)\n",
-             pDevIns, pDevIns->iInstance, uTagSrc, u8Level));
-    return uTagSrc;
-}
-
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnLock} */
-static DECLCALLBACK(int) pdmRCApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnUnlock} */
-static DECLCALLBACK(void) pdmRCApicHlp_Unlock(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    pdmUnlock(pDevIns->Internal.s.pVMRC);
-}
-
-
-/** @interface_method_impl{PDMAPICHLPRC,pfnGetCpuId} */
-static DECLCALLBACK(VMCPUID) pdmRCApicHlp_GetCpuId(PPDMDEVINS pDevIns)
-{
-    PDMDEV_ASSERT_DEVINS(pDevIns);
-    return VMMGetCpuId(pDevIns->Internal.s.pVMRC);
-}
-
-
-/**
- * The Raw-Mode Context APIC Helper Callbacks.
- */
-extern DECLEXPORT(const PDMAPICHLPRC) g_pdmRCApicHlp =
-{
-    PDM_APICHLPRC_VERSION,
-    pdmRCApicHlp_SetInterruptFF,
-    pdmRCApicHlp_ClearInterruptFF,
-    pdmRCApicHlp_BusBroadcastEoi,
-    pdmRCApicHlp_CalcIrqTag,
-    pdmRCApicHlp_Lock,
-    pdmRCApicHlp_Unlock,
-    pdmRCApicHlp_GetCpuId,
-    PDM_APICHLPRC_VERSION
-};
-
-/** @} */
-
-
-
-
 /** @name I/O APIC RC Helpers
  * @{
Index: trunk/src/VBox/VMM/include/APICInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/APICInternal.h	(revision 64595)
+++ trunk/src/VBox/VMM/include/APICInternal.h	(revision 64596)
@@ -1151,8 +1151,4 @@
     /** The device instance - R3 Ptr. */
     PPDMDEVINSR3                pDevInsR3;
-    /** The APIC helpers - R3 Ptr. */
-    PCPDMAPICHLPR3              pApicHlpR3;
-    /** The PDM critical section - R3 Ptr. */
-    R3PTRTYPE(PPDMCRITSECT)     pCritSectR3;
     /** Alignment padding. */
     R3PTRTYPE(void *)           pvAlignment0;
@@ -1160,8 +1156,4 @@
     /** The device instance - R0 Ptr. */
     PPDMDEVINSR0                pDevInsR0;
-    /** The APIC helpers - R0 Ptr. */
-    PCPDMAPICHLPR0              pApicHlpR0;
-    /** The PDM critical section - R0 Ptr. */
-    R0PTRTYPE(PPDMCRITSECT)     pCritSectR0;
     /** Alignment padding. */
     R0PTRTYPE(void *)           pvAlignment1;
@@ -1169,10 +1161,4 @@
     /** The device instance - RC Ptr. */
     PPDMDEVINSRC                pDevInsRC;
-    /** The APIC helpers - RC Ptr. */
-    PCPDMAPICHLPRC              pApicHlpRC;
-    /** The PDM critical section - RC Ptr. */
-    RCPTRTYPE(PPDMCRITSECT)     pCritSectRC;
-    /** Alignment padding. */
-    RCPTRTYPE(void *)           pvAlignment2;
 } APICDEV;
 /** Pointer to an APIC device. */
Index: trunk/src/VBox/VMM/include/PDMInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/PDMInternal.h	(revision 64595)
+++ trunk/src/VBox/VMM/include/PDMInternal.h	(revision 64596)
@@ -1250,5 +1250,4 @@
 extern const PDMDEVHLPR3    g_pdmR3DevHlpUnTrusted;
 extern const PDMPICHLPR3    g_pdmR3DevPicHlp;
-extern const PDMAPICHLPR3   g_pdmR3DevApicHlp;
 extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
 extern const PDMFWHLPR3     g_pdmR3DevFirmwareHlp;
