Changeset 64626 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Nov 10, 2016 10:31:39 AM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 111851
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r64066 r64626 1159 1159 */ 1160 1160 PDMApicGetBaseMsr(pVCpu, &pCtx->msrApicBase, true /* fIgnoreErrors */); 1161 #ifdef VBOX_WITH_NEW_APIC1162 1161 LogRel(("CPUM%u: Cached APIC base MSR = %#RX64\n", pVCpu->idCpu, pVCpu->cpum.s.Guest.msrApicBase)); 1163 #endif1164 1162 } 1165 1163 … … 1611 1609 /* Cache the local APIC base from the APIC device. During init. this is done in CPUMR3ResetCpu(). */ 1612 1610 PDMApicGetBaseMsr(pVCpu, &pVCpu->cpum.s.Guest.msrApicBase, true /* fIgnoreErrors */); 1613 #ifdef VBOX_WITH_NEW_APIC1614 1611 LogRel(("CPUM%u: Cached APIC base MSR = %#RX64\n", idCpu, pVCpu->cpum.s.Guest.msrApicBase)); 1615 #endif1616 1612 1617 1613 /* During init. this is done in CPUMR3InitCompleted(). */ … … 2535 2531 PVMCPU pVCpu = &pVM->aCpus[i]; 2536 2532 PDMApicGetBaseMsr(pVCpu, &pVCpu->cpum.s.Guest.msrApicBase, true /* fIgnoreErrors */); 2537 #ifdef VBOX_WITH_NEW_APIC2538 2533 LogRel(("CPUM%u: Cached APIC base MSR = %#RX64\n", i, pVCpu->cpum.s.Guest.msrApicBase)); 2539 #endif2540 2534 } 2541 2535 break; -
trunk/src/VBox/VMM/VMMR3/EM.cpp
r63560 r64626 50 50 # include <VBox/vmm/rem.h> 51 51 #endif 52 #ifdef VBOX_WITH_NEW_APIC 53 # include <VBox/vmm/apic.h> 54 #endif 52 #include <VBox/vmm/apic.h> 55 53 #include <VBox/vmm/tm.h> 56 54 #include <VBox/vmm/mm.h> … … 1933 1931 TMR3TimerQueuesDo(pVM); 1934 1932 1935 #ifdef VBOX_WITH_NEW_APIC1936 1933 /* 1937 1934 * Pick up asynchronously posted interrupts into the APIC. … … 1939 1936 if (VMCPU_FF_TEST_AND_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC)) 1940 1937 APICUpdatePendingInterrupts(pVCpu); 1941 #endif1942 1938 1943 1939 /* … … 2602 2598 if (rc == VINF_SUCCESS) 2603 2599 { 2604 #ifdef VBOX_WITH_NEW_APIC2605 2600 if (VMCPU_FF_TEST_AND_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC)) 2606 2601 APICUpdatePendingInterrupts(pVCpu); 2607 #endif 2602 2608 2603 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC 2609 2604 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_UNHALT)) -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r64146 r64626 1379 1379 pVM->hm.s.vmx.fVpid = pVM->hm.s.vmx.fAllowVpid; 1380 1380 1381 #ifdef VBOX_WITH_NEW_APIC1382 1381 #if 0 1383 1382 /* … … 1396 1395 && (pVM->hm.s.vmx.Msrs.VmxExit.n.allowed1 & VMX_VMCS_CTRL_EXIT_ACK_EXT_INT)) 1397 1396 pVM->hm.s.fPostedIntrs = true; 1398 #endif1399 1397 #endif 1400 1398 -
trunk/src/VBox/VMM/VMMR3/PDMDevice.cpp
r64373 r64626 28 28 #include <VBox/vmm/hm.h> 29 29 #include <VBox/vmm/cfgm.h> 30 #ifdef VBOX_WITH_NEW_APIC 31 # include <VBox/vmm/apic.h> 32 #endif 30 #include <VBox/vmm/apic.h> 33 31 #ifdef VBOX_WITH_REM 34 32 # include <VBox/vmm/rem.h> … … 504 502 RegCB.pCfgNode = NULL; 505 503 506 #ifdef VBOX_WITH_NEW_APIC507 504 /* 508 505 * Load the internal VMM APIC device. … … 510 507 int rc2 = pdmR3DevReg_Register(&RegCB.Core, &g_DeviceAPIC); 511 508 AssertRCReturn(rc2, rc2); 512 #endif513 509 514 510 /* -
trunk/src/VBox/VMM/VMMR3/VM.cpp
r63648 r64626 61 61 # include <VBox/vmm/rem.h> 62 62 #endif 63 #ifdef VBOX_WITH_NEW_APIC 64 # include <VBox/vmm/apic.h> 65 #endif 63 #include <VBox/vmm/apic.h> 66 64 #include <VBox/vmm/tm.h> 67 65 #include <VBox/vmm/stam.h> -
trunk/src/VBox/VMM/VMMR3/VMM.cpp
r63560 r64626 120 120 #include <VBox/vmm/csam.h> 121 121 #include <VBox/vmm/patm.h> 122 #ifdef VBOX_WITH_NEW_APIC 123 # include <VBox/vmm/apic.h> 124 #endif 122 #include <VBox/vmm/apic.h> 125 123 #ifdef VBOX_WITH_REM 126 124 # include <VBox/vmm/rem.h> … … 1486 1484 PGMR3ResetCpu(pVM, pVCpu); 1487 1485 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */ 1488 #ifdef VBOX_WITH_NEW_APIC1489 1486 APICR3InitIpi(pVCpu); 1490 #endif1491 1487 TRPMR3ResetCpu(pVCpu); 1492 1488 CPUMR3ResetCpu(pVM, pVCpu);
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