- Timestamp:
- Nov 17, 2016 5:37:59 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 111975
- Location:
- trunk
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pdmcommon.h
r62476 r64696 53 53 #define PDM_VERSION_MAKE(uMagic, uMajor, uMinor) \ 54 54 ( ((uint32_t)(uMagic) << 16) | ((uint32_t)((uMajor) & 0xff) << 4) | ((uint32_t)((uMinor) & 0xf) << 0) ) 55 56 /** 57 * Version of PDM_VERSION_MAKE that's compatible with the preprocessor. 58 * 59 * @returns 32-bit structure version number. 60 * 61 * @param uMagic 16-bit magic value, no suffix. This must be unique. 62 * @param uMajor 12-bit major version number, no suffix. Structures with 63 * different major numbers are not compatible. 64 * @param uMinor 4-bit minor version number, no suffix. When only the 65 * minor version differs, the structures will be 100% 66 * backwards compatible. 67 */ 68 #define PDM_VERSION_MAKE_PP(uMagic, uMajor, uMinor) \ 69 ( (UINT32_C(uMagic) << 16) | ((UINT32_C(uMajor) & UINT32_C(0xff)) << 4) | ((UINT32_C(uMinor) & UINT32_C(0xf)) << 0) ) 55 70 56 71 /** Checks if @a uVerMagic1 is compatible with @a uVerMagic2. -
trunk/include/VBox/vmm/pdmdev.h
r64655 r64696 1876 1876 /** @} */ 1877 1877 1878 /** Current PDMDEVHLPR3 version number. 1879 * @todo Next major revision should add piBus to pfnPCIBusRegister. */ 1880 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 19, 1) 1881 //#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 1882 1878 1883 /** 1879 1884 * PDM Device API. … … 2970 2975 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)); 2971 2976 2972 /** 2973 * Register the PCI Bus. 2974 * 2975 * @returns VBox status code. 2977 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2978 /** 2979 * Register a PCI Bus. 2980 * 2981 * @returns VBox status code, but the positive values 0..31 are used to indicate 2982 * bus number rather than informational status codes. 2976 2983 * @param pDevIns The device instance. 2977 2984 * @param pPciBusReg Pointer to PCI bus registration structure. 2978 2985 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus 2979 2986 * helpers. 2987 * @param piBus Where to return the PDM bus number. Optional. 2988 */ 2989 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, 2990 PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus)); 2991 #else 2992 /** 2993 * Register a PCI Bus. 2994 * 2995 * @returns VBox status code, but the positive values 0..31 are used to indicate 2996 * bus number rather than informational status codes. 2997 * @param pDevIns The device instance. 2998 * @param pPciBusReg Pointer to PCI bus registration structure. 2999 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus 3000 * helpers. 2980 3001 */ 2981 3002 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)); 3003 #endif 2982 3004 2983 3005 /** … … 3452 3474 /** Pointer to the R3 PDM Device API, const variant. */ 3453 3475 typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3; 3454 3455 /** Current PDMDEVHLPR3 version number. */3456 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 19, 0)3457 3476 3458 3477 … … 5010 5029 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister 5011 5030 */ 5031 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 5032 DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus) 5033 { 5034 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3, piBus); 5035 } 5036 #else 5012 5037 DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3) 5013 5038 { 5014 5039 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3); 5015 5040 } 5041 #endif 5016 5042 5017 5043 /** -
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r64468 r64696 1269 1269 PciBusReg.pszSetIrqRC = fGCEnabled ? "pciSetIrq" : NULL; 1270 1270 PciBusReg.pszSetIrqR0 = fR0Enabled ? "pciSetIrq" : NULL; 1271 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 1272 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3, &pBus->iBus); 1273 #else 1271 1274 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3); 1275 pBus->iBus = rc; 1276 #endif 1272 1277 if (RT_FAILURE(rc)) 1273 1278 return PDMDEV_SET_ERROR(pDevIns, rc, 1274 1279 N_("Failed to register ourselves as a PCI Bus")); 1280 Assert(pBus->iBus == 0); 1275 1281 if (pBus->pPciHlpR3->u32Version != PDM_PCIHLPR3_VERSION) 1276 1282 return PDMDevHlpVMSetError(pDevIns, VERR_VERSION_MISMATCH, RT_SRC_POS, … … 1606 1612 PciBusReg.pszSetIrqRC = fGCEnabled ? "pcibridgeSetIrq" : NULL; 1607 1613 PciBusReg.pszSetIrqR0 = fR0Enabled ? "pcibridgeSetIrq" : NULL; 1614 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 1615 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3, &pBus->iBus); 1616 #else 1608 1617 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3); 1618 pBus->iBus = rc; 1619 #endif 1609 1620 if (RT_FAILURE(rc)) 1610 1621 return PDMDEV_SET_ERROR(pDevIns, rc, 1611 1622 N_("Failed to register ourselves as a PCI Bus")); 1623 Assert(pBus->iBus == (uint32_t)iInstance + 1); /* Can be removed when adding support for multiple bridge implementations. */ 1612 1624 if (pBus->pPciHlpR3->u32Version != PDM_PCIHLPR3_VERSION) 1613 1625 return PDMDevHlpVMSetError(pDevIns, VERR_VERSION_MISMATCH, RT_SRC_POS, … … 1649 1661 1650 1662 pBus->iDevSearch = 0; 1651 /*1652 * The iBus property doesn't really represent the bus number1653 * because the guest and the BIOS can choose different bus numbers1654 * for them.1655 * The bus number is mainly for the setIrq function to indicate1656 * when the host bus is reached which will have iBus = 0.1657 * That's why the + 1.1658 */1659 pBus->iBus = iInstance + 1;1660 1663 1661 1664 /* -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r64496 r64696 2462 2462 PciBusReg.pszSetIrqRC = fGCEnabled ? "ich9pciSetIrq" : NULL; 2463 2463 PciBusReg.pszSetIrqR0 = fR0Enabled ? "ich9pciSetIrq" : NULL; 2464 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2465 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3, &pBus->iBus); 2466 #else 2464 2467 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3); 2468 pBus->iBus = rc; 2469 #endif 2465 2470 if (RT_FAILURE(rc)) 2466 2471 return PDMDEV_SET_ERROR(pDevIns, rc, 2467 2472 N_("Failed to register ourselves as a PCI Bus")); 2473 Assert(pBus->iBus == 0); 2468 2474 if (pBus->pPciHlpR3->u32Version != PDM_PCIHLPR3_VERSION) 2469 2475 return PDMDevHlpVMSetError(pDevIns, VERR_VERSION_MISMATCH, RT_SRC_POS, … … 2734 2740 PciBusReg.pszSetIrqRC = fGCEnabled ? "ich9pcibridgeSetIrq" : NULL; 2735 2741 PciBusReg.pszSetIrqR0 = fR0Enabled ? "ich9pcibridgeSetIrq" : NULL; 2742 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2743 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3, &pBus->iBus); 2744 #else 2736 2745 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3); 2746 pBus->iBus = rc; 2747 #endif 2737 2748 if (RT_FAILURE(rc)) 2738 2749 return PDMDEV_SET_ERROR(pDevIns, rc, 2739 2750 N_("Failed to register ourselves as a PCI Bus")); 2751 Assert(pBus->iBus == (uint32_t)iInstance + 1); /* Can be removed when adding support for multiple bridge implementations. */ 2740 2752 if (pBus->pPciHlpR3->u32Version != PDM_PCIHLPR3_VERSION) 2741 2753 return PDMDevHlpVMSetError(pDevIns, VERR_VERSION_MISMATCH, RT_SRC_POS, … … 2745 2757 pBus->pPciHlpRC = pBus->pPciHlpR3->pfnGetRCHelpers(pDevIns); 2746 2758 pBus->pPciHlpR0 = pBus->pPciHlpR3->pfnGetR0Helpers(pDevIns); 2759 2747 2760 2748 2761 /* Disable default device locking. */ … … 2779 2792 pBus->PciDev.Int.s.pfnBridgeConfigRead = ich9pcibridgeConfigRead; 2780 2793 pBus->PciDev.Int.s.pfnBridgeConfigWrite = ich9pcibridgeConfigWrite; 2781 2782 /*2783 * The iBus property doesn't really represent the bus number2784 * because the guest and the BIOS can choose different bus numbers2785 * for them.2786 * The bus number is mainly for the setIrq function to indicate2787 * when the host bus is reached which will have iBus = 0.2788 * That's why the + 1.2789 */2790 pBus->iBus = iInstance + 1;2791 2794 2792 2795 /* -
trunk/src/VBox/Devices/Bus/DevPciInternal.h
r64461 r64696 31 31 { 32 32 /** Bus number. */ 33 int32_tiBus;33 uint32_t iBus; 34 34 /** Number of bridges attached to the bus. */ 35 35 uint32_t cBridges; -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r62606 r64696 570 570 pfLockTaken)); 571 571 rc = PGM_BTH_NAME(SyncPage)(pVCpu, PdeSrcDummy, pvFault, 1, uErr); 572 # endif572 # endif 573 573 AssertRC(rc); 574 574 PGM_INVL_PG(pVCpu, pvFault); … … 634 634 return VINF_SUCCESS; 635 635 } 636 //AssertMsg(GstWalk.Pde.u == GstWalk.pPde->u || GstWalk.pPte->u == GstWalk.pPde->u, ("%RX64 %RX64\n", (uint64_t)GstWalk.Pde.u, (uint64_t)GstWalk.pPde->u)); - triggers with smp w7 guests. 637 //AssertMsg(GstWalk.Core.fBigPage || GstWalk.Pte.u == GstWalk.pPte->u, ("%RX64 %RX64\n", (uint64_t)GstWalk.Pte.u, (uint64_t)GstWalk.pPte->u)); - ditto. 636 #ifdef DEBUG_bird 637 AssertMsg(GstWalk.Pde.u == GstWalk.pPde->u || GstWalk.pPte->u == GstWalk.pPde->u || pVM->cCpus > 1, ("%RX64 %RX64\n", (uint64_t)GstWalk.Pde.u, (uint64_t)GstWalk.pPde->u)); // - triggers with smp w7 guests. 638 AssertMsg(GstWalk.Core.fBigPage || GstWalk.Pte.u == GstWalk.pPte->u || pVM->cCpus > 1, ("%RX64 %RX64\n", (uint64_t)GstWalk.Pte.u, (uint64_t)GstWalk.pPte->u)); // - ditto. 639 #endif 638 640 } 639 641 … … 676 678 } 677 679 678 # if 680 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(PGM_WITHOUT_MAPPINGS) 679 681 /* 680 682 * Check if this address is within any of our mappings. … … 1132 1134 rc2 = PGMShwGetPage(pVCpu, pvFault, &fPageShw, NULL); 1133 1135 1136 #if 0 1134 1137 /* 1135 1138 * Compare page flags. … … 1145 1148 ("Page flags mismatch! pvFault=%RGv uErr=%x GCPhys=%RGp fPageShw=%RX64 fPageGst=%RX64 rc=%d\n", 1146 1149 pvFault, (uint32_t)uErr, GCPhys, fPageShw, fPageGst, rc)); 1150 01:01:15.623511 00:08:43.266063 Expression: (fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK)) == (fPageGst & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK)) || ( pVCpu->pgm.s.cNetwareWp0Hacks > 0 && (fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK | X86_PTE_RW | X86_PTE_US)) == (fPageGst & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK | X86_PTE_RW | X86_PTE_US)) && (fPageShw & (X86_PTE_RW | X86_PTE_US)) == X86_PTE_RW && (fPageGst & (X86_PTE_RW | X86_PTE_US)) == X86_PTE_US) 1151 01:01:15.623511 00:08:43.266064 Location : e:\vbox\svn\trunk\srcPage flags mismatch! pvFault=fffff801b0d7b000 uErr=11 GCPhys=0000000019b52000 fPageShw=0 fPageGst=77b0000000000121 rc=0 1152 1153 01:01:15.625516 00:08:43.268051 Expression: (fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK)) == (fPageGst & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK)) || ( pVCpu->pgm.s.cNetwareWp0Hacks > 0 && (fPageShw & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK | X86_PTE_RW | X86_PTE_US)) == (fPageGst & ~(X86_PTE_A | X86_PTE_D | X86_PTE_AVL_MASK | X86_PTE_RW | X86_PTE_US)) && (fPageShw & (X86_PTE_RW | X86_PTE_US)) == X86_PTE_RW && (fPageGst & (X86_PTE_RW | X86_PTE_US)) == X86_PTE_US) 1154 01:01:15.625516 00:08:43.268051 Location : 1155 e:\vbox\svn\trunk\srcPage flags mismatch! 1156 pvFault=fffff801b0d7b000 1157 uErr=11 X86_TRAP_PF_ID | X86_TRAP_PF_P 1158 GCPhys=0000000019b52000 1159 fPageShw=0 1160 fPageGst=77b0000000000121 1161 rc=0 1162 #endif 1163 1147 1164 } 1148 1165 else -
trunk/src/VBox/VMM/VMMR3/IEMR3.cpp
r64551 r64696 125 125 # define IEM_DO_INSTR_STAT(a_Name, a_szDesc) \ 126 126 STAMR3RegisterF(pVM, &pVCpu->iem.s.pStatsCCR3->a_Name, STAMTYPE_U32_RESET, STAMVISIBILITY_USED, \ 127 STAMUNIT_COUNT, a_szDesc, "/IEM/CPU%u/ r0-rc-Instr/" #a_Name, idCpu); \127 STAMUNIT_COUNT, a_szDesc, "/IEM/CPU%u/instr-RZ/" #a_Name, idCpu); \ 128 128 STAMR3RegisterF(pVM, &pVCpu->iem.s.pStatsR3->a_Name, STAMTYPE_U32_RESET, STAMVISIBILITY_USED, \ 129 STAMUNIT_COUNT, a_szDesc, "/IEM/CPU%u/ r3-Instr/" #a_Name, idCpu);129 STAMUNIT_COUNT, a_szDesc, "/IEM/CPU%u/instr-R3/" #a_Name, idCpu); 130 130 # include "IEMInstructionStatisticsTmpl.h" 131 131 # undef IEM_DO_INSTR_STAT -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r64655 r64696 2576 2576 2577 2577 /** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */ 2578 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2579 static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, 2580 PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus) 2581 #else 2578 2582 static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3) 2579 { 2580 PDMDEV_ASSERT_DEVINS(pDevIns); 2581 PVM pVM = pDevIns->Internal.s.pVMR3; 2582 VM_ASSERT_EMT(pVM); 2583 #endif 2584 { 2585 PDMDEV_ASSERT_DEVINS(pDevIns); 2586 PVM pVM = pDevIns->Internal.s.pVMR3; 2587 VM_ASSERT_EMT(pVM); 2588 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2589 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, " 2590 ".pfnSetIrqR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p piBus=%p\n", 2591 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3, 2592 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnFakePCIBIOSR3, 2593 pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, 2594 ppPciHlpR3, piBus)); 2595 #else 2583 2596 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, " 2584 2597 ".pfnSetIrqR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n", … … 2586 2599 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnFakePCIBIOSR3, 2587 2600 pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3)); 2601 #endif 2588 2602 2589 2603 /* … … 2622 2636 return VERR_INVALID_PARAMETER; 2623 2637 } 2624 2638 if (!ppPciHlpR3) 2625 2639 { 2626 2640 Assert(ppPciHlpR3); … … 2628 2642 return VERR_INVALID_PARAMETER; 2629 2643 } 2644 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2645 AssertLogRelMsgReturn(RT_VALID_PTR(piBus) || !piBus, 2646 ("caller='%s'/%d: piBus=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, piBus), 2647 VERR_INVALID_POINTER); 2648 #endif 2630 2649 2631 2650 /* … … 2700 2719 /* set the helper pointer and return. */ 2701 2720 *ppPciHlpR3 = &g_pdmR3DevPciHlp; 2702 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS)); 2721 #if PDM_DEVHLPR3_VERSION >= PDM_VERSION_MAKE_PP(0xffe7, 20, 0) 2722 if (piBus) 2723 *piBus = iBus; 2724 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc *piBus=%u\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS, iBus)); 2703 2725 return VINF_SUCCESS; 2726 #else 2727 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %u\n", pDevIns->pReg->szName, pDevIns->iInstance, iBus)); 2728 return (int)iBus; 2729 #endif 2704 2730 } 2705 2731
Note:
See TracChangeset
for help on using the changeset viewer.