Changeset 64882 in vbox
- Timestamp:
- Dec 15, 2016 3:17:35 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 112289
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r64881 r64882 8980 8980 8981 8981 /* 8982 * If the TPR was raised by the guest, it wouldn't cause a VM-exit immediately. Instead we sync the TPR lazily whenever 8983 * we eventually get a VM-exit for any reason. 8984 * 8985 * This maybe expensive as PDMApicSetTPR() can longjmp to ring-3 and which is why it's done here as it's easier and 8986 * no less efficient to deal with it here than making hmR0VmxSaveGuestState() cope with longjmps safely 8987 * (see VMCPU_FF_HM_UPDATE_CR3 handling). 8982 * Sync the TPR shadow with our APIC state. 8988 8983 */ 8989 /** @todo r=ramshankar: The 2nd para in the above comment is8990 * outdated, we no longer longjmp to ring-3 on setting8991 * the TPR, but regardless we can probably rework this8992 * portion of the code a bit. */8993 8984 if ( (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW) 8994 8985 && pVmxTransient->u8GuestTpr != pVCpu->hm.s.vmx.pbVirtApic[XAPIC_OFF_TPR]) … … 12240 12231 12241 12232 /* 12242 * The TPR has already been updated, see hmR0VMXPostRunGuest(). RIP is also updated as part of the VM-exit by VT-x. Update 12243 * the threshold in the VMCS, deliver the pending interrupt via hmR0VmxPreRunGuest()->hmR0VmxInjectPendingEvent() and 12244 * resume guest execution. 12233 * The TPR shadow would've been synced with the APIC TPR in hmR0VmxPostRunGuest(). We'll re-evaluate 12234 * pending interrupts and inject them before the next VM-entry so we can just continue execution here. 12245 12235 */ 12246 HMCPU_CF_SET(pVCpu, HM_CHANGED_VMX_GUEST_APIC_STATE);12247 12236 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitTprBelowThreshold); 12248 12237 return VINF_SUCCESS;
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