Changeset 65297 in vbox
- Timestamp:
- Jan 14, 2017 7:41:26 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 112867
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r65295 r65297 1 1 /* $Id$ */ 2 2 /** @file 3 * VM Ware SVGA device.3 * VMware SVGA device. 4 4 * 5 5 * Logging levels guidelines for this and related files: … … 21 21 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the 22 22 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. 23 */ 24 25 26 /** @page pg_dev_vmsvga VMSVGA - VMware SVGA II Device Emulation 27 * 28 * This device emulation was contributed by trivirt AG. It offers an 29 * alternative to our Bochs based VGA graphics and 3d emulations. This is 30 * valuable for Xorg based guests, as there is driver support shipping with Xorg 31 * since it forked from XFree86. 32 * 33 * 34 * @section sec_dev_vmsvga_sdk The VMware SDK 35 * 36 * This is officially deprecated now, however it's still quite useful, 37 * especially for getting the old features working: 38 * http://vmware-svga.sourceforge.net/ 39 * 40 * They currently point developers at the following resources. 41 * - http://cgit.freedesktop.org/xorg/driver/xf86-video-vmware/ 42 * - http://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/svga/ 43 * - http://cgit.freedesktop.org/mesa/vmwgfx/ 44 * 45 * @subsection subsec_dev_vmsvga_sdk_results Test results 46 * 47 * Test results: 48 * - 2dmark.img: 49 * + todo 50 * - backdoor-tclo.img: 51 * + todo 52 * - blit-cube.img: 53 * + todo 54 * - bunnies.img: 55 * + todo 56 * - cube.img: 57 * + todo 58 * - cubemark.img: 59 * + todo 60 * - dynamic-vertex-stress.img: 61 * + todo 62 * - dynamic-vertex.img: 63 * + todo 64 * - fence-stress.img: 65 * + todo 66 * - gmr-test.img: 67 * + todo 68 * - half-float-test.img: 69 * + todo 70 * - noscreen-cursor.img: 71 * - The CURSOR I/O and FIFO registers are not implemented, so the mouse 72 * cursor doesn't show. (Hacking the GUI a little, would make the cursor 73 * visible though.) 74 * - Cursor animation via the palette doesn't work. 75 * - During debugging, it turns out that the framebuffer content seems to 76 * be halfways ignore or something (memset(fb, 0xcc, lots)). 77 * - Trouble with way to small FIFO and the 256x256 cursor fails. Need to 78 * grow it 0x10 fold (128KB -> 2MB like in WS10). 79 * - null.img: 80 * + todo 81 * - pong.img: 82 * + todo 83 * - presentReadback.img: 84 * + todo 85 * - resolution-set.img: 86 * + todo 87 * - rt-gamma-test.img: 88 * + todo 89 * - screen-annotation.img: 90 * + todo 91 * - screen-cursor.img: 92 * + todo 93 * - screen-dma-coalesce.img: 94 * + todo 95 * - screen-gmr-discontig.img: 96 * + todo 97 * - screen-gmr-remap.img: 98 * + todo 99 * - screen-multimon.img: 100 * + todo 101 * - screen-present-clip.img: 102 * + todo 103 * - screen-render-test.img: 104 * + todo 105 * - screen-simple.img: 106 * + todo 107 * - screen-text.img: 108 * + todo 109 * - simple-shaders.img: 110 * + todo 111 * - simple_blit.img: 112 * + todo 113 * - tiny-2d-updates.img: 114 * + todo 115 * - video-formats.img: 116 * + todo 117 * - video-sync.img: 118 * + todo 119 * 23 120 */ 24 121 … … 416 513 switch (idxReg) 417 514 { 418 case SVGA_REG_ID: 419 return "SVGA_REG_ID"; 420 case SVGA_REG_ENABLE: 421 return "SVGA_REG_ENABLE"; 422 case SVGA_REG_WIDTH: 423 return "SVGA_REG_WIDTH"; 424 case SVGA_REG_HEIGHT: 425 return "SVGA_REG_HEIGHT"; 426 case SVGA_REG_MAX_WIDTH: 427 return "SVGA_REG_MAX_WIDTH"; 428 case SVGA_REG_MAX_HEIGHT: 429 return "SVGA_REG_MAX_HEIGHT"; 430 case SVGA_REG_DEPTH: 431 return "SVGA_REG_DEPTH"; 432 case SVGA_REG_BITS_PER_PIXEL: /* Current bpp in the guest */ 433 return "SVGA_REG_BITS_PER_PIXEL"; 434 case SVGA_REG_HOST_BITS_PER_PIXEL: /* (Deprecated) */ 435 return "SVGA_REG_HOST_BITS_PER_PIXEL"; 436 case SVGA_REG_PSEUDOCOLOR: 437 return "SVGA_REG_PSEUDOCOLOR"; 438 case SVGA_REG_RED_MASK: 439 return "SVGA_REG_RED_MASK"; 440 case SVGA_REG_GREEN_MASK: 441 return "SVGA_REG_GREEN_MASK"; 442 case SVGA_REG_BLUE_MASK: 443 return "SVGA_REG_BLUE_MASK"; 444 case SVGA_REG_BYTES_PER_LINE: 445 return "SVGA_REG_BYTES_PER_LINE"; 446 case SVGA_REG_VRAM_SIZE: /* VRAM size */ 447 return "SVGA_REG_VRAM_SIZE"; 448 case SVGA_REG_FB_START: /* Frame buffer physical address. */ 449 return "SVGA_REG_FB_START"; 450 case SVGA_REG_FB_OFFSET: /* Offset of the frame buffer in VRAM */ 451 return "SVGA_REG_FB_OFFSET"; 452 case SVGA_REG_FB_SIZE: /* Frame buffer size */ 453 return "SVGA_REG_FB_SIZE"; 454 case SVGA_REG_CAPABILITIES: 455 return "SVGA_REG_CAPABILITIES"; 456 case SVGA_REG_MEM_START: /* FIFO start */ 457 return "SVGA_REG_MEM_START"; 458 case SVGA_REG_MEM_SIZE: /* FIFO size */ 459 return "SVGA_REG_MEM_SIZE"; 460 case SVGA_REG_CONFIG_DONE: /* Set when memory area configured */ 461 return "SVGA_REG_CONFIG_DONE"; 462 case SVGA_REG_SYNC: /* See "FIFO Synchronization Registers" */ 463 return "SVGA_REG_SYNC"; 464 case SVGA_REG_BUSY: /* See "FIFO Synchronization Registers" */ 465 return "SVGA_REG_BUSY"; 466 case SVGA_REG_GUEST_ID: /* Set guest OS identifier */ 467 return "SVGA_REG_GUEST_ID"; 468 case SVGA_REG_SCRATCH_SIZE: /* Number of scratch registers */ 469 return "SVGA_REG_SCRATCH_SIZE"; 470 case SVGA_REG_MEM_REGS: /* Number of FIFO registers */ 471 return "SVGA_REG_MEM_REGS"; 472 case SVGA_REG_PITCHLOCK: /* Fixed pitch for all modes */ 473 return "SVGA_REG_PITCHLOCK"; 474 case SVGA_REG_IRQMASK: /* Interrupt mask */ 475 return "SVGA_REG_IRQMASK"; 476 case SVGA_REG_GMR_ID: 477 return "SVGA_REG_GMR_ID"; 478 case SVGA_REG_GMR_DESCRIPTOR: 479 return "SVGA_REG_GMR_DESCRIPTOR"; 480 case SVGA_REG_GMR_MAX_IDS: 481 return "SVGA_REG_GMR_MAX_IDS"; 482 case SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH: 483 return "SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH"; 484 case SVGA_REG_TRACES: /* Enable trace-based updates even when FIFO is on */ 485 return "SVGA_REG_TRACES"; 486 case SVGA_REG_GMRS_MAX_PAGES: /* Maximum number of 4KB pages for all GMRs */ 487 return "SVGA_REG_GMRS_MAX_PAGES"; 488 case SVGA_REG_MEMORY_SIZE: /* Total dedicated device memory excluding FIFO */ 489 return "SVGA_REG_MEMORY_SIZE"; 490 case SVGA_REG_TOP: /* Must be 1 more than the last register */ 491 return "SVGA_REG_TOP"; 492 case SVGA_PALETTE_BASE: /* Base of SVGA color map */ 493 return "SVGA_PALETTE_BASE"; 494 case SVGA_REG_CURSOR_ID: 495 return "SVGA_REG_CURSOR_ID"; 496 case SVGA_REG_CURSOR_X: 497 return "SVGA_REG_CURSOR_X"; 498 case SVGA_REG_CURSOR_Y: 499 return "SVGA_REG_CURSOR_Y"; 500 case SVGA_REG_CURSOR_ON: 501 return "SVGA_REG_CURSOR_ON"; 502 case SVGA_REG_NUM_GUEST_DISPLAYS:/* Number of guest displays in X/Y direction */ 503 return "SVGA_REG_NUM_GUEST_DISPLAYS"; 504 case SVGA_REG_DISPLAY_ID: /* Display ID for the following display attributes */ 505 return "SVGA_REG_DISPLAY_ID"; 506 case SVGA_REG_DISPLAY_IS_PRIMARY:/* Whether this is a primary display */ 507 return "SVGA_REG_DISPLAY_IS_PRIMARY"; 508 case SVGA_REG_DISPLAY_POSITION_X:/* The display position x */ 509 return "SVGA_REG_DISPLAY_POSITION_X"; 510 case SVGA_REG_DISPLAY_POSITION_Y:/* The display position y */ 511 return "SVGA_REG_DISPLAY_POSITION_Y"; 512 case SVGA_REG_DISPLAY_WIDTH: /* The display's width */ 513 return "SVGA_REG_DISPLAY_WIDTH"; 514 case SVGA_REG_DISPLAY_HEIGHT: /* The display's height */ 515 return "SVGA_REG_DISPLAY_HEIGHT"; 516 case SVGA_REG_NUM_DISPLAYS: /* (Deprecated) */ 517 return "SVGA_REG_NUM_DISPLAYS"; 518 519 default: 520 if (idxReg - (uint32_t)SVGA_SCRATCH_BASE < pThis->svga.cScratchRegion) 521 return "SVGA_SCRATCH_BASE reg"; 522 if (idxReg - (uint32_t)SVGA_PALETTE_BASE < (uint32_t)SVGA_NUM_PALETTE_REGS) 523 return "SVGA_PALETTE_BASE reg"; 524 return "UNKNOWN"; 515 case SVGA_REG_ID: return "SVGA_REG_ID"; 516 case SVGA_REG_ENABLE: return "SVGA_REG_ENABLE"; 517 case SVGA_REG_WIDTH: return "SVGA_REG_WIDTH"; 518 case SVGA_REG_HEIGHT: return "SVGA_REG_HEIGHT"; 519 case SVGA_REG_MAX_WIDTH: return "SVGA_REG_MAX_WIDTH"; 520 case SVGA_REG_MAX_HEIGHT: return "SVGA_REG_MAX_HEIGHT"; 521 case SVGA_REG_DEPTH: return "SVGA_REG_DEPTH"; 522 case SVGA_REG_BITS_PER_PIXEL: return "SVGA_REG_BITS_PER_PIXEL"; /* Current bpp in the guest */ 523 case SVGA_REG_HOST_BITS_PER_PIXEL: return "SVGA_REG_HOST_BITS_PER_PIXEL"; /* (Deprecated) */ 524 case SVGA_REG_PSEUDOCOLOR: return "SVGA_REG_PSEUDOCOLOR"; 525 case SVGA_REG_RED_MASK: return "SVGA_REG_RED_MASK"; 526 case SVGA_REG_GREEN_MASK: return "SVGA_REG_GREEN_MASK"; 527 case SVGA_REG_BLUE_MASK: return "SVGA_REG_BLUE_MASK"; 528 case SVGA_REG_BYTES_PER_LINE: return "SVGA_REG_BYTES_PER_LINE"; 529 case SVGA_REG_VRAM_SIZE: return "SVGA_REG_VRAM_SIZE"; /* VRAM size */ 530 case SVGA_REG_FB_START: return "SVGA_REG_FB_START"; /* Frame buffer physical address. */ 531 case SVGA_REG_FB_OFFSET: return "SVGA_REG_FB_OFFSET"; /* Offset of the frame buffer in VRAM */ 532 case SVGA_REG_FB_SIZE: return "SVGA_REG_FB_SIZE"; /* Frame buffer size */ 533 case SVGA_REG_CAPABILITIES: return "SVGA_REG_CAPABILITIES"; 534 case SVGA_REG_MEM_START: return "SVGA_REG_MEM_START"; /* FIFO start */ 535 case SVGA_REG_MEM_SIZE: return "SVGA_REG_MEM_SIZE"; /* FIFO size */ 536 case SVGA_REG_CONFIG_DONE: return "SVGA_REG_CONFIG_DONE"; /* Set when memory area configured */ 537 case SVGA_REG_SYNC: return "SVGA_REG_SYNC"; /* See "FIFO Synchronization Registers" */ 538 case SVGA_REG_BUSY: return "SVGA_REG_BUSY"; /* See "FIFO Synchronization Registers" */ 539 case SVGA_REG_GUEST_ID: return "SVGA_REG_GUEST_ID"; /* Set guest OS identifier */ 540 case SVGA_REG_SCRATCH_SIZE: return "SVGA_REG_SCRATCH_SIZE"; /* Number of scratch registers */ 541 case SVGA_REG_MEM_REGS: return "SVGA_REG_MEM_REGS"; /* Number of FIFO registers */ 542 case SVGA_REG_PITCHLOCK: return "SVGA_REG_PITCHLOCK"; /* Fixed pitch for all modes */ 543 case SVGA_REG_IRQMASK: return "SVGA_REG_IRQMASK"; /* Interrupt mask */ 544 case SVGA_REG_GMR_ID: return "SVGA_REG_GMR_ID"; 545 case SVGA_REG_GMR_DESCRIPTOR: return "SVGA_REG_GMR_DESCRIPTOR"; 546 case SVGA_REG_GMR_MAX_IDS: return "SVGA_REG_GMR_MAX_IDS"; 547 case SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH:return "SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH"; 548 case SVGA_REG_TRACES: return "SVGA_REG_TRACES"; /* Enable trace-based updates even when FIFO is on */ 549 case SVGA_REG_GMRS_MAX_PAGES: return "SVGA_REG_GMRS_MAX_PAGES"; /* Maximum number of 4KB pages for all GMRs */ 550 case SVGA_REG_MEMORY_SIZE: return "SVGA_REG_MEMORY_SIZE"; /* Total dedicated device memory excluding FIFO */ 551 case SVGA_REG_TOP: return "SVGA_REG_TOP"; /* Must be 1 more than the last register */ 552 case SVGA_PALETTE_BASE: return "SVGA_PALETTE_BASE"; /* Base of SVGA color map */ 553 case SVGA_REG_CURSOR_ID: return "SVGA_REG_CURSOR_ID"; 554 case SVGA_REG_CURSOR_X: return "SVGA_REG_CURSOR_X"; 555 case SVGA_REG_CURSOR_Y: return "SVGA_REG_CURSOR_Y"; 556 case SVGA_REG_CURSOR_ON: return "SVGA_REG_CURSOR_ON"; 557 case SVGA_REG_NUM_GUEST_DISPLAYS: return "SVGA_REG_NUM_GUEST_DISPLAYS"; /* Number of guest displays in X/Y direction */ 558 case SVGA_REG_DISPLAY_ID: return "SVGA_REG_DISPLAY_ID"; /* Display ID for the following display attributes */ 559 case SVGA_REG_DISPLAY_IS_PRIMARY: return "SVGA_REG_DISPLAY_IS_PRIMARY"; /* Whether this is a primary display */ 560 case SVGA_REG_DISPLAY_POSITION_X: return "SVGA_REG_DISPLAY_POSITION_X"; /* The display position x */ 561 case SVGA_REG_DISPLAY_POSITION_Y: return "SVGA_REG_DISPLAY_POSITION_Y"; /* The display position y */ 562 case SVGA_REG_DISPLAY_WIDTH: return "SVGA_REG_DISPLAY_WIDTH"; /* The display's width */ 563 case SVGA_REG_DISPLAY_HEIGHT: return "SVGA_REG_DISPLAY_HEIGHT"; /* The display's height */ 564 case SVGA_REG_NUM_DISPLAYS: return "SVGA_REG_NUM_DISPLAYS"; /* (Deprecated) */ 565 566 default: 567 if (idxReg - (uint32_t)SVGA_SCRATCH_BASE < pThis->svga.cScratchRegion) 568 return "SVGA_SCRATCH_BASE reg"; 569 if (idxReg - (uint32_t)SVGA_PALETTE_BASE < (uint32_t)SVGA_NUM_PALETTE_REGS) 570 return "SVGA_PALETTE_BASE reg"; 571 return "UNKNOWN"; 525 572 } 526 573 } … … 537 584 switch (u32Cmd) 538 585 { 539 case SVGA_CMD_INVALID_CMD: 540 return "SVGA_CMD_INVALID_CMD"; 541 case SVGA_CMD_UPDATE: 542 return "SVGA_CMD_UPDATE"; 543 case SVGA_CMD_RECT_COPY: 544 return "SVGA_CMD_RECT_COPY"; 545 case SVGA_CMD_DEFINE_CURSOR: 546 return "SVGA_CMD_DEFINE_CURSOR"; 547 case SVGA_CMD_DEFINE_ALPHA_CURSOR: 548 return "SVGA_CMD_DEFINE_ALPHA_CURSOR"; 549 case SVGA_CMD_UPDATE_VERBOSE: 550 return "SVGA_CMD_UPDATE_VERBOSE"; 551 case SVGA_CMD_FRONT_ROP_FILL: 552 return "SVGA_CMD_FRONT_ROP_FILL"; 553 case SVGA_CMD_FENCE: 554 return "SVGA_CMD_FENCE"; 555 case SVGA_CMD_ESCAPE: 556 return "SVGA_CMD_ESCAPE"; 557 case SVGA_CMD_DEFINE_SCREEN: 558 return "SVGA_CMD_DEFINE_SCREEN"; 559 case SVGA_CMD_DESTROY_SCREEN: 560 return "SVGA_CMD_DESTROY_SCREEN"; 561 case SVGA_CMD_DEFINE_GMRFB: 562 return "SVGA_CMD_DEFINE_GMRFB"; 563 case SVGA_CMD_BLIT_GMRFB_TO_SCREEN: 564 return "SVGA_CMD_BLIT_GMRFB_TO_SCREEN"; 565 case SVGA_CMD_BLIT_SCREEN_TO_GMRFB: 566 return "SVGA_CMD_BLIT_SCREEN_TO_GMRFB"; 567 case SVGA_CMD_ANNOTATION_FILL: 568 return "SVGA_CMD_ANNOTATION_FILL"; 569 case SVGA_CMD_ANNOTATION_COPY: 570 return "SVGA_CMD_ANNOTATION_COPY"; 571 case SVGA_CMD_DEFINE_GMR2: 572 return "SVGA_CMD_DEFINE_GMR2"; 573 case SVGA_CMD_REMAP_GMR2: 574 return "SVGA_CMD_REMAP_GMR2"; 575 case SVGA_3D_CMD_SURFACE_DEFINE: 576 return "SVGA_3D_CMD_SURFACE_DEFINE"; 577 case SVGA_3D_CMD_SURFACE_DESTROY: 578 return "SVGA_3D_CMD_SURFACE_DESTROY"; 579 case SVGA_3D_CMD_SURFACE_COPY: 580 return "SVGA_3D_CMD_SURFACE_COPY"; 581 case SVGA_3D_CMD_SURFACE_STRETCHBLT: 582 return "SVGA_3D_CMD_SURFACE_STRETCHBLT"; 583 case SVGA_3D_CMD_SURFACE_DMA: 584 return "SVGA_3D_CMD_SURFACE_DMA"; 585 case SVGA_3D_CMD_CONTEXT_DEFINE: 586 return "SVGA_3D_CMD_CONTEXT_DEFINE"; 587 case SVGA_3D_CMD_CONTEXT_DESTROY: 588 return "SVGA_3D_CMD_CONTEXT_DESTROY"; 589 case SVGA_3D_CMD_SETTRANSFORM: 590 return "SVGA_3D_CMD_SETTRANSFORM"; 591 case SVGA_3D_CMD_SETZRANGE: 592 return "SVGA_3D_CMD_SETZRANGE"; 593 case SVGA_3D_CMD_SETRENDERSTATE: 594 return "SVGA_3D_CMD_SETRENDERSTATE"; 595 case SVGA_3D_CMD_SETRENDERTARGET: 596 return "SVGA_3D_CMD_SETRENDERTARGET"; 597 case SVGA_3D_CMD_SETTEXTURESTATE: 598 return "SVGA_3D_CMD_SETTEXTURESTATE"; 599 case SVGA_3D_CMD_SETMATERIAL: 600 return "SVGA_3D_CMD_SETMATERIAL"; 601 case SVGA_3D_CMD_SETLIGHTDATA: 602 return "SVGA_3D_CMD_SETLIGHTDATA"; 603 case SVGA_3D_CMD_SETLIGHTENABLED: 604 return "SVGA_3D_CMD_SETLIGHTENABLED"; 605 case SVGA_3D_CMD_SETVIEWPORT: 606 return "SVGA_3D_CMD_SETVIEWPORT"; 607 case SVGA_3D_CMD_SETCLIPPLANE: 608 return "SVGA_3D_CMD_SETCLIPPLANE"; 609 case SVGA_3D_CMD_CLEAR: 610 return "SVGA_3D_CMD_CLEAR"; 611 case SVGA_3D_CMD_PRESENT: 612 return "SVGA_3D_CMD_PRESENT"; 613 case SVGA_3D_CMD_SHADER_DEFINE: 614 return "SVGA_3D_CMD_SHADER_DEFINE"; 615 case SVGA_3D_CMD_SHADER_DESTROY: 616 return "SVGA_3D_CMD_SHADER_DESTROY"; 617 case SVGA_3D_CMD_SET_SHADER: 618 return "SVGA_3D_CMD_SET_SHADER"; 619 case SVGA_3D_CMD_SET_SHADER_CONST: 620 return "SVGA_3D_CMD_SET_SHADER_CONST"; 621 case SVGA_3D_CMD_DRAW_PRIMITIVES: 622 return "SVGA_3D_CMD_DRAW_PRIMITIVES"; 623 case SVGA_3D_CMD_SETSCISSORRECT: 624 return "SVGA_3D_CMD_SETSCISSORRECT"; 625 case SVGA_3D_CMD_BEGIN_QUERY: 626 return "SVGA_3D_CMD_BEGIN_QUERY"; 627 case SVGA_3D_CMD_END_QUERY: 628 return "SVGA_3D_CMD_END_QUERY"; 629 case SVGA_3D_CMD_WAIT_FOR_QUERY: 630 return "SVGA_3D_CMD_WAIT_FOR_QUERY"; 631 case SVGA_3D_CMD_PRESENT_READBACK: 632 return "SVGA_3D_CMD_PRESENT_READBACK"; 633 case SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN: 634 return "SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN"; 635 case SVGA_3D_CMD_SURFACE_DEFINE_V2: 636 return "SVGA_3D_CMD_SURFACE_DEFINE_V2"; 637 case SVGA_3D_CMD_GENERATE_MIPMAPS: 638 return "SVGA_3D_CMD_GENERATE_MIPMAPS"; 639 case SVGA_3D_CMD_ACTIVATE_SURFACE: 640 return "SVGA_3D_CMD_ACTIVATE_SURFACE"; 641 case SVGA_3D_CMD_DEACTIVATE_SURFACE: 642 return "SVGA_3D_CMD_DEACTIVATE_SURFACE"; 643 default: 644 return "UNKNOWN"; 586 case SVGA_CMD_INVALID_CMD: return "SVGA_CMD_INVALID_CMD"; 587 case SVGA_CMD_UPDATE: return "SVGA_CMD_UPDATE"; 588 case SVGA_CMD_RECT_COPY: return "SVGA_CMD_RECT_COPY"; 589 case SVGA_CMD_DEFINE_CURSOR: return "SVGA_CMD_DEFINE_CURSOR"; 590 case SVGA_CMD_DEFINE_ALPHA_CURSOR: return "SVGA_CMD_DEFINE_ALPHA_CURSOR"; 591 case SVGA_CMD_UPDATE_VERBOSE: return "SVGA_CMD_UPDATE_VERBOSE"; 592 case SVGA_CMD_FRONT_ROP_FILL: return "SVGA_CMD_FRONT_ROP_FILL"; 593 case SVGA_CMD_FENCE: return "SVGA_CMD_FENCE"; 594 case SVGA_CMD_ESCAPE: return "SVGA_CMD_ESCAPE"; 595 case SVGA_CMD_DEFINE_SCREEN: return "SVGA_CMD_DEFINE_SCREEN"; 596 case SVGA_CMD_DESTROY_SCREEN: return "SVGA_CMD_DESTROY_SCREEN"; 597 case SVGA_CMD_DEFINE_GMRFB: return "SVGA_CMD_DEFINE_GMRFB"; 598 case SVGA_CMD_BLIT_GMRFB_TO_SCREEN: return "SVGA_CMD_BLIT_GMRFB_TO_SCREEN"; 599 case SVGA_CMD_BLIT_SCREEN_TO_GMRFB: return "SVGA_CMD_BLIT_SCREEN_TO_GMRFB"; 600 case SVGA_CMD_ANNOTATION_FILL: return "SVGA_CMD_ANNOTATION_FILL"; 601 case SVGA_CMD_ANNOTATION_COPY: return "SVGA_CMD_ANNOTATION_COPY"; 602 case SVGA_CMD_DEFINE_GMR2: return "SVGA_CMD_DEFINE_GMR2"; 603 case SVGA_CMD_REMAP_GMR2: return "SVGA_CMD_REMAP_GMR2"; 604 case SVGA_3D_CMD_SURFACE_DEFINE: return "SVGA_3D_CMD_SURFACE_DEFINE"; 605 case SVGA_3D_CMD_SURFACE_DESTROY: return "SVGA_3D_CMD_SURFACE_DESTROY"; 606 case SVGA_3D_CMD_SURFACE_COPY: return "SVGA_3D_CMD_SURFACE_COPY"; 607 case SVGA_3D_CMD_SURFACE_STRETCHBLT: return "SVGA_3D_CMD_SURFACE_STRETCHBLT"; 608 case SVGA_3D_CMD_SURFACE_DMA: return "SVGA_3D_CMD_SURFACE_DMA"; 609 case SVGA_3D_CMD_CONTEXT_DEFINE: return "SVGA_3D_CMD_CONTEXT_DEFINE"; 610 case SVGA_3D_CMD_CONTEXT_DESTROY: return "SVGA_3D_CMD_CONTEXT_DESTROY"; 611 case SVGA_3D_CMD_SETTRANSFORM: return "SVGA_3D_CMD_SETTRANSFORM"; 612 case SVGA_3D_CMD_SETZRANGE: return "SVGA_3D_CMD_SETZRANGE"; 613 case SVGA_3D_CMD_SETRENDERSTATE: return "SVGA_3D_CMD_SETRENDERSTATE"; 614 case SVGA_3D_CMD_SETRENDERTARGET: return "SVGA_3D_CMD_SETRENDERTARGET"; 615 case SVGA_3D_CMD_SETTEXTURESTATE: return "SVGA_3D_CMD_SETTEXTURESTATE"; 616 case SVGA_3D_CMD_SETMATERIAL: return "SVGA_3D_CMD_SETMATERIAL"; 617 case SVGA_3D_CMD_SETLIGHTDATA: return "SVGA_3D_CMD_SETLIGHTDATA"; 618 case SVGA_3D_CMD_SETLIGHTENABLED: return "SVGA_3D_CMD_SETLIGHTENABLED"; 619 case SVGA_3D_CMD_SETVIEWPORT: return "SVGA_3D_CMD_SETVIEWPORT"; 620 case SVGA_3D_CMD_SETCLIPPLANE: return "SVGA_3D_CMD_SETCLIPPLANE"; 621 case SVGA_3D_CMD_CLEAR: return "SVGA_3D_CMD_CLEAR"; 622 case SVGA_3D_CMD_PRESENT: return "SVGA_3D_CMD_PRESENT"; 623 case SVGA_3D_CMD_SHADER_DEFINE: return "SVGA_3D_CMD_SHADER_DEFINE"; 624 case SVGA_3D_CMD_SHADER_DESTROY: return "SVGA_3D_CMD_SHADER_DESTROY"; 625 case SVGA_3D_CMD_SET_SHADER: return "SVGA_3D_CMD_SET_SHADER"; 626 case SVGA_3D_CMD_SET_SHADER_CONST: return "SVGA_3D_CMD_SET_SHADER_CONST"; 627 case SVGA_3D_CMD_DRAW_PRIMITIVES: return "SVGA_3D_CMD_DRAW_PRIMITIVES"; 628 case SVGA_3D_CMD_SETSCISSORRECT: return "SVGA_3D_CMD_SETSCISSORRECT"; 629 case SVGA_3D_CMD_BEGIN_QUERY: return "SVGA_3D_CMD_BEGIN_QUERY"; 630 case SVGA_3D_CMD_END_QUERY: return "SVGA_3D_CMD_END_QUERY"; 631 case SVGA_3D_CMD_WAIT_FOR_QUERY: return "SVGA_3D_CMD_WAIT_FOR_QUERY"; 632 case SVGA_3D_CMD_PRESENT_READBACK: return "SVGA_3D_CMD_PRESENT_READBACK"; 633 case SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN:return "SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN"; 634 case SVGA_3D_CMD_SURFACE_DEFINE_V2: return "SVGA_3D_CMD_SURFACE_DEFINE_V2"; 635 case SVGA_3D_CMD_GENERATE_MIPMAPS: return "SVGA_3D_CMD_GENERATE_MIPMAPS"; 636 case SVGA_3D_CMD_ACTIVATE_SURFACE: return "SVGA_3D_CMD_ACTIVATE_SURFACE"; 637 case SVGA_3D_CMD_DEACTIVATE_SURFACE: return "SVGA_3D_CMD_DEACTIVATE_SURFACE"; 638 default: return "UNKNOWN"; 645 639 } 646 640 }
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