Changeset 6532 in vbox

Timestamp:

Jan 28, 2008 6:10:09 PM (17 years ago)

Author:

vboxsync

Message:

Cleaned out the PGM_DYNAMIC_RAM_ALLOC tests to avoid unnecessary mess with VBOX_WITH_NEW_PHYS_CODE.

Location:

trunk

Files:

• include/VBox/pgm.h (modified) (1 diff)
• src/VBox/VMM/MM.cpp (modified) (2 diffs)
• src/VBox/VMM/PGMPhys.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMAll/PGMAllPhys.cpp (modified) (2 diffs)
• src/recompiler/cpu-all.h (modified) (18 diffs)
• src/recompiler/exec-all.h (modified) (23 diffs)
• src/recompiler/exec.c (modified) (91 diffs)

trunk/include/VBox/pgm.h

@@ -38 +38 @@
  * @{
  */
-
-/** Enable dynamic allocation of guest physical RAM. */
-#define PGM_DYNAMIC_RAM_ALLOC
 
 /** Chunk size for dynamically allocated physical memory. */

trunk/src/VBox/VMM/MM.cpp

@@ -209 +209 @@
             return VINF_SUCCESS;
         }
-#ifdef PGM_DYNAMIC_RAM_ALLOC
         Log(("MM: %llu bytes of RAM%s\n", cbRam, fPreAlloc ? " (PreAlloc)" : ""));
         pVM->mm.s.pvRamBaseHC = 0; /** @todo obsolete */
@@ -233 +232 @@
             }
         }
-#else
-        unsigned    cPages = cbRam >> PAGE_SHIFT;
-        Log(("MM: %llu bytes of RAM (%d pages)\n", cbRam, cPages));
-        rc = SUPPageAlloc(cPages, &pVM->mm.s.pvRamBaseHC);
-        if (VBOX_SUCCESS(rc))
-        {
-            pVM->mm.s.cbRamBase = cPages << PAGE_SHIFT;
-            rc = MMR3PhysRegister(pVM, pVM->mm.s.pvRamBaseHC, 0, pVM->mm.s.cbRamBase, 0, "Main Memory");
-            if (VBOX_SUCCESS(rc))
-                return rc;
-            SUPPageFree(pVM->mm.s.pvRamBaseHC);
-        }
-        else
-            LogRel(("MMR3InitPage: Failed to allocate %u bytes of RAM! rc=%Vrc\n", cPages << PAGE_SHIFT));
-#endif
     }
     else

trunk/src/VBox/VMM/PGMPhys.cpp

@@ -268 +268 @@
 PGMR3DECL(int) PGMR3PhysRegisterChunk(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc)
 {
-#ifdef PGM_DYNAMIC_RAM_ALLOC
     NOREF(pszDesc);
 
@@ -325 +324 @@
 
     return VINF_SUCCESS;
-#else /* !PGM_DYNAMIC_RAM_ALLOC */
-    AssertReleaseMsgFailed(("Shouldn't ever get here when PGM_DYNAMIC_RAM_ALLOC isn't defined!\n"));
-    return VERR_INTERNAL_ERROR;
-#endif /* !PGM_DYNAMIC_RAM_ALLOC */
 }
 

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -763 +763 @@
 #endif
 
-#ifdef PGM_DYNAMIC_RAM_ALLOC
     if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
     {
@@ -770 +769 @@
         return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
     }
-#endif
 
     PPGMRAMRANGE pRam;

trunk/src/recompiler/cpu-all.h

@@ -1 +1 @@
 /*
  * defines common to all virtual CPUs
- * 
+ *
  *  Copyright (c) 2003 Fabrice Bellard
  *
@@ -33 +33 @@
 #endif
 
-/* some important defines: 
- * 
+/* some important defines:
+ *
  * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
  * memory accesses.
- * 
+ *
  * WORDS_BIGENDIAN : if defined, the host cpu is big endian and
  * otherwise little endian.
- * 
+ *
  * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
- * 
+ *
  * TARGET_WORDS_BIGENDIAN : same for target cpu
  */
@@ -156 +156 @@
  * (empty): integer access
  *   f    : float access
- * 
+ *
  * sign is:
  * (empty): for floats or 32 bit size
@@ -167 +167 @@
  *   l: 32 bits
  *   q: 64 bits
- * 
+ *
  * endian is:
  * (empty): target cpu endianness or 8 bit access
@@ -196 +196 @@
 void     remR3PhysWriteU64(RTGCPHYS DstGCPhys, uint64_t val);
 
-#ifdef PGM_DYNAMIC_RAM_ALLOC
 void     remR3GrowDynRange(unsigned long physaddr);
-#endif
 #if 0 /*defined(RT_ARCH_AMD64) && defined(VBOX_STRICT)*/
 # define VBOX_CHECK_ADDR(ptr) do { if ((uintptr_t)(ptr) >= _4G) __asm__("int3"); } while (0)
 #else
 # define VBOX_CHECK_ADDR(ptr) do { } while (0)
-#endif 
+#endif
 
 static inline int ldub_p(void *ptr)
@@ -759 +757 @@
 
 
-#if defined(CONFIG_USER_ONLY) 
+#if defined(CONFIG_USER_ONLY)
 
 /* if user mode, no other memory access functions */
@@ -821 +819 @@
 /* original state of the write flag (used when tracking self-modifying
    code */
-#define PAGE_WRITE_ORG 0x0010 
+#define PAGE_WRITE_ORG 0x0010
 
 void page_dump(FILE *f);
@@ -892 +890 @@
 #endif /* SINGLE_CPU_DEFINES */
 
-void cpu_dump_state(CPUState *env, FILE *f, 
+void cpu_dump_state(CPUState *env, FILE *f,
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
                     int flags);
@@ -938 +936 @@
 target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
 
-#define CPU_LOG_TB_OUT_ASM (1 << 0) 
+#define CPU_LOG_TB_OUT_ASM (1 << 0)
 #define CPU_LOG_TB_IN_ASM  (1 << 1)
 #define CPU_LOG_TB_OP      (1 << 2)
@@ -985 +983 @@
 extern uint32_t phys_ram_dirty_size;
 #endif /* VBOX */
-#if !defined(VBOX) || !(defined(PGM_DYNAMIC_RAM_ALLOC) || defined(REM_PHYS_ADDR_IN_TLB))
+#if !defined(VBOX)
 extern uint8_t *phys_ram_base;
 #endif
@@ -999 +997 @@
 #define IO_MEM_UNASSIGNED  (2 << IO_MEM_SHIFT)
 #define IO_MEM_NOTDIRTY    (4 << IO_MEM_SHIFT) /* used internally, never use directly */
-#if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
+#if defined(VBOX)
 #define IO_MEM_RAM_MISSING (5 << IO_MEM_SHIFT) /* used internally, never use directly */
 #endif
@@ -1010 +1008 @@
 typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
 
-void cpu_register_physical_memory(target_phys_addr_t start_addr, 
+void cpu_register_physical_memory(target_phys_addr_t start_addr,
                                   unsigned long size,
                                   unsigned long phys_offset);
@@ -1023 +1021 @@
 void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
                             int len, int is_write);
-static inline void cpu_physical_memory_read(target_phys_addr_t addr, 
+static inline void cpu_physical_memory_read(target_phys_addr_t addr,
                                             uint8_t *buf, int len)
 {
     cpu_physical_memory_rw(addr, buf, len, 0);
 }
-static inline void cpu_physical_memory_write(target_phys_addr_t addr, 
+static inline void cpu_physical_memory_write(target_phys_addr_t addr,
                                              const uint8_t *buf, int len)
 {
@@ -1043 +1041 @@
 void stq_phys(target_phys_addr_t addr, uint64_t val);
 
-void cpu_physical_memory_write_rom(target_phys_addr_t addr, 
+void cpu_physical_memory_write_rom(target_phys_addr_t addr,
                                    const uint8_t *buf, int len);
-int cpu_memory_rw_debug(CPUState *env, target_ulong addr, 
+int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
                         uint8_t *buf, int len, int is_write);
 
@@ -1065 +1063 @@
 }
 
-static inline int cpu_physical_memory_get_dirty(ram_addr_t addr, 
+static inline int cpu_physical_memory_get_dirty(ram_addr_t addr,
                                                 int dirty_flags)
 {
@@ -1082 +1080 @@
 {
 #ifdef VBOX
-    if (RT_UNLIKELY((addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size)) 
+    if (RT_UNLIKELY((addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
     {
         Log(("cpu_physical_memory_is_dirty: %VGp\n", (RTGCPHYS)addr));
@@ -1104 +1102 @@
 #if defined(__powerpc__)
 
-static inline uint32_t get_tbl(void) 
+static inline uint32_t get_tbl(void)
 {
     uint32_t tbl;
@@ -1111 +1109 @@
 }
 
-static inline uint32_t get_tbu(void) 
+static inline uint32_t get_tbu(void)
 {
         uint32_t tbl;

trunk/src/recompiler/exec-all.h

@@ -1 +1 @@
 /*
  * internal execution defines for qemu
- * 
+ *
  *  Copyright (c) 2003 Fabrice Bellard
  *
@@ -22 +22 @@
 #ifndef VBOX
 #define DEBUG_DISAS
-#endif 
+#endif
 
 #ifdef VBOX
@@ -82 +82 @@
 typedef void (GenOpFunc2)(long, long);
 typedef void (GenOpFunc3)(long, long, long);
-                    
+
 #if defined(TARGET_I386)
 
@@ -97 +97 @@
 int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,
                  int max_code_size, int *gen_code_size_ptr);
-int cpu_restore_state(struct TranslationBlock *tb, 
+int cpu_restore_state(struct TranslationBlock *tb,
                       CPUState *env, unsigned long searched_pc,
                       void *puc);
 int cpu_gen_code_copy(CPUState *env, struct TranslationBlock *tb,
                       int max_code_size, int *gen_code_size_ptr);
-int cpu_restore_state_copy(struct TranslationBlock *tb, 
+int cpu_restore_state_copy(struct TranslationBlock *tb,
                            CPUState *env, unsigned long searched_pc,
                            void *puc);
@@ -108 +108 @@
 void cpu_exec_init(CPUState *env);
 int page_unprotect(target_ulong address, unsigned long pc, void *puc);
-void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, 
+void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
                                    int is_cpu_write_access);
 void tb_invalidate_page_range(target_ulong start, target_ulong end);
 void tlb_flush_page(CPUState *env, target_ulong addr);
 void tlb_flush(CPUState *env, int flush_global);
-int tlb_set_page_exec(CPUState *env, target_ulong vaddr, 
-                      target_phys_addr_t paddr, int prot, 
+int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
+                      target_phys_addr_t paddr, int prot,
                       int is_user, int is_softmmu);
-static inline int tlb_set_page(CPUState *env, target_ulong vaddr, 
-                               target_phys_addr_t paddr, int prot, 
+static inline int tlb_set_page(CPUState *env, target_ulong vaddr,
+                               target_phys_addr_t paddr, int prot,
                                int is_user, int is_softmmu)
 {
@@ -167 +167 @@
 #define CODE_GEN_MAX_BLOCKS    (CODE_GEN_BUFFER_SIZE / CODE_GEN_AVG_BLOCK_SIZE)
 
-#if defined(__powerpc__) 
+#if defined(__powerpc__)
 #define USE_DIRECT_JUMP
 #endif
@@ -194 +194 @@
     uint8_t *tc_ptr;    /* pointer to the translated code */
     /* next matching tb for physical address. */
-    struct TranslationBlock *phys_hash_next; 
+    struct TranslationBlock *phys_hash_next;
     /* first and second physical page containing code. The lower bit
        of the pointer tells the index in page_next[] */
-    struct TranslationBlock *page_next[2]; 
-    target_ulong page_addr[2]; 
+    struct TranslationBlock *page_next[2];
+    target_ulong page_addr[2];
 
     /* the following data are used to directly call another TB from
@@ -215 +215 @@
        the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =
        jmp_first */
-    struct TranslationBlock *jmp_next[2]; 
+    struct TranslationBlock *jmp_next[2];
     struct TranslationBlock *jmp_first;
 } TranslationBlock;
@@ -241 +241 @@
 TranslationBlock *tb_alloc(target_ulong pc);
 void tb_flush(CPUState *env);
-void tb_link_phys(TranslationBlock *tb, 
+void tb_link_phys(TranslationBlock *tb,
                   target_ulong phys_pc, target_ulong phys_page2);
 
@@ -277 +277 @@
 #endif
 
-static inline void tb_set_jmp_target(TranslationBlock *tb, 
+static inline void tb_set_jmp_target(TranslationBlock *tb,
                                      int n, unsigned long addr)
 {
@@ -292 +292 @@
 
 /* set the jump target */
-static inline void tb_set_jmp_target(TranslationBlock *tb, 
+static inline void tb_set_jmp_target(TranslationBlock *tb,
                                      int n, unsigned long addr)
 {
@@ -300 +300 @@
 #endif
 
-static inline void tb_add_jump(TranslationBlock *tb, int n, 
+static inline void tb_add_jump(TranslationBlock *tb, int n,
                                TranslationBlock *tb_next)
 {
@@ -307 +307 @@
         /* patch the native jump address */
         tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);
-        
+
         /* add in TB jmp circular list */
         tb->jmp_next[n] = tb_next->jmp_first;
@@ -388 +388 @@
     dummy_label ## n: ;\
     } while (0)
-#  endif 
+#  endif
 # else /* !VBOX */
 #define GOTO_TB(opname, tbparam, n)\
@@ -429 +429 @@
 {
     long int readval = 0;
-    
+
     __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
                           : "+m" (*p), "+a" (readval)
@@ -442 +442 @@
 {
     long int readval = 0;
-    
+
     __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
                           : "+m" (*p), "+a" (readval)
@@ -459 +459 @@
                           "   jl    0b"
                           : "=&d" (ret)
-                          : "r" (1), "a" (p), "0" (*p) 
+                          : "r" (1), "a" (p), "0" (*p)
                           : "cc", "memory" );
     return ret;
@@ -505 +505 @@
                          : "=r"(ret)
                          : "0"(1), "r"(spinlock));
-    
+
     return ret;
 }
@@ -571 +571 @@
 #if !defined(CONFIG_USER_ONLY)
 
-void tlb_fill(target_ulong addr, int is_write, int is_user, 
+void tlb_fill(target_ulong addr, int is_write, int is_user,
               void *retaddr);
 
@@ -604 +604 @@
 # ifdef VBOX
 target_ulong remR3PhysGetPhysicalAddressCode(CPUState *env, target_ulong addr, CPUTLBEntry *pTLBEntry);
-#  if defined(PGM_DYNAMIC_RAM_ALLOC) && !defined(REM_PHYS_ADDR_IN_TLB)
+#  if !defined(REM_PHYS_ADDR_IN_TLB)
 target_ulong remR3HCVirt2GCPhys(void *env, void *addr);
 #  endif
@@ -631 +631 @@
 #error unimplemented CPU
 #endif
-    if (__builtin_expect(env->tlb_table[is_user][index].addr_code != 
+    if (__builtin_expect(env->tlb_table[is_user][index].addr_code !=
                          (addr & TARGET_PAGE_MASK), 0)) {
         ldub_code(addr);
@@ -646 +646 @@
 # if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     return addr + env->tlb_table[is_user][index].addend;
-# elif defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
+# elif defined(VBOX)
     return remR3HCVirt2GCPhys(env, (void *)(addr + env->tlb_table[is_user][index].addend));
 # else
@@ -670 +670 @@
 {
     return(env->kqemu_enabled &&
-           (env->cr[0] & CR0_PE_MASK) && 
+           (env->cr[0] & CR0_PE_MASK) &&
            !(env->hflags & HF_INHIBIT_IRQ_MASK) &&
            (env->eflags & IF_MASK) &&
            !(env->eflags & VM_MASK) &&
-           (env->kqemu_enabled == 2 || 
+           (env->kqemu_enabled == 2 ||
             ((env->hflags & HF_CPL_MASK) == 3 &&
              (env->eflags & IOPL_MASK) != IOPL_MASK)));

trunk/src/recompiler/exec.c

@@ -1 +1 @@
 /*
  *  virtual page mapping and translated block handling
- * 
+ *
  *  Copyright (c) 2003 Fabrice Bellard
  *
@@ -55 +55 @@
 
 /* make various TB consistency checks */
-//#define DEBUG_TB_CHECK 
-//#define DEBUG_TLB_CHECK 
+//#define DEBUG_TB_CHECK
+//#define DEBUG_TLB_CHECK
 
 #if !defined(CONFIG_USER_ONLY)
@@ -86 +86 @@
 spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;
 
-uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] 
+uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE]
 #if defined(__MINGW32__)
     __attribute__((aligned (16)));
 #else
     __attribute__((aligned (32)));
-#endif 
+#endif
 uint8_t *code_gen_ptr;
 
@@ -100 +100 @@
 #else /* VBOX */
 RTGCPHYS phys_ram_size;
-/* we have memory ranges (the high PC-BIOS mapping) which 
+/* we have memory ranges (the high PC-BIOS mapping) which
    causes some pages to fall outside the dirty map here. */
 uint32_t phys_ram_dirty_size;
 #endif /* VBOX */
-#if !defined(VBOX) || !(defined(PGM_DYNAMIC_RAM_ALLOC) || defined(REM_PHYS_ADDR_IN_TLB))
+#if !defined(VBOX)
 uint8_t *phys_ram_base;
 #endif
@@ -112 +112 @@
 /* current CPU in the current thread. It is only valid inside
    cpu_exec() */
-CPUState *cpu_single_env; 
+CPUState *cpu_single_env;
 
 typedef struct PageDesc {
@@ -181 +181 @@
         SYSTEM_INFO system_info;
         DWORD old_protect;
-        
+
         GetSystemInfo(&system_info);
         qemu_real_host_page_size = system_info.dwPageSize;
-        
+
         VirtualProtect(code_gen_buffer, sizeof(code_gen_buffer),
                        PAGE_EXECUTE_READWRITE, &old_protect);
@@ -195 +195 @@
         start = (unsigned long)code_gen_buffer;
         start &= ~(qemu_real_host_page_size - 1);
-        
+
         end = (unsigned long)code_gen_buffer + sizeof(code_gen_buffer);
         end += qemu_real_host_page_size - 1;
         end &= ~(qemu_real_host_page_size - 1);
-        
-        mprotect((void *)start, end - start, 
+
+        mprotect((void *)start, end - start,
                  PROT_READ | PROT_WRITE | PROT_EXEC);
     }
@@ -277 +277 @@
           pd[i].phys_offset = IO_MEM_UNASSIGNED;
     }
-#if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
+#if defined(VBOX)
     pd = ((PhysPageDesc *)pd) + (index & (L2_SIZE - 1));
     if (RT_UNLIKELY((pd->phys_offset & ~TARGET_PAGE_MASK) == IO_MEM_RAM_MISSING))
@@ -294 +294 @@
 #if !defined(CONFIG_USER_ONLY)
 static void tlb_protect_code(ram_addr_t ram_addr);
-static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr, 
+static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr,
                                     target_ulong vaddr);
 #endif
@@ -352 +352 @@
     CPUState *env;
 #if defined(DEBUG_FLUSH)
-    printf("qemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n", 
-           code_gen_ptr - code_gen_buffer, 
-           nb_tbs, 
+    printf("qemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
+           code_gen_ptr - code_gen_buffer,
+           nb_tbs,
            nb_tbs > 0 ? (code_gen_ptr - code_gen_buffer) / nb_tbs : 0);
 #endif
     nb_tbs = 0;
-    
+
     for(env = first_cpu; env != NULL; env = env->next_cpu) {
         memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));
@@ -395 +395 @@
     TranslationBlock *tb;
     int i, flags1, flags2;
-    
+
     for(i = 0;i < CODE_GEN_PHYS_HASH_SIZE; i++) {
         for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {
@@ -504 +504 @@
     target_ulong phys_pc;
     TranslationBlock *tb1, *tb2;
-    
+
     /* remove the TB from the hash list */
     phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);
     h = tb_phys_hash_func(phys_pc);
-    tb_remove(&tb_phys_hash[h], tb, 
+    tb_remove(&tb_phys_hash[h], tb,
               offsetof(TranslationBlock, phys_hash_next));
 
@@ -570 +570 @@
     pc = cs_base + eip;
 
-    tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base, 
+    tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base,
                  flags);
 
-    if(tb) 
+    if(tb)
     {
 #  ifdef DEBUG
@@ -631 +631 @@
     int n, tb_start, tb_end;
     TranslationBlock *tb;
-    
+
     p->code_bitmap = qemu_malloc(TARGET_PAGE_SIZE / 8);
     if (!p->code_bitmap)
@@ -660 +660 @@
 #ifdef TARGET_HAS_PRECISE_SMC
 
-static void tb_gen_code(CPUState *env, 
+static void tb_gen_code(CPUState *env,
                         target_ulong pc, target_ulong cs_base, int flags,
                         int cflags)
@@ -684 +684 @@
     cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size);
     code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
-    
+
     /* check next page if needed */
     virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;
@@ -694 +694 @@
 }
 #endif
-    
+
 /* invalidate all TBs which intersect with the target physical page
    starting in range [start;end[. NOTE: start and end must refer to
@@ -700 +700 @@
    from a real cpu write access: the virtual CPU will exit the current
    TB if code is modified inside this TB. */
-void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, 
+void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
                                    int is_cpu_write_access)
 {
@@ -711 +711 @@
 
     p = page_find(start >> TARGET_PAGE_BITS);
-    if (!p) 
+    if (!p)
         return;
-    if (!p->code_bitmap && 
+    if (!p->code_bitmap &&
         ++p->code_write_count >= SMC_BITMAP_USE_THRESHOLD &&
         is_cpu_write_access) {
@@ -760 +760 @@
                 would require a specialized function to partially
                 restore the CPU state */
-                
+
                 current_tb_modified = 1;
-                cpu_restore_state(current_tb, env, 
+                cpu_restore_state(current_tb, env,
                                   env->mem_write_pc, NULL);
 #if defined(TARGET_I386)
@@ -805 +805 @@
            itself */
         env->current_tb = NULL;
-        tb_gen_code(env, current_pc, current_cs_base, current_flags, 
+        tb_gen_code(env, current_pc, current_cs_base, current_flags,
                     CF_SINGLE_INSN);
         cpu_resume_from_signal(env, NULL);
@@ -820 +820 @@
     if (1) {
         if (loglevel) {
-            fprintf(logfile, "modifying code at 0x%x size=%d EIP=%x PC=%08x\n", 
-                   cpu_single_env->mem_write_vaddr, len, 
-                   cpu_single_env->eip, 
+            fprintf(logfile, "modifying code at 0x%x size=%d EIP=%x PC=%08x\n",
+                   cpu_single_env->mem_write_vaddr, len,
+                   cpu_single_env->eip,
                    cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
         }
@@ -828 +828 @@
 #endif
     p = page_find(start >> TARGET_PAGE_BITS);
-    if (!p) 
+    if (!p)
         return;
     if (p->code_bitmap) {
@@ -842 +842 @@
 
 #if !defined(CONFIG_SOFTMMU)
-static void tb_invalidate_phys_page(target_ulong addr, 
+static void tb_invalidate_phys_page(target_ulong addr,
                                     unsigned long pc, void *puc)
 {
@@ -855 +855 @@
     addr &= TARGET_PAGE_MASK;
     p = page_find(addr >> TARGET_PAGE_BITS);
-    if (!p) 
+    if (!p)
         return;
     tb = p->first_tb;
@@ -879 +879 @@
                    would require a specialized function to partially
                    restore the CPU state */
-            
+
             current_tb_modified = 1;
             cpu_restore_state(current_tb, env, pc, puc);
@@ -902 +902 @@
            itself */
         env->current_tb = NULL;
-        tb_gen_code(env, current_pc, current_cs_base, current_flags, 
+        tb_gen_code(env, current_pc, current_cs_base, current_flags,
                     CF_SINGLE_INSN);
         cpu_resume_from_signal(env, puc);
@@ -911 +911 @@
 
 /* add the tb in the target page and protect it if necessary */
-static inline void tb_alloc_page(TranslationBlock *tb, 
+static inline void tb_alloc_page(TranslationBlock *tb,
                                  unsigned int n, target_ulong page_addr)
 {
@@ -946 +946 @@
             page_get_flags(addr);
           }
-        mprotect(g2h(page_addr), qemu_host_page_size, 
+        mprotect(g2h(page_addr), qemu_host_page_size,
                  (prot & PAGE_BITS) & ~PAGE_WRITE);
 #ifdef DEBUG_TB_INVALIDATE
-        printf("protecting code page: 0x%08lx\n", 
+        printf("protecting code page: 0x%08lx\n",
                page_addr);
 #endif
@@ -971 +971 @@
     TranslationBlock *tb;
 
-    if (nb_tbs >= CODE_GEN_MAX_BLOCKS || 
+    if (nb_tbs >= CODE_GEN_MAX_BLOCKS ||
         (code_gen_ptr - code_gen_buffer) >= CODE_GEN_BUFFER_MAX_SIZE)
         return NULL;
@@ -982 +982 @@
 /* add a new TB and link it to the physical page tables. phys_page2 is
    (-1) to indicate that only one page contains the TB. */
-void tb_link_phys(TranslationBlock *tb, 
+void tb_link_phys(TranslationBlock *tb,
                   target_ulong phys_pc, target_ulong phys_page2)
 {
@@ -1048 +1048 @@
             m_min = m + 1;
         }
-    } 
+    }
     return &tbs[m_max];
 }
@@ -1084 +1084 @@
         *ptb = tb->jmp_next[n];
         tb->jmp_next[n] = NULL;
-        
+
         /* suppress the jump to next tb in generated code */
         tb_reset_jump(tb, n);
@@ -1124 +1124 @@
 #if defined(TARGET_HAS_ICE)
     int i;
-    
+
     for(i = 0; i < env->nb_breakpoints; i++) {
         if (env->breakpoints[i] == pc)
@@ -1133 +1133 @@
         return -1;
     env->breakpoints[env->nb_breakpoints++] = pc;
-    
+
     breakpoint_invalidate(env, pc);
     return 0;
@@ -1243 +1243 @@
 #ifndef VBOX
 CPULogItem cpu_log_items[] = {
-    { CPU_LOG_TB_OUT_ASM, "out_asm", 
+    { CPU_LOG_TB_OUT_ASM, "out_asm",
       "show generated host assembly code for each compiled TB" },
     { CPU_LOG_TB_IN_ASM, "in_asm",
       "show target assembly code for each compiled TB" },
-    { CPU_LOG_TB_OP, "op", 
+    { CPU_LOG_TB_OP, "op",
       "show micro ops for each compiled TB (only usable if 'in_asm' used)" },
 #ifdef TARGET_I386
@@ -1276 +1276 @@
     return memcmp(s1, s2, n) == 0;
 }
-      
+
 /* takes a comma separated list of log masks. Return 0 if error. */
 int cpu_str_to_log_mask(const char *str)
@@ -1373 +1373 @@
 static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
 {
-    if (addr == (tlb_entry->addr_read & 
+    if (addr == (tlb_entry->addr_read &
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||
-        addr == (tlb_entry->addr_write & 
+        addr == (tlb_entry->addr_write &
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||
-        addr == (tlb_entry->addr_code & 
+        addr == (tlb_entry->addr_code &
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
         tlb_entry->addr_read = -1;
@@ -1429 +1429 @@
 static void tlb_protect_code(ram_addr_t ram_addr)
 {
-    cpu_physical_memory_reset_dirty(ram_addr, 
+    cpu_physical_memory_reset_dirty(ram_addr,
                                     ram_addr + TARGET_PAGE_SIZE,
                                     CODE_DIRTY_FLAG);
@@ -1440 +1440 @@
 /* update the TLB so that writes in physical page 'phys_addr' are no longer
    tested for self modifying code */
-static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr, 
+static void tlb_unprotect_code_phys(CPUState *env, ram_addr_t ram_addr,
                                     target_ulong vaddr)
 {
 #ifdef VBOX
     if (RT_LIKELY((ram_addr >> TARGET_PAGE_BITS) < phys_ram_dirty_size))
-#endif 
+#endif
     phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] |= CODE_DIRTY_FLAG;
 }
 
-static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, 
+static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
                                          unsigned long start, unsigned long length)
 {
@@ -1492 +1492 @@
 #ifdef VBOX
     if (RT_LIKELY((start >> TARGET_PAGE_BITS) < phys_ram_dirty_size))
-#endif 
+#endif
     for(i = 0; i < len; i++)
         p[i] &= mask;
@@ -1500 +1500 @@
 #if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     start1 = start;
-#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
+#elif !defined(VBOX)
     start1 = start + (unsigned long)phys_ram_base;
 #else
@@ -1531 +1531 @@
                         (p->prot & PROT_WRITE)) {
                         if (addr < MMAP_AREA_END) {
-                            mprotect((void *)addr, TARGET_PAGE_SIZE, 
+                            mprotect((void *)addr, TARGET_PAGE_SIZE,
                                      p->prot & ~PROT_WRITE);
                         }
@@ -1552 +1552 @@
 #if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
         ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend;
-#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
-        ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + 
+#elif !defined(VBOX)
+        ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) +
             tlb_entry->addend - (unsigned long)phys_ram_base;
 #else
@@ -1574 +1574 @@
 }
 
-static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, 
+static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry,
                                   unsigned long start)
 {
@@ -1603 +1603 @@
    (can only happen in non SOFTMMU mode for I/O pages or pages
    conflicting with the host address space). */
-int tlb_set_page_exec(CPUState *env, target_ulong vaddr, 
-                      target_phys_addr_t paddr, int prot, 
+int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
+                      target_phys_addr_t paddr, int prot,
                       int is_user, int is_softmmu)
 {
@@ -1628 +1628 @@
     ret = 0;
 #if !defined(CONFIG_SOFTMMU)
-    if (is_softmmu) 
+    if (is_softmmu)
 #endif
     {
@@ -1640 +1640 @@
 #if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
             addend = pd & TARGET_PAGE_MASK;
-#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
+#elif !defined(VBOX)
             addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);
 #else
             addend = (unsigned long)remR3GCPhys2HCVirt(env, pd & TARGET_PAGE_MASK);
-#endif 
-        }
-        
+#endif
+        }
+
         index = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
         addend -= vaddr;
@@ -1662 +1662 @@
         }
         if (prot & PAGE_WRITE) {
-            if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM || 
+            if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM ||
                 (pd & IO_MEM_ROMD)) {
                 /* write access calls the I/O callback */
-                te->addr_write = vaddr | 
+                te->addr_write = vaddr |
                     (pd & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
-            } else if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM && 
+            } else if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM &&
                        !cpu_physical_memory_is_dirty(pd)) {
                 te->addr_write = vaddr | IO_MEM_NOTDIRTY;
@@ -1695 +1695 @@
             } else {
                 if (prot & PROT_WRITE) {
-                    if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM || 
+                    if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM ||
 #if defined(TARGET_HAS_SMC) || 1
                         first_tb ||
 #endif
-                        ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM && 
+                        ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM &&
                          !cpu_physical_memory_is_dirty(pd))) {
                         /* ROM: we do as if code was inside */
@@ -1705 +1705 @@
                            original mapping */
                         VirtPageDesc *vp;
-                        
+
                         vp = virt_page_find_alloc(vaddr >> TARGET_PAGE_BITS, 1);
                         vp->phys_addr = pd;
@@ -1713 +1713 @@
                     }
                 }
-                map_addr = mmap((void *)vaddr, TARGET_PAGE_SIZE, prot, 
+                map_addr = mmap((void *)vaddr, TARGET_PAGE_SIZE, prot,
                                 MAP_SHARED | MAP_FIXED, phys_ram_fd, (pd & TARGET_PAGE_MASK));
                 if (map_addr == MAP_FAILED) {
@@ -1751 +1751 @@
         return 0;
 #if defined(DEBUG_TLB)
-    printf("page_unprotect: addr=0x%08x phys_addr=0x%08x prot=%x\n", 
+    printf("page_unprotect: addr=0x%08x phys_addr=0x%08x prot=%x\n",
            addr, vp->phys_addr, vp->prot);
 #endif
@@ -1784 +1784 @@
 }
 
-int tlb_set_page_exec(CPUState *env, target_ulong vaddr, 
-                      target_phys_addr_t paddr, int prot, 
+int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
+                      target_phys_addr_t paddr, int prot,
                       int is_user, int is_softmmu)
 {
@@ -1818 +1818 @@
                 if (start != -1) {
                     fprintf(f, "%08lx-%08lx %08lx %c%c%c\n",
-                            start, end, end - start, 
+                            start, end, end - start,
                             prot & PAGE_READ ? 'r' : '-',
                             prot & PAGE_WRITE ? 'w' : '-',
@@ -1866 +1866 @@
         /* if the write protection is set, then we invalidate the code
            inside */
-        if (!(p->flags & PAGE_WRITE) && 
+        if (!(p->flags & PAGE_WRITE) &&
             (flags & PAGE_WRITE) &&
             p->first_tb) {
@@ -1901 +1901 @@
         pindex = (address - host_start) >> TARGET_PAGE_BITS;
         if (!(p1[pindex].flags & PAGE_WRITE)) {
-            mprotect((void *)g2h(host_start), qemu_host_page_size, 
+            mprotect((void *)g2h(host_start), qemu_host_page_size,
                      (prot & PAGE_BITS) | PAGE_WRITE);
             p1[pindex].flags |= PAGE_WRITE;
@@ -1940 +1940 @@
    page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an
    io memory page */
-void cpu_register_physical_memory(target_phys_addr_t start_addr, 
+void cpu_register_physical_memory(target_phys_addr_t start_addr,
                                   unsigned long size,
                                   unsigned long phys_offset)
@@ -1953 +1953 @@
         p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
         p->phys_offset = phys_offset;
-#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
+#if !defined(VBOX)
         if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
             (phys_offset & IO_MEM_ROMD))
@@ -1964 +1964 @@
             phys_offset += TARGET_PAGE_SIZE;
     }
-    
+
     /* since each CPU stores ram addresses in its TLB cache, we must
        reset the modified entries */
@@ -2017 +2017 @@
 #if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     ram_addr = addr;
-#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
+#elif !defined(VBOX)
     ram_addr = addr - (unsigned long)phys_ram_base;
 #else
@@ -2062 +2062 @@
 #if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     ram_addr = addr;
-#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
+#elif !defined(VBOX)
     ram_addr = addr - (unsigned long)phys_ram_base;
 #else
@@ -2107 +2107 @@
 #if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
     ram_addr = addr;
-#elif !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
+#elif !defined(VBOX)
     ram_addr = addr - (unsigned long)phys_ram_base;
 #else
@@ -2163 +2163 @@
     cpu_register_io_memory(IO_MEM_UNASSIGNED >> IO_MEM_SHIFT, unassigned_mem_read, unassigned_mem_write, NULL);
     cpu_register_io_memory(IO_MEM_NOTDIRTY >> IO_MEM_SHIFT, error_mem_read, notdirty_mem_write, NULL);
-#if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
+#if defined(VBOX)
     cpu_register_io_memory(IO_MEM_RAM_MISSING >> IO_MEM_SHIFT, unassigned_mem_read, unassigned_mem_write, NULL);
     io_mem_nb = 6;
@@ -2219 +2219 @@
 /* physical memory access (slow version, mainly for debug) */
 #if defined(CONFIG_USER_ONLY)
-void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, 
+void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
                             int len, int is_write)
 {
@@ -2254 +2254 @@
 
 #else
-void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, 
+void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
                             int len, int is_write)
 {
@@ -2263 +2263 @@
     unsigned long pd;
     PhysPageDesc *p;
-    
+
     while (len > 0) {
         page = addr & TARGET_PAGE_MASK;
@@ -2275 +2275 @@
             pd = p->phys_offset;
         }
-        
+
         if (is_write) {
             if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
@@ -2287 +2287 @@
 #else
                     val = *(const uint32_t *)buf;
-#endif 
+#endif
                     io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);
                     l = 4;
@@ -2296 +2296 @@
 #else
                     val = *(const uint16_t *)buf;
-#endif 
+#endif
                     io_mem_write[io_index][1](io_mem_opaque[io_index], addr, val);
                     l = 2;
@@ -2305 +2305 @@
 #else
                     val = *(const uint8_t *)buf;
-#endif 
+#endif
                     io_mem_write[io_index][0](io_mem_opaque[io_index], addr, val);
                     l = 1;
@@ -2331 +2331 @@
             }
         } else {
-            if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && 
+            if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
                 !(pd & IO_MEM_ROMD)) {
                 /* I/O case */
@@ -2342 +2342 @@
 #else
                     *(uint32_t *)buf = val;
-#endif 
+#endif
                     l = 4;
                 } else if (l >= 2 && ((addr & 1) == 0)) {
@@ -2351 +2351 @@
 #else
                     *(uint16_t *)buf = val;
-#endif 
+#endif
                     l = 2;
                 } else {
@@ -2360 +2360 @@
 #else
                     *(uint8_t *)buf = val;
-#endif 
+#endif
                     l = 1;
                 }
@@ -2368 +2368 @@
                 remR3PhysRead((pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK), buf, l); NOREF(ptr);
 #else
-                ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + 
+                ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
                     (addr & ~TARGET_PAGE_MASK);
                 memcpy(buf, ptr, l);
@@ -2382 +2382 @@
 #ifndef VBOX
 /* used for ROM loading : can write in RAM and ROM */
-void cpu_physical_memory_write_rom(target_phys_addr_t addr, 
+void cpu_physical_memory_write_rom(target_phys_addr_t addr,
                                    const uint8_t *buf, int len)
 {
@@ -2390 +2390 @@
     unsigned long pd;
     PhysPageDesc *p;
-    
+
     while (len > 0) {
         page = addr & TARGET_PAGE_MASK;
@@ -2402 +2402 @@
             pd = p->phys_offset;
         }
-        
+
         if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&
             (pd & ~TARGET_PAGE_MASK) != IO_MEM_ROM &&
@@ -2437 +2437 @@
         pd = p->phys_offset;
     }
-        
-    if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM && 
+
+    if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
         !(pd & IO_MEM_ROMD)) {
         /* I/O case */
@@ -2446 +2446 @@
         /* RAM case */
 #ifndef VBOX
-        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + 
+        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
             (addr & ~TARGET_PAGE_MASK);
         val = ldl_p(ptr);
@@ -2471 +2471 @@
         pd = p->phys_offset;
     }
-        
+
     if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
         !(pd & IO_MEM_ROMD)) {
@@ -2486 +2486 @@
         /* RAM case */
 #ifndef VBOX
-        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + 
+        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
             (addr & ~TARGET_PAGE_MASK);
         val = ldq_p(ptr);
@@ -2528 +2528 @@
         pd = p->phys_offset;
     }
-        
+
     if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
         io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
@@ -2534 +2534 @@
     } else {
 #ifndef VBOX
-        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + 
+        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
             (addr & ~TARGET_PAGE_MASK);
         stl_p(ptr, val);
@@ -2557 +2557 @@
         pd = p->phys_offset;
     }
-        
+
     if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM) {
         io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
@@ -2609 +2609 @@
 #ifndef VBOX
 /* virtual memory access for debug */
-int cpu_memory_rw_debug(CPUState *env, target_ulong addr, 
+int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
                         uint8_t *buf, int len, int is_write)
 {
@@ -2624 +2624 @@
         if (l > len)
             l = len;
-        cpu_physical_memory_rw(phys_addr + (addr & ~TARGET_PAGE_MASK), 
+        cpu_physical_memory_rw(phys_addr + (addr & ~TARGET_PAGE_MASK),
                                buf, l, is_write);
         len -= l;
@@ -2639 +2639 @@
     int direct_jmp_count, direct_jmp2_count, cross_page;
     TranslationBlock *tb;
-    
+
     target_code_size = 0;
     max_target_code_size = 0;
@@ -2661 +2661 @@
     /* XXX: avoid using doubles ? */
     cpu_fprintf(f, "TB count            %d\n", nb_tbs);
-    cpu_fprintf(f, "TB avg target size  %d max=%d bytes\n", 
+    cpu_fprintf(f, "TB avg target size  %d max=%d bytes\n",
                 nb_tbs ? target_code_size / nb_tbs : 0,
                 max_target_code_size);
-    cpu_fprintf(f, "TB avg host size    %d bytes (expansion ratio: %0.1f)\n", 
+    cpu_fprintf(f, "TB avg host size    %d bytes (expansion ratio: %0.1f)\n",
                 nb_tbs ? (code_gen_ptr - code_gen_buffer) / nb_tbs : 0,
                 target_code_size ? (double) (code_gen_ptr - code_gen_buffer) / target_code_size : 0);
-    cpu_fprintf(f, "cross page TB count %d (%d%%)\n", 
-            cross_page, 
+    cpu_fprintf(f, "cross page TB count %d (%d%%)\n",
+            cross_page,
             nb_tbs ? (cross_page * 100) / nb_tbs : 0);
     cpu_fprintf(f, "direct jump count   %d (%d%%) (2 jumps=%d %d%%)\n",
-                direct_jmp_count, 
+                direct_jmp_count,
                 nb_tbs ? (direct_jmp_count * 100) / nb_tbs : 0,
                 direct_jmp2_count,
@@ -2681 +2681 @@
 #endif /* !VBOX */
 
-#if !defined(CONFIG_USER_ONLY) 
+#if !defined(CONFIG_USER_ONLY)
 
 #define MMUSUFFIX _cmmu