Changeset 65475 in vbox for trunk/src/VBox/VMM

Timestamp:

Jan 27, 2017 5:42:24 AM (8 years ago)

Author:

vboxsync

Message:

VMM/HMVMXR0: Scoping, space.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -12171 +12171 @@
              * We've already saved the APIC related guest-state (TPR) in hmR0VmxPostRunGuest(). When full APIC register
              * virtualization is implemented we'll have to make sure APIC state is saved from the VMCS before
-             *  EMInterpretWrmsr() changes it.
+             * EMInterpretWrmsr() changes it.
              */
             HMCPU_CF_SET(pVCpu, HM_CHANGED_VMX_GUEST_APIC_STATE);
@@ -12439 +12439 @@
     STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExitIO, y1);
 
-    int rc2 = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
-    rc2    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
-    rc2    |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
-    rc2    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);         /* Eflag checks in EMInterpretDisasCurrent(). */
-    rc2    |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);    /* CR0 checks & PGM* in EMInterpretDisasCurrent(). */
-    rc2    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);    /* SELM checks in EMInterpretDisasCurrent(). */
+    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
+    rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
+    rc    |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);         /* Eflag checks in EMInterpretDisasCurrent(). */
+    rc    |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);    /* CR0 checks & PGM* in EMInterpretDisasCurrent(). */
+    rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);    /* SELM checks in EMInterpretDisasCurrent(). */
     /* EFER also required for longmode checks in EMInterpretDisasCurrent(), but it's always up-to-date. */
-    AssertRCReturn(rc2, rc2);
+    AssertRCReturn(rc, rc);
 
     /* Refer Intel spec. 27-5. "Exit Qualifications for I/O Instructions" for the format. */
@@ -12482 +12482 @@
         if (MSR_IA32_VMX_BASIC_INFO_VMCS_INS_OUTS(pVM->hm.s.vmx.Msrs.u64BasicInfo))
         {
-            rc2  = hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
+            int rc2  = hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
             /** @todo optimize this, IEM should request the additional state if it needs it (GP, PF, ++). */
             rc2 |= hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
@@ -12509 +12509 @@
         {
             /** @todo optimize this, IEM should request the additional state if it needs it (GP, PF, ++). */
-            rc2 = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
+            int rc2 = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
             AssertRCReturn(rc2, rc2);
             rcStrict = IEMExecOne(pVCpu);
@@ -12598 +12598 @@
          * Note that the I/O breakpoint type is undefined if CR4.DE is 0.
          */
-        rc2 = hmR0VmxSaveGuestDR7(pVCpu, pMixedCtx);
+        int rc2 = hmR0VmxSaveGuestDR7(pVCpu, pMixedCtx);
         AssertRCReturn(rc2, rc2);