Changeset 65508 in vbox for trunk/src/VBox/VMM

Timestamp:

Jan 29, 2017 5:33:21 PM (8 years ago)

Author:

vboxsync

Message:

IEM: cmpxchg16b fixes (still disabled).

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAll.cpp (modified) (1 diff)
• VMMAll/IEMAllCImpl.cpp.h (modified) (1 diff)
• VMMAll/IEMAllInstructions.cpp.h (modified) (2 diffs)
• testcase/tstIEMCheckMc.cpp (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -10476 +10476 @@
             return iemRaiseGeneralProtectionFault0(pVCpu); \
     } while (0)
+#define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) \
+    do { \
+        if (!((a_EffAddr) & ((a_cbAlign) - 1))) { /* likely */ } \
+        else return iemRaiseGeneralProtectionFault0(pVCpu); \
+    } while (0)
 
 

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -6406 +6406 @@
     Args.pu128RbxRcx    = pu128RbxRcx;
     Args.pEFlags        = pEFlags;
+# ifdef VBOX_STRICT
+    Args.cCalls         = 0;
+# endif
     VBOXSTRICTRC rcStrict = VMMR3EmtRendezvous(pVCpu->CTX_SUFF(pVM), VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
                                                iemCImpl_cmpxchg16b_fallback_rendezvous_callback, &Args);
     Assert(Args.cCalls == 1);
-    RT_NOREF(cbInstr);
+    if (rcStrict == VINF_SUCCESS)
+    {
+        /* Duplicated tail code. */
+        rcStrict = iemMemCommitAndUnmap(pVCpu, pu128Dst, IEM_ACCESS_DATA_RW);
+        if (rcStrict == VINF_SUCCESS)
+        {
+            PCPUMCTX pCtx = pVCpu->iem.s.CTX_SUFF(pCtx);
+            pCtx->eflags.u = *pEFlags; /* IEM_MC_COMMIT_EFLAGS */
+            if (!(*pEFlags & X86_EFL_ZF))
+            {
+                pCtx->rax = pu128RaxRdx->s.Lo;
+                pCtx->rdx = pu128RaxRdx->s.Hi;
+            }
+            iemRegAddToRipAndClearRF(pVCpu, cbInstr);
+        }
+    }
     return rcStrict;
 #else

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -6849 +6849 @@
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
         IEMOP_HLP_DONE_DECODING();
+        IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(GCPtrEffDst, 16);
         IEM_MC_MEM_MAP(pu128MemDst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/);
 
@@ -6871 +6872 @@
 # endif
         {
-            /* Note! The fallback for 32-bit systems and systems without CX16 is to use
-                     SSE instructions for 16-byte loads and stores.  Since these aren't
-                     atomic and there are cycles between the loading and storing, this
-                     only works correctly in UNI CPU guests.  If guest SMP is active
-                     we have no choice but to use a rendezvous callback here.  Sigh. */
-            IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ(); /* HACK ALERT! */
-
+            /* Note! The fallback for 32-bit systems and systems without CX16 is multiple
+                     accesses and not all all atomic, which works fine on in UNI CPU guest
+                     configuration (ignoring DMA).  If guest SMP is active we have no choice
+                     but to use a rendezvous callback here.  Sigh. */
             if (pVCpu->CTX_SUFF(pVM)->cCpus == 1)
                 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg16b_fallback, pu128MemDst, pu128RaxRdx, pu128RbxRcx, pEFlags);
             else
+            {
                 IEM_MC_CALL_CIMPL_4(iemCImpl_cmpxchg16b_fallback_rendezvous, pu128MemDst, pu128RaxRdx, pu128RbxRcx, pEFlags);
+                /* Does not get here, tail code is duplicated in iemCImpl_cmpxchg16b_fallback_rendezvous. */
+            }
         }
 

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -335 +335 @@
 #define IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT()          do {} while (0)
 #define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO()              do {} while (0)
+#define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) \
+    do { AssertCompile(RT_IS_POWER_OF_TWO(a_cbAlign)); CHK_TYPE(RTGCPTR,  a_EffAddr); } while (0)
 
 #define IEM_MC_LOCAL(a_Type, a_Name) \