Changeset 65573 in vbox for trunk/src/VBox/Devices/PC

Timestamp:

Feb 1, 2017 4:42:40 PM (8 years ago)

Author:

vboxsync

Message:

ACPI: add a 64-bit prefetchable memory window to the root bus resources if the ICH9 chipset is configured

Location:

trunk/src/VBox/Devices/PC

Files:

• DevACPI.cpp (modified) (7 diffs)
• vbox.dsl (modified) (4 diffs)

trunk/src/VBox/Devices/PC/DevACPI.cpp

@@ -171 +171 @@
     SYSTEM_INFO_INDEX_SERIAL3_IOBASE    = 7,
     SYSTEM_INFO_INDEX_SERIAL3_IRQ       = 8,
-    SYSTEM_INFO_INDEX_HIGH_MEMORY_LENGTH= 9,
+    SYSTEM_INFO_INDEX_PREF64_MEMORY_START = 9,
     SYSTEM_INFO_INDEX_RTC_STATUS        = 10,
     SYSTEM_INFO_INDEX_CPU_LOCKED        = 11, /**< Contains a flag indicating whether the CPU is locked or not */
@@ -308 +308 @@
     uint32_t            uSystemInfoIndex;
     uint64_t            u64RamSize;
-    /** The number of bytes above 4GB. */
-    uint64_t            cbRamHigh;
+    /** Offset of the 64-bit prefetchable memory window. */
+    uint64_t            u64PciPref64;
     /** The number of bytes below 4GB. */
     uint32_t            cbRamLow;
@@ -360 +360 @@
     /** If MCFG ACPI table shown to the guest */
     bool                fUseMcfg;
+    /** if the 64-bit prefetchable memory window is shown to the guest */
+    bool                fPciPref64Enabled;
     /** Primary NIC PCI address. */
     uint32_t            u32NicPciAddress;
@@ -1324 +1326 @@
             break;
 
-        case SYSTEM_INFO_INDEX_HIGH_MEMORY_LENGTH:
-            *pu32 = pThis->cbRamHigh >> 16; /* 64KB units */
-            Assert(((uint64_t)*pu32 << 16) == pThis->cbRamHigh);
+        case SYSTEM_INFO_INDEX_PREF64_MEMORY_START:
+            *pu32 = pThis->u64PciPref64 >> 16; /* 64KB units */
+            Assert(((uint64_t)*pu32 << 16) == pThis->u64PciPref64);
             break;
 
@@ -3129 +3131 @@
 
     /*
-     * Calculate the sizes for the high and low regions.
+     * Calculate the sizes for the low region and for the 64-bit prefetchable memory.
      */
     const uint64_t offRamHole = _4G - cbRamHole;
-    pThis->cbRamHigh = offRamHole < pThis->u64RamSize ? pThis->u64RamSize - offRamHole : 0;
+    if (pThis->fPciPref64Enabled)
+        pThis->u64PciPref64 = pThis->u64RamSize  < _4G ? _4G : pThis->u64RamSize; /* MEM4 */
     uint64_t cbRamLow = offRamHole < pThis->u64RamSize ? offRamHole : pThis->u64RamSize;
     if (cbRamLow > UINT32_C(0xffe00000)) /* See MEM3. */
@@ -3558 +3561 @@
                               "McfgBase\0"
                               "McfgLength\0"
+                              "PciPref64Enabled\0"
                               "SmcEnabled\0"
                               "FdcEnabled\0"
@@ -3624 +3628 @@
                                 N_("Configuration error: Failed to read \"McfgLength\""));
     pThis->fUseMcfg = (pThis->u64PciConfigMMioAddress != 0) && (pThis->u64PciConfigMMioLength != 0);
+
+    /* query whether we are supposed to set up the 64-bit prefetchable memory window */
+    rc = CFGMR3QueryBoolDef(pCfg, "PciPref64Enabled", &pThis->fPciPref64Enabled, false);
+    if (RT_FAILURE(rc))
+        return PDMDEV_SET_ERROR(pDevIns, rc,
+                                N_("Configuration error: Failed to read \"PciPref64Enabled\""));
 
     /* query whether we are supposed to present custom table */

trunk/src/VBox/Devices/PC/vbox.dsl

@@ -347 +347 @@
         SL3B,  32, // Serial3 base IO address  
         SL3I,  32, // Serial3 IRQ
-        MEMH,  32,
+        PMEM,  32,
         URTC,  32, // if RTC shown in tables
         CPUL,  32, // flag of CPU lock state
@@ -389 +389 @@
             DBG ("UFDC: ")
             HEX4 (UFDC)
-            DBG ("MEMH: ")
-            HEX4 (MEMH)
+            DBG ("PMEM: ")
+            HEX4 (PMEM)
         }
 
@@ -1567 +1567 @@
             })
 
-//            Name (TOM, ResourceTemplate ()      // Memory above 4GB (aka high), appended when needed.
-//            {
-//                QWORDMemory(
-//                    ResourceProducer,           // bit 0 of general flags is 0
-//                    PosDecode,                  // positive Decode
-//                    MinFixed,                   // Range is fixed
-//                    MaxFixed,                   // Range is fixed
-//                    Cacheable,
-//                    ReadWrite,
-//                    0x0000000000000000,         // _GRA: Granularity.
-//                    0 /*0x0000000100000000*/,   // _MIN: Min address, 4GB.
-//                    0 /*0x00000fffffffffff*/,   // _MAX: Max possible address, 16TB.
-//                    0x0000000000000000,         // _TRA: Translation
-//                    0x0000000000000000,         // _LEN: Range length (calculated dynamically)
-//                    ,                           // ResourceSourceIndex: Optional field left blank
-//                    ,                           // ResourceSource:      Optional field left blank
-//                    MEM4                        // Name declaration for this descriptor.
-//                    )
-//            })
+            Name (TOM, ResourceTemplate ()
+            {
+                QwordMemory(
+                    ResourceProducer,         // bit 0 of general flags is 0
+                    PosDecode,                // positive Decode
+                    MinFixed,                 // Range is fixed
+                    MaxFixed,                 // Range is fixed
+                    Prefetchable,
+                    ReadWrite,
+                    0x0000000000000000,       // _GRA: Granularity.
+                    0x0000000100000000,       // _MIN: Min address, 4GB, will be overwritten.
+                    0x00000020ffffffff,       // _MAX: Max possible address, will be overwritten.
+                    0x0000000000000000,       // _TRA: Translation
+                    0x0000002000000000,       // _LEN: Range length (calculated dynamically)
+                    ,                         // ResourceSourceIndex: Optional field left blank
+                    ,                         // ResourceSource:      Optional field left blank
+                    MEM4                      // Name declaration for this descriptor.
+                    )
+            })
 
             Method (_CRS, 0, NotSerialized)
@@ -1591 +1591 @@
                 CreateDwordField (CRS, \_SB.PCI0.MEM3._MIN, RAMT)
                 CreateDwordField (CRS, \_SB.PCI0.MEM3._LEN, RAMR)
-//                CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4L)
-//                CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4N)
-//                CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4X)
+                CreateQwordField (TOM, \_SB.PCI0.MEM4._MIN, TM4N)
+                CreateQwordField (TOM, \_SB.PCI0.MEM4._MAX, TM4X)
+                CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4L)
 
                 Store (MEML, RAMT)
                 Subtract (0xffe00000, RAMT, RAMR)
 
-//                If (LNotEqual (MEMH, 0x00000000))
-//                {
-//                    //
-//                    // Update the TOM resource template and append it to CRS.
-//                    // This way old < 4GB guest doesn't see anything different.
-//                    // (MEMH is the memory above 4GB specified in 64KB units.)
-//                    //
-//                    // Note: ACPI v2 doesn't do 32-bit integers. IASL may fail on
-//                    //       seeing 64-bit constants and the code probably wont work.
-//                    //
-//                    Store (1, TM4N)
-//                    ShiftLeft (TM4N, 32, TM4N)
-//
-//                    Store (0x00000fff, TM4X)
-//                    ShiftLeft (TM4X, 32, TM4X)
-//                    Or (TM4X, 0xffffffff, TM4X)
-//
-//                    Store (MEMH, TM4L)
-//                    ShiftLeft (TM4L, 16, TM4L)
-//
-//                    ConcatenateResTemplate (CRS, TOM, Local2)
-//                    Return (Local2)
-//                }
+                if (LNotEqual (PMEM, 0x00000000))
+                {
+                    Store (PMEM, TM4N)
+                    ShiftLeft (TM4N, 16, TM4N)
+
+                    Store (PMEM, TM4X)
+                    Store (0x10000000, TM4L)      // Size 16TB
+                    Add (TM4X, TM4L, TM4X)
+                    Subtract (TM4X, 1, TM4X)
+                    ShiftLeft (TM4X, 16, TM4X)    // MAX = MIN + LEN - (1 << 16)
+//                    Add (TM4X, 0xffff, TM4X)    // For some reason this operation prevents
+                                                  // at least Linux from determining this
+                                                  // resource!
+                    ShiftLeft (TM4L, 16, TM4L)
+
+                    ConcatenateResTemplate (CRS, TOM, Local2)
+
+                    Return (Local2)
+                }
 
                 Return (CRS)