- Timestamp:
- Feb 3, 2017 5:34:55 PM (8 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
-
IEMAll.cpp (modified) (1 diff)
-
IEMAllInstructions.cpp.h (modified) (22 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r65598 r65604 1084 1084 pVCpu->iem.s.uRexB = 0; 1085 1085 pVCpu->iem.s.uRexIndex = 0; 1086 pVCpu->iem.s. fPrefixes= 0;1086 pVCpu->iem.s.idxPrefix = 0; 1087 1087 pVCpu->iem.s.uVex3rdReg = 0; 1088 1088 pVCpu->iem.s.uVexLength = 0; -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h
r65598 r65604 545 545 RT_NOREF_PV(bRm); 546 546 IEMOP_MNEMONIC(InvalidWithRm, "InvalidWithRM"); 547 return IEMOP_RAISE_INVALID_OPCODE(); 548 } 549 550 551 /** Invalid opcode where intel requires Mod R/M sequence. */ 552 FNIEMOP_DEF(iemOp_InvalidNeedRM) 553 { 554 IEMOP_MNEMONIC(InvalidNeedRM, "InvalidNeedRM"); 555 if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL) 556 { 557 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm); 558 #ifndef TST_IEM_CHECK_MC 559 RTGCPTR GCPtrEff; 560 VBOXSTRICTRC rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff); 561 if (rcStrict != VINF_SUCCESS) 562 return rcStrict; 563 #endif 564 IEMOP_HLP_DONE_DECODING(); 565 } 566 return IEMOP_RAISE_INVALID_OPCODE(); 567 } 568 569 570 /** Invalid opcode where intel requires Mod R/M sequence and 8-byte 571 * immediate. */ 572 FNIEMOP_DEF(iemOp_InvalidNeedRMImm8) 573 { 574 IEMOP_MNEMONIC(InvalidNeedRMImm8, "InvalidNeedRMImm8"); 575 if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL) 576 { 577 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm); 578 #ifndef TST_IEM_CHECK_MC 579 RTGCPTR GCPtrEff; 580 VBOXSTRICTRC rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff); 581 if (rcStrict != VINF_SUCCESS) 582 return rcStrict; 583 #endif 584 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); RT_NOREF(bImm); 585 IEMOP_HLP_DONE_DECODING(); 586 } 587 return IEMOP_RAISE_INVALID_OPCODE(); 588 } 589 590 591 /** Invalid opcode where intel requires a 3rd escape byte and a Mod R/M 592 * sequence. */ 593 FNIEMOP_DEF(iemOp_InvalidNeed3ByteEscRM) 594 { 595 IEMOP_MNEMONIC(InvalidNeed3ByteEscRM, "InvalidNeed3ByteEscRM"); 596 if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL) 597 { 598 uint8_t b3rd; IEM_OPCODE_GET_NEXT_U8(&b3rd); RT_NOREF(b3rd); 599 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm); 600 #ifndef TST_IEM_CHECK_MC 601 RTGCPTR GCPtrEff; 602 VBOXSTRICTRC rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff); 603 if (rcStrict != VINF_SUCCESS) 604 return rcStrict; 605 #endif 606 IEMOP_HLP_DONE_DECODING(); 607 } 608 return IEMOP_RAISE_INVALID_OPCODE(); 609 } 610 611 612 /** Invalid opcode where intel requires a 3rd escape byte, Mod R/M sequence, and 613 * a 8-byte immediate. */ 614 FNIEMOP_DEF(iemOp_InvalidNeed3ByteEscRMImm8) 615 { 616 IEMOP_MNEMONIC(InvalidNeed3ByteEscRMImm8, "InvalidNeed3ByteEscRMImm8"); 617 if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL) 618 { 619 uint8_t b3rd; IEM_OPCODE_GET_NEXT_U8(&b3rd); RT_NOREF(b3rd); 620 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm); 621 #ifndef TST_IEM_CHECK_MC 622 RTGCPTR GCPtrEff; 623 VBOXSTRICTRC rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff); 624 if (rcStrict != VINF_SUCCESS) 625 return rcStrict; 626 #endif 627 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); RT_NOREF(bImm); 628 IEMOP_HLP_DONE_DECODING(); 629 } 547 630 return IEMOP_RAISE_INVALID_OPCODE(); 548 631 } … … 1528 1611 1529 1612 1530 /** Opcode 0x0f 0x10. */ 1531 FNIEMOP_STUB(iemOp_movups_Vps_Wps__movupd_Vpd_Wpd__movss_Vss_Wss__movsd_Vsd_Wsd); 1613 /** Opcode 0x0f 0x10. */ 1614 FNIEMOP_STUB(iemOp_movups_Vps_Wps); 1615 1616 /** Opcode 66h 0x0f 0x10. */ 1617 FNIEMOP_STUB(iemOp_movupd_Vpd_Wpd); 1618 1619 /** Opcode f3h 0x0f 0x10. */ 1620 FNIEMOP_STUB(iemOp_movss_Vss_Hx_Wss); 1621 1622 /** Opcode f2h 0x0f 0x10. */ 1623 FNIEMOP_STUB(iemOp_movsd_Vsd_Hx_Wsd); 1532 1624 1533 1625 … … 1627 1719 1628 1720 1629 /** Opcode 0x0f 0x12. */ 1630 FNIEMOP_STUB(iemOp_movlps_Vq_Mq__movhlps_Vq_Uq__movlpd_Vq_Mq__movsldup_Vq_Wq__movddup_Vq_Wq); //NEXT 1721 /** Opcode 0x0f 0x12. */ 1722 FNIEMOP_STUB(iemOp_vmovlps_Vq_Hq_Mq__vmovhlps); //NEXT 1723 1724 /** Opcode 0x66 0x0f 0x12. */ 1725 FNIEMOP_STUB(iemOp_vmovlpd_Vq_Hq_Mq); //NEXT 1726 1727 /** Opcode 0xf3 0x0f 0x12. */ 1728 FNIEMOP_STUB(iemOp_vmovsldup_Vx_Wx); //NEXT 1729 1730 /** Opcode 0xf2 0x0f 0x12. */ 1731 FNIEMOP_STUB(iemOp_vmovddup_Vx_Wx); //NEXT 1631 1732 1632 1733 … … 1686 1787 1687 1788 1688 /** Opcode 0x0f 0x14. */ 1689 FNIEMOP_STUB(iemOp_unpckhlps_Vps_Wq__unpcklpd_Vpd_Wq); 1690 /** Opcode 0x0f 0x15. */ 1691 FNIEMOP_STUB(iemOp_unpckhps_Vps_Wq__unpckhpd_Vpd_Wq); 1692 /** Opcode 0x0f 0x16. */ 1693 FNIEMOP_STUB(iemOp_movhps_Vq_Mq__movlhps_Vq_Uq__movhpd_Vq_Mq__movshdup_Vq_Wq); //NEXT 1694 /** Opcode 0x0f 0x17. */ 1695 FNIEMOP_STUB(iemOp_movhps_Mq_Vq__movhpd_Mq_Vq); //NEXT 1789 /** Opcode 0x0f 0x14 - vunpcklps Vx, Hx, Wx*/ 1790 FNIEMOP_STUB(iemOp_vunpcklps_Vx_Hx_Wx); 1791 /** Opcode 0x66 0x0f 0x14 - vunpcklpd Vx,Hx,Wx */ 1792 FNIEMOP_STUB(iemOp_vunpcklpd_Vx_Hx_Wx); 1793 /* Opcode 0xf3 0x0f 0x14 - invalid */ 1794 /* Opcode 0xf2 0x0f 0x14 - invalid */ 1795 /** Opcode 0x0f 0x15 - vunpckhps Vx, Hx, Wx */ 1796 FNIEMOP_STUB(iemOp_vunpckhps_Vx_Hx_Wx); 1797 /** Opcode 0x66 0x0f 0x15 - vunpckhpd Vx,Hx,Wx */ 1798 FNIEMOP_STUB(iemOp_vunpckhpd_Vx_Hx_Wx); 1799 /* Opcode 0xf3 0x0f 0x15 - invalid */ 1800 /* Opcode 0xf2 0x0f 0x15 - invalid */ 1801 /** Opcode 0x0f 0x16 - vmovhpsv1 Vdq, Hq, Mq vmovlhps Vdq, Hq, Uq */ 1802 FNIEMOP_STUB(iemOp_vmovhpsv1_Vdq_Hq_Mq__vmovlhps_Vdq_Hq_Uq); //NEXT 1803 /** Opcode 0x66 0x0f 0x16 - vmovhpdv1 Vdq, Hq, Mq */ 1804 FNIEMOP_STUB(iemOp_vmovhpdv1_Vdq_Hq_Mq); //NEXT 1805 /** Opcode 0xf3 0x0f 0x16 - vmovshdup Vx, Wx */ 1806 FNIEMOP_STUB(iemOp_vmovshdup_Vx_Wx); //NEXT 1807 /* Opcode 0xf2 0x0f 0x16 - invalid */ 1808 /** Opcode 0x0f 0x17 - vmovhpsv1 Mq, Vq */ 1809 FNIEMOP_STUB(iemOp_vmovhpsv1_Mq_Vq); //NEXT 1810 /** Opcode 0x66 0x0f 0x17 - vmovhpdv1 Mq, Vq */ 1811 FNIEMOP_STUB(iemOp_vmovhpdv1_Mq_Vq); //NEXT 1812 /* Opcode 0xf3 0x0f 0x17 - invalid */ 1813 /* Opcode 0xf2 0x0f 0x17 - invalid */ 1696 1814 1697 1815 … … 1977 2095 1978 2096 1979 /** Opcode 0x0f 0x2a. */ 1980 FNIEMOP_STUB(iemOp_cvtpi2ps_Vps_Qpi__cvtpi2pd_Vpd_Qpi__cvtsi2ss_Vss_Ey__cvtsi2sd_Vsd_Ey); //NEXT 2097 /** Opcode 0x0f 0x2a - cvtpi2ps Vps, Qpi */ 2098 FNIEMOP_STUB(iemOp_cvtpi2ps_Vps_Qpi); //NEXT 2099 /** Opcode 0x66 0x0f 0x2a - cvtpi2pd Vpd, Qpi */ 2100 FNIEMOP_STUB(iemOp_cvtpi2pd_Vpd_Qpi); //NEXT 2101 /** Opcode 0xf3 0x0f 0x2a - vcvtsi2ss Vss, Hss, Ey */ 2102 FNIEMOP_STUB(iemOp_vcvtsi2ss_Vss_Hss_Ey); //NEXT 2103 /** Opcode 0xf2 0x0f 0x2a - vcvtsi2sd Vsd, Hsd, Ey */ 2104 FNIEMOP_STUB(iemOp_vcvtsi2sd_Vsd_Hsd_Ey); //NEXT 1981 2105 1982 2106 … … 2019 2143 2020 2144 2021 /** Opcode 0x0f 0x2c. */ 2022 FNIEMOP_STUB(iemOp_cvttps2pi_Ppi_Wps__cvttpd2pi_Ppi_Wpd__cvttss2si_Gy_Wss__cvttsd2si_Yu_Wsd); //NEXT 2023 /** Opcode 0x0f 0x2d. */ 2024 FNIEMOP_STUB(iemOp_cvtps2pi_Ppi_Wps__cvtpd2pi_QpiWpd__cvtss2si_Gy_Wss__cvtsd2si_Gy_Wsd); 2025 /** Opcode 0x0f 0x2e. */ 2026 FNIEMOP_STUB(iemOp_ucomiss_Vss_Wss__ucomisd_Vsd_Wsd); //NEXT 2027 /** Opcode 0x0f 0x2f. */ 2028 FNIEMOP_STUB(iemOp_comiss_Vss_Wss__comisd_Vsd_Wsd); 2029 2145 /** Opcode 0x0f 0x2c - cvttps2pi Ppi, Wps */ 2146 FNIEMOP_STUB(iemOp_cvttps2pi_Ppi_Wps); 2147 /** Opcode 0x66 0x0f 0x2c - cvttpd2pi Ppi, Wpd */ 2148 FNIEMOP_STUB(iemOp_cvttpd2pi_Ppi_Wpd); 2149 /** Opcode 0xf3 0x0f 0x2c - vcvttss2si Gy, Wss */ 2150 FNIEMOP_STUB(iemOp_vcvttss2si_Gy_Wss); 2151 /** Opcode 0xf2 0x0f 0x2c - vcvttsd2si Gy, Wsd */ 2152 FNIEMOP_STUB(iemOp_vcvttsd2si_Gy_Wsd); 2153 2154 /** Opcode 0x0f 0x2d - cvtps2pi Ppi, Wps */ 2155 FNIEMOP_STUB(iemOp_cvtps2pi_Ppi_Wps); 2156 /** Opcode 0x66 0x0f 0x2d - cvtpd2pi Qpi, Wpd */ 2157 FNIEMOP_STUB(iemOp_cvtpd2pi_Qpi_Wpd); 2158 /** Opcode 0xf3 0x0f 0x2d - vcvtss2si Gy, Wss */ 2159 FNIEMOP_STUB(iemOp_vcvtss2si_Gy_Wss); 2160 /** Opcode 0xf2 0x0f 0x2d - vcvtsd2si Gy, Wsd */ 2161 FNIEMOP_STUB(iemOp_vcvtsd2si_Gy_Wsd); 2162 2163 /** Opcode 0x0f 0x2e - vucomiss Vss, Wss */ 2164 FNIEMOP_STUB(iemOp_vucomiss_Vss_Wss); // NEXT 2165 /** Opcode 0x66 0x0f 0x2e - vucomisd Vsd, Wsd */ 2166 FNIEMOP_STUB(iemOp_vucomisd_Vsd_Wsd); // NEXT 2167 /* Opcode 0xf3 0x0f 0x2e - invalid */ 2168 /* Opcode 0xf2 0x0f 0x2e - invalid */ 2169 2170 /** Opcode 0x0f 0x2f - vcomiss Vss, Wss */ 2171 FNIEMOP_STUB(iemOp_vcomiss_Vss_Wss); 2172 /** Opcode 0x66 0x0f 0x2f - vcomisd Vsd, Wsd */ 2173 FNIEMOP_STUB(iemOp_vcomisd_Vsd_Wsd); 2174 /* Opcode 0xf3 0x0f 0x2f - invalid */ 2175 /* Opcode 0xf2 0x0f 0x2f - invalid */ 2030 2176 2031 2177 /** Opcode 0x0f 0x30. */ … … 2302 2448 #undef CMOV_X 2303 2449 2304 /** Opcode 0x0f 0x50. */ 2305 FNIEMOP_STUB(iemOp_movmskps_Gy_Ups__movmskpd_Gy_Upd); 2306 /** Opcode 0x0f 0x51. */ 2307 FNIEMOP_STUB(iemOp_sqrtps_Wps_Vps__sqrtpd_Wpd_Vpd__sqrtss_Vss_Wss__sqrtsd_Vsd_Wsd); 2308 /** Opcode 0x0f 0x52. */ 2309 FNIEMOP_STUB(iemOp_rsqrtps_Wps_Vps__rsqrtss_Vss_Wss); 2310 /** Opcode 0x0f 0x53. */ 2311 FNIEMOP_STUB(iemOp_rcpps_Wps_Vps__rcpss_Vs_Wss); 2312 /** Opcode 0x0f 0x54. */ 2313 FNIEMOP_STUB(iemOp_andps_Vps_Wps__andpd_Wpd_Vpd); 2314 /** Opcode 0x0f 0x55. */ 2315 FNIEMOP_STUB(iemOp_andnps_Vps_Wps__andnpd_Wpd_Vpd); 2316 /** Opcode 0x0f 0x56. */ 2317 FNIEMOP_STUB(iemOp_orps_Wpd_Vpd__orpd_Wpd_Vpd); 2318 /** Opcode 0x0f 0x57. */ 2319 FNIEMOP_STUB(iemOp_xorps_Vps_Wps__xorpd_Wpd_Vpd); 2320 /** Opcode 0x0f 0x58. */ 2321 FNIEMOP_STUB(iemOp_addps_Vps_Wps__addpd_Vpd_Wpd__addss_Vss_Wss__addsd_Vsd_Wsd); //NEXT 2322 /** Opcode 0x0f 0x59. */ 2323 FNIEMOP_STUB(iemOp_mulps_Vps_Wps__mulpd_Vpd_Wpd__mulss_Vss__Wss__mulsd_Vsd_Wsd);//NEXT 2324 /** Opcode 0x0f 0x5a. */ 2325 FNIEMOP_STUB(iemOp_cvtps2pd_Vpd_Wps__cvtpd2ps_Vps_Wpd__cvtss2sd_Vsd_Wss__cvtsd2ss_Vss_Wsd); 2326 /** Opcode 0x0f 0x5b. */ 2327 FNIEMOP_STUB(iemOp_cvtdq2ps_Vps_Wdq__cvtps2dq_Vdq_Wps__cvtps2dq_Vdq_Wps); 2328 /** Opcode 0x0f 0x5c. */ 2329 FNIEMOP_STUB(iemOp_subps_Vps_Wps__subpd_Vps_Wdp__subss_Vss_Wss__subsd_Vsd_Wsd); 2330 /** Opcode 0x0f 0x5d. */ 2331 FNIEMOP_STUB(iemOp_minps_Vps_Wps__minpd_Vpd_Wpd__minss_Vss_Wss__minsd_Vsd_Wsd); 2332 /** Opcode 0x0f 0x5e. */ 2333 FNIEMOP_STUB(iemOp_divps_Vps_Wps__divpd_Vpd_Wpd__divss_Vss_Wss__divsd_Vsd_Wsd); 2334 /** Opcode 0x0f 0x5f. */ 2335 FNIEMOP_STUB(iemOp_maxps_Vps_Wps__maxpd_Vpd_Wpd__maxss_Vss_Wss__maxsd_Vsd_Wsd); 2450 /** Opcode 0x0f 0x50 - vmovmskps Gy, Ups */ 2451 FNIEMOP_STUB(iemOp_vmovmskps_Gy_Ups); 2452 /** Opcode 0x66 0x0f 0x50 - vmovmskpd Gy,Upd */ 2453 FNIEMOP_STUB(iemOp_vmovmskpd_Gy_Upd); 2454 /* Opcode 0xf3 0x0f 0x50 - invalid */ 2455 /* Opcode 0xf2 0x0f 0x50 - invalid */ 2456 2457 /** Opcode 0x0f 0x51 - vsqrtps Vps, Wps */ 2458 FNIEMOP_STUB(iemOp_vsqrtps_Vps_Wps); 2459 /** Opcode 0x66 0x0f 0x51 - vsqrtpd Vpd, Wpd */ 2460 FNIEMOP_STUB(iemOp_vsqrtpd_Vpd_Wpd); 2461 /** Opcode 0xf3 0x0f 0x51 - vsqrtss Vss, Hss, Wss */ 2462 FNIEMOP_STUB(iemOp_vsqrtss_Vss_Hss_Wss); 2463 /** Opcode 0xf2 0x0f 0x51 - vsqrtsd Vsd, Hsd, Wsd */ 2464 FNIEMOP_STUB(iemOp_vsqrtsd_Vsd_Hsd_Wsd); 2465 2466 /** Opcode 0x0f 0x52 - vrsqrtps Vps, Wps */ 2467 FNIEMOP_STUB(iemOp_vrsqrtps_Vps_Wps); 2468 /* Opcode 0x66 0x0f 0x52 - invalid */ 2469 /** Opcode 0xf3 0x0f 0x52 - vrsqrtss Vss, Hss, Wss */ 2470 FNIEMOP_STUB(iemOp_vrsqrtss_Vss_Hss_Wss); 2471 /* Opcode 0xf2 0x0f 0x52 - invalid */ 2472 2473 /** Opcode 0x0f 0x53 - vrcpps Vps, Wps */ 2474 FNIEMOP_STUB(iemOp_vrcpps_Vps_Wps); 2475 /* Opcode 0x66 0x0f 0x53 - invalid */ 2476 /** Opcode 0xf3 0x0f 0x53 - vrcpss Vss, Hss, Wss */ 2477 FNIEMOP_STUB(iemOp_vrcpss_Vss_Hss_Wss); 2478 /* Opcode 0xf2 0x0f 0x53 - invalid */ 2479 2480 /** Opcode 0x0f 0x54 - vandps Vps, Hps, Wps */ 2481 FNIEMOP_STUB(iemOp_vandps_Vps_Hps_Wps); 2482 /** Opcode 0x66 0x0f 0x54 - vandpd Vpd, Hpd, Wpd */ 2483 FNIEMOP_STUB(iemOp_vandpd_Vpd_Hpd_Wpd); 2484 /* Opcode 0xf3 0x0f 0x54 - invalid */ 2485 /* Opcode 0xf2 0x0f 0x54 - invalid */ 2486 2487 /** Opcode 0x0f 0x55 - vandnps Vps, Hps, Wps */ 2488 FNIEMOP_STUB(iemOp_vandnps_Vps_Hps_Wps); 2489 /** Opcode 0x66 0x0f 0x55 - vandnpd Vpd, Hpd, Wpd */ 2490 FNIEMOP_STUB(iemOp_vandnpd_Vpd_Hpd_Wpd); 2491 /* Opcode 0xf3 0x0f 0x55 - invalid */ 2492 /* Opcode 0xf2 0x0f 0x55 - invalid */ 2493 2494 /** Opcode 0x0f 0x56 - vorps Vps, Hps, Wps */ 2495 FNIEMOP_STUB(iemOp_vorps_Vps_Hps_Wps); 2496 /** Opcode 0x66 0x0f 0x56 - vorpd Vpd, Hpd, Wpd */ 2497 FNIEMOP_STUB(iemOp_vorpd_Vpd_Hpd_Wpd); 2498 /* Opcode 0xf3 0x0f 0x56 - invalid */ 2499 /* Opcode 0xf2 0x0f 0x56 - invalid */ 2500 2501 /** Opcode 0x0f 0x57 - vxorps Vps, Hps, Wps */ 2502 FNIEMOP_STUB(iemOp_vxorps_Vps_Hps_Wps); 2503 /** Opcode 0x66 0x0f 0x57 - vxorpd Vpd, Hpd, Wpd */ 2504 FNIEMOP_STUB(iemOp_vxorpd_Vpd_Hpd_Wpd); 2505 /* Opcode 0xf3 0x0f 0x57 - invalid */ 2506 /* Opcode 0xf2 0x0f 0x57 - invalid */ 2507 2508 /** Opcode 0x0f 0x58 - vaddps Vps, Hps, Wps */ 2509 FNIEMOP_STUB(iemOp_vaddps_Vps_Hps_Wps); 2510 /** Opcode 0x66 0x0f 0x58 - vaddpd Vpd, Hpd, Wpd */ 2511 FNIEMOP_STUB(iemOp_vaddpd_Vpd_Hpd_Wpd); 2512 /** Opcode 0xf3 0x0f 0x58 - vaddss Vss, Hss, Wss */ 2513 FNIEMOP_STUB(iemOp_vaddss_Vss_Hss_Wss); 2514 /** Opcode 0xf2 0x0f 0x58 - vaddsd Vsd, Hsd, Wsd */ 2515 FNIEMOP_STUB(iemOp_vaddsd_Vsd_Hsd_Wsd); 2516 2517 /** Opcode 0x0f 0x59 - vmulps Vps, Hps, Wps */ 2518 FNIEMOP_STUB(iemOp_vmulps_Vps_Hps_Wps); 2519 /** Opcode 0x66 0x0f 0x59 - vmulpd Vpd, Hpd, Wpd */ 2520 FNIEMOP_STUB(iemOp_vmulpd_Vpd_Hpd_Wpd); 2521 /** Opcode 0xf3 0x0f 0x59 - vmulss Vss, Hss, Wss */ 2522 FNIEMOP_STUB(iemOp_vmulss_Vss_Hss_Wss); 2523 /** Opcode 0xf2 0x0f 0x59 - vmulsd Vsd, Hsd, Wsd */ 2524 FNIEMOP_STUB(iemOp_vmulsd_Vsd_Hsd_Wsd); 2525 2526 /** Opcode 0x0f 0x5a - vcvtps2pd Vpd, Wps */ 2527 FNIEMOP_STUB(iemOp_vcvtps2pd_Vpd_Wps); 2528 /** Opcode 0x66 0x0f 0x5a - vcvtpd2ps Vps, Wpd */ 2529 FNIEMOP_STUB(iemOp_vcvtpd2ps_Vps_Wpd); 2530 /** Opcode 0xf3 0x0f 0x5a - vcvtss2sd Vsd, Hx, Wss */ 2531 FNIEMOP_STUB(iemOp_vcvtss2sd_Vsd_Hx_Wss); 2532 /** Opcode 0xf2 0x0f 0x5a - vcvtsd2ss Vss, Hx, Wsd */ 2533 FNIEMOP_STUB(iemOp_vcvtsd2ss_Vss_Hx_Wsd); 2534 2535 /** Opcode 0x0f 0x5b - vcvtdq2ps Vps, Wdq */ 2536 FNIEMOP_STUB(iemOp_vcvtdq2ps_Vps_Wdq); 2537 /** Opcode 0x66 0x0f 0x5b - vcvtps2dq Vdq, Wps */ 2538 FNIEMOP_STUB(iemOp_vcvtps2dq_Vdq_Wps); 2539 /** Opcode 0xf3 0x0f 0x5b - vcvttps2dq Vdq, Wps */ 2540 FNIEMOP_STUB(iemOp_vcvttps2dq_Vdq_Wps); 2541 /* Opcode 0xf2 0x0f 0x5b - invalid */ 2542 2543 /** Opcode 0x0f 0x5c - vsubps Vps, Hps, Wps */ 2544 FNIEMOP_STUB(iemOp_vsubps_Vps_Hps_Wps); 2545 /** Opcode 0x66 0x0f 0x5c - vsubpd Vpd, Hpd, Wpd */ 2546 FNIEMOP_STUB(iemOp_vsubpd_Vpd_Hpd_Wpd); 2547 /** Opcode 0xf3 0x0f 0x5c - vsubss Vss, Hss, Wss */ 2548 FNIEMOP_STUB(iemOp_vsubss_Vss_Hss_Wss); 2549 /** Opcode 0xf2 0x0f 0x5c - vsubsd Vsd, Hsd, Wsd */ 2550 FNIEMOP_STUB(iemOp_vsubsd_Vsd_Hsd_Wsd); 2551 2552 /** Opcode 0x0f 0x5d - vminps Vps, Hps, Wps */ 2553 FNIEMOP_STUB(iemOp_vminps_Vps_Hps_Wps); 2554 /** Opcode 0x66 0x0f 0x5d - vminpd Vpd, Hpd, Wpd */ 2555 FNIEMOP_STUB(iemOp_vminpd_Vpd_Hpd_Wpd); 2556 /** Opcode 0xf3 0x0f 0x5d - vminss Vss, Hss, Wss */ 2557 FNIEMOP_STUB(iemOp_vminss_Vss_Hss_Wss); 2558 /** Opcode 0xf2 0x0f 0x5d - vminsd Vsd, Hsd, Wsd */ 2559 FNIEMOP_STUB(iemOp_vminsd_Vsd_Hsd_Wsd); 2560 2561 /** Opcode 0x0f 0x5e - vdivps Vps, Hps, Wps */ 2562 FNIEMOP_STUB(iemOp_vdivps_Vps_Hps_Wps); 2563 /** Opcode 0x66 0x0f 0x5e - vdivpd Vpd, Hpd, Wpd */ 2564 FNIEMOP_STUB(iemOp_vdivpd_Vpd_Hpd_Wpd); 2565 /** Opcode 0xf3 0x0f 0x5e - vdivss Vss, Hss, Wss */ 2566 FNIEMOP_STUB(iemOp_vdivss_Vss_Hss_Wss); 2567 /** Opcode 0xf2 0x0f 0x5e - vdivsd Vsd, Hsd, Wsd */ 2568 FNIEMOP_STUB(iemOp_vdivsd_Vsd_Hsd_Wsd); 2569 2570 /** Opcode 0x0f 0x5f - vmaxps Vps, Hps, Wps */ 2571 FNIEMOP_STUB(iemOp_vmaxps_Vps_Hps_Wps); 2572 /** Opcode 0x66 0x0f 0x5f - vmaxpd Vpd, Hpd, Wpd */ 2573 FNIEMOP_STUB(iemOp_vmaxpd_Vpd_Hpd_Wpd); 2574 /** Opcode 0xf3 0x0f 0x5f - vmaxss Vss, Hss, Wss */ 2575 FNIEMOP_STUB(iemOp_vmaxss_Vss_Hss_Wss); 2576 /** Opcode 0xf2 0x0f 0x5f - vmaxsd Vsd, Hsd, Wsd */ 2577 FNIEMOP_STUB(iemOp_vmaxsd_Vsd_Hsd_Wsd); 2336 2578 2337 2579 … … 2472 2714 2473 2715 2474 /** Opcode 0x0f 0x63. */ 2475 FNIEMOP_STUB(iemOp_packsswb_Pq_Qq__packsswb_Vdq_Wdq); 2476 /** Opcode 0x0f 0x64. */ 2477 FNIEMOP_STUB(iemOp_pcmpgtb_Pq_Qq__pcmpgtb_Vdq_Wdq); 2478 /** Opcode 0x0f 0x65. */ 2479 FNIEMOP_STUB(iemOp_pcmpgtw_Pq_Qq__pcmpgtw_Vdq_Wdq); 2480 /** Opcode 0x0f 0x66. */ 2481 FNIEMOP_STUB(iemOp_pcmpgtd_Pq_Qq__pcmpgtd_Vdq_Wdq); 2482 /** Opcode 0x0f 0x67. */ 2483 FNIEMOP_STUB(iemOp_packuswb_Pq_Qq__packuswb_Vdq_Wdq); 2716 /** Opcode 0x0f 0x63 - packsswb Pq, Qq */ 2717 FNIEMOP_STUB(iemOp_packsswb_Pq_Qq); 2718 /** Opcode 0x66 0x0f 0x63 - vpacksswb Vx, Hx, Wx */ 2719 FNIEMOP_STUB(iemOp_vpacksswb_Vx_Hx_Wx); 2720 /* Opcode 0xf3 0x0f 0x63 - invalid */ 2721 2722 /** Opcode 0x0f 0x64 - pcmpgtb Pq, Qq */ 2723 FNIEMOP_STUB(iemOp_pcmpgtb_Pq_Qq); 2724 /** Opcode 0x66 0x0f 0x64 - vpcmpgtb Vx, Hx, Wx */ 2725 FNIEMOP_STUB(iemOp_vpcmpgtb_Vx_Hx_Wx); 2726 /* Opcode 0xf3 0x0f 0x64 - invalid */ 2727 2728 /** Opcode 0x0f 0x65 - pcmpgtw Pq, Qq */ 2729 FNIEMOP_STUB(iemOp_pcmpgtw_Pq_Qq); 2730 /** Opcode 0x66 0x0f 0x65 - vpcmpgtw Vx, Hx, Wx */ 2731 FNIEMOP_STUB(iemOp_vpcmpgtw_Vx_Hx_Wx); 2732 /* Opcode 0xf3 0x0f 0x65 - invalid */ 2733 2734 /** Opcode 0x0f 0x66 - pcmpgtd Pq, Qq */ 2735 FNIEMOP_STUB(iemOp_pcmpgtd_Pq_Qq); 2736 /** Opcode 0x66 0x0f 0x66 - vpcmpgtd Vx, Hx, Wx */ 2737 FNIEMOP_STUB(iemOp_vpcmpgtd_Vx_Hx_Wx); 2738 /* Opcode 0xf3 0x0f 0x66 - invalid */ 2739 2740 /** Opcode 0x0f 0x67 - packuswb Pq, Qq */ 2741 FNIEMOP_STUB(iemOp_packuswb_Pq_Qq); 2742 /** Opcode 0x66 0x0f 0x67 - vpackuswb Vx, Hx, W */ 2743 FNIEMOP_STUB(iemOp_vpackuswb_Vx_Hx_W); 2744 /* Opcode 0xf3 0x0f 0x67 - invalid */ 2484 2745 2485 2746 … … 3280 3541 3281 3542 3282 /** Opcode 0x0f 0x77. */ 3283 FNIEMOP_STUB(iemOp_emms); 3284 /** Opcode 0x0f 0x78. */ 3285 FNIEMOP_UD_STUB(iemOp_vmread_AmdGrp17); 3286 /** Opcode 0x0f 0x79. */ 3287 FNIEMOP_UD_STUB(iemOp_vmwrite); 3288 /** Opcode 0x0f 0x7c. */ 3289 FNIEMOP_STUB(iemOp_haddpd_Vdp_Wpd__haddps_Vps_Wps); 3290 /** Opcode 0x0f 0x7d. */ 3291 FNIEMOP_STUB(iemOp_hsubpd_Vpd_Wpd__hsubps_Vps_Wps); 3543 /** Opcode 0x0f 0x77 - emms vzeroupperv vzeroallv */ 3544 FNIEMOP_STUB(iemOp_emms__vzeroupperv__vzeroallv); 3545 /* Opcode 0x66 0x0f 0x77 - invalid */ 3546 /* Opcode 0xf3 0x0f 0x77 - invalid */ 3547 /* Opcode 0xf2 0x0f 0x77 - invalid */ 3548 3549 /** Opcode 0x0f 0x78 - VMREAD Ey, Gy */ 3550 FNIEMOP_STUB(iemOp_vmread_Ey_Gy); 3551 /* Opcode 0x66 0x0f 0x78 - AMD Group 17 */ 3552 FNIEMOP_STUB(iemOp_AmdGrp17); 3553 /* Opcode 0xf3 0x0f 0x78 - invalid */ 3554 /* Opcode 0xf2 0x0f 0x78 - invalid */ 3555 3556 /** Opcode 0x0f 0x79 - VMWRITE Gy, Ey */ 3557 FNIEMOP_STUB(iemOp_vmwrite_Gy_Ey); 3558 /* Opcode 0x66 0x0f 0x79 - invalid */ 3559 /* Opcode 0xf3 0x0f 0x79 - invalid */ 3560 /* Opcode 0xf2 0x0f 0x79 - invalid */ 3561 3562 /* Opcode 0x0f 0x7a - invalid */ 3563 /* Opcode 0x66 0x0f 0x7a - invalid */ 3564 /* Opcode 0xf3 0x0f 0x7a - invalid */ 3565 /* Opcode 0xf2 0x0f 0x7a - invalid */ 3566 3567 /* Opcode 0x0f 0x7b - invalid */ 3568 /* Opcode 0x66 0x0f 0x7b - invalid */ 3569 /* Opcode 0xf3 0x0f 0x7b - invalid */ 3570 /* Opcode 0xf2 0x0f 0x7b - invalid */ 3571 3572 /* Opcode 0x0f 0x7c - invalid */ 3573 /** Opcode 0x66 0x0f 0x7c - vhaddpd Vpd, Hpd, Wpd */ 3574 FNIEMOP_STUB(iemOp_vhaddpd_Vpd_Hpd_Wpd); 3575 /* Opcode 0xf3 0x0f 0x7c - invalid */ 3576 /** Opcode 0xf2 0x0f 0x7c - vhaddps Vps, Hps, Wps */ 3577 FNIEMOP_STUB(iemOp_vhaddps_Vps_Hps_Wps); 3578 3579 /* Opcode 0x0f 0x7d - invalid */ 3580 /** Opcode 0x66 0x0f 0x7d - vhsubpd Vpd, Hpd, Wpd */ 3581 FNIEMOP_STUB(iemOp_vhsubpd_Vpd_Hpd_Wpd); 3582 /* Opcode 0xf3 0x0f 0x7d - invalid */ 3583 /** Opcode 0xf2 0x0f 0x7d - vhsubps Vps, Hps, Wps */ 3584 FNIEMOP_STUB(iemOp_vhsubps_Vps_Hps_Wps); 3292 3585 3293 3586 … … 6120 6413 6121 6414 6122 /** Opcode 0x0f 0xb8. */ 6123 FNIEMOP_STUB(iemOp_popcnt_Gv_Ev_jmpe); 6415 /** Opcode 0x0f 0xb8 - JMPE (reserved for emulator on IPF) */ 6416 FNIEMOP_UD_STUB(iemOp_jmpe); 6417 /** Opcode 0xf3 0x0f 0xb8 - POPCNT Gv, Ev */ 6418 FNIEMOP_STUB(iemOp_popcnt_Gv_Ev); 6124 6419 6125 6420 … … 6324 6619 6325 6620 6621 /** Opcode 0xf3 0x0f 0xbc - TZCNT Gv, Ev */ 6622 FNIEMOP_STUB(iemOp_tzcnt_Gv_Ev); 6623 6624 6326 6625 /** Opcode 0x0f 0xbd. */ 6327 6626 FNIEMOP_DEF(iemOp_bsr_Gv_Ev) … … 6332 6631 return FNIEMOP_CALL_1(iemOpHlpBinaryOperator_rv_rm, &g_iemAImpl_bsr); 6333 6632 } 6633 6634 6635 /** Opcode 0xf3 0x0f 0xbd - LZCNT Gv, Ev */ 6636 FNIEMOP_STUB(iemOp_lzcnt_Gv_Ev); 6334 6637 6335 6638 … … 6712 7015 } 6713 7016 6714 /** Opcode 0x0f 0xc2. */ 6715 FNIEMOP_STUB(iemOp_cmpps_Vps_Wps_Ib__cmppd_Vpd_Wpd_Ib__cmpss_Vss_Wss_Ib__cmpsd_Vsd_Wsd_Ib); 7017 7018 /** Opcode 0x0f 0xc2 - vcmpps Vps,Hps,Wps,Ib */ 7019 FNIEMOP_STUB(iemOp_vcmpps_Vps_Hps_Wps_Ib); 7020 /** Opcode 0x66 0x0f 0xc2 - vcmppd Vpd,Hpd,Wpd,Ib */ 7021 FNIEMOP_STUB(iemOp_vcmppd_Vpd_Hpd_Wpd_Ib); 7022 /** Opcode 0xf3 0x0f 0xc2 - vcmpss Vss,Hss,Wss,Ib */ 7023 FNIEMOP_STUB(iemOp_vcmpss_Vss_Hss_Wss_Ib); 7024 /** Opcode 0xf2 0x0f 0xc2 - vcmpsd Vsd,Hsd,Wsd,Ib */ 7025 FNIEMOP_STUB(iemOp_vcmpsd_Vsd_Hsd_Wsd_Ib); 6716 7026 6717 7027 … … 6769 7079 return VINF_SUCCESS; 6770 7080 } 6771 6772 6773 /** Opcode 0x0f 0xc4. */ 6774 FNIEMOP_STUB(iemOp_pinsrw_Pq_Ry_Mw_Ib__pinsrw_Vdq_Ry_Mw_Ib); 6775 6776 /** Opcode 0x0f 0xc5. */ 6777 FNIEMOP_STUB(iemOp_pextrw_Gd_Nq_Ib__pextrw_Gd_Udq_Ib); 6778 6779 /** Opcode 0x0f 0xc6. */ 6780 FNIEMOP_STUB(iemOp_shufps_Vps_Wps_Ib__shufdp_Vpd_Wpd_Ib); 7081 /* Opcode 0x66 0x0f 0xc3 - invalid */ 7082 /* Opcode 0xf3 0x0f 0xc3 - invalid */ 7083 /* Opcode 0xf2 0x0f 0xc3 - invalid */ 7084 7085 /** Opcode 0x0f 0xc4 - pinsrw Pq,Ry/Mw,Ib */ 7086 FNIEMOP_STUB(iemOp_pinsrw_Pq_RyMw_Ib); 7087 /** Opcode 0x66 0x0f 0xc4 - vpinsrw Vdq,Hdq,Ry/Mw,Ib */ 7088 FNIEMOP_STUB(iemOp_vpinsrw_Vdq_Hdq_RyMw_Ib); 7089 /* Opcode 0xf3 0x0f 0xc4 - invalid */ 7090 /* Opcode 0xf2 0x0f 0xc4 - invalid */ 7091 7092 /** Opcode 0x0f 0xc5 - pextrw Gd, Nq, Ib */ 7093 FNIEMOP_STUB(iemOp_pextrw_Gd_Nq_Ib); 7094 /** Opcode 0x66 0x0f 0xc5 - vpextrw Gd, Udq, Ib */ 7095 FNIEMOP_STUB(iemOp_vpextrw_Gd_Udq_Ib); 7096 /* Opcode 0xf3 0x0f 0xc5 - invalid */ 7097 /* Opcode 0xf2 0x0f 0xc5 - invalid */ 7098 7099 /** Opcode 0x0f 0xc6 - vshufps Vps,Hps,Wps,Ib */ 7100 FNIEMOP_STUB(iemOp_vshufps_Vps_Hps_Wps_Ib); 7101 /** Opcode 0x66 0x0f 0xc6 - vshufpd Vpd,Hpd,Wpd,Ib */ 7102 FNIEMOP_STUB(iemOp_vshufpd_Vpd_Hpd_Wpd_Ib); 7103 /* Opcode 0xf3 0x0f 0xc6 - invalid */ 7104 /* Opcode 0xf2 0x0f 0xc6 - invalid */ 6781 7105 6782 7106 … … 7079 7403 7080 7404 7081 7082 /** Opcode 0x0f 0xd0. */ 7083 FNIEMOP_STUB(iemOp_addsubpd_Vpd_Wpd__addsubps_Vps_Wps); 7084 /** Opcode 0x0f 0xd1. */ 7085 FNIEMOP_STUB(iemOp_psrlw_Pp_Qp__psrlw_Vdp_Wdq); 7086 /** Opcode 0x0f 0xd2. */ 7087 FNIEMOP_STUB(iemOp_psrld_Pq_Qq__psrld_Vdq_Wdq); 7088 /** Opcode 0x0f 0xd3. */ 7089 FNIEMOP_STUB(iemOp_psrlq_Pq_Qq__psrlq_Vdq_Wdq); 7090 /** Opcode 0x0f 0xd4. */ 7091 FNIEMOP_STUB(iemOp_paddq_Pq_Qq__paddq_Vdq_Wdq); 7092 /** Opcode 0x0f 0xd5. */ 7093 FNIEMOP_STUB(iemOp_pmulq_Pq_Qq__pmullw_Vdq_Wdq); 7094 7095 /** Opcode 0x0f 0xd6. */ 7096 FNIEMOP_STUB(iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq); 7405 /* Opcode 0x0f 0xd0 - invalid */ 7406 /** Opcode 0x66 0x0f 0xd0 - vaddsubpd Vpd, Hpd, Wpd */ 7407 FNIEMOP_STUB(iemOp_vaddsubpd_Vpd_Hpd_Wpd); 7408 /* Opcode 0xf3 0x0f 0xd0 - invalid */ 7409 /** Opcode 0xf2 0x0f 0xd0 - vaddsubps Vps, Hps, Wps */ 7410 FNIEMOP_STUB(iemOp_vaddsubps_Vps_Hps_Wps); 7411 7412 /** Opcode 0x0f 0xd1 - psrlw Pq, Qq */ 7413 FNIEMOP_STUB(iemOp_psrlw_Pq_Qq); 7414 /** Opcode 0x66 0x0f 0xd1 - vpsrlw Vx, Hx, W */ 7415 FNIEMOP_STUB(iemOp_vpsrlw_Vx_Hx_W); 7416 /* Opcode 0xf3 0x0f 0xd1 - invalid */ 7417 /* Opcode 0xf2 0x0f 0xd1 - invalid */ 7418 7419 /** Opcode 0x0f 0xd2 - psrld Pq, Qq */ 7420 FNIEMOP_STUB(iemOp_psrld_Pq_Qq); 7421 /** Opcode 0x66 0x0f 0xd2 - vpsrld Vx, Hx, Wx */ 7422 FNIEMOP_STUB(iemOp_vpsrld_Vx_Hx_Wx); 7423 /* Opcode 0xf3 0x0f 0xd2 - invalid */ 7424 /* Opcode 0xf2 0x0f 0xd2 - invalid */ 7425 7426 /** Opcode 0x0f 0xd3 - psrlq Pq, Qq */ 7427 FNIEMOP_STUB(iemOp_psrlq_Pq_Qq); 7428 /** Opcode 0x66 0x0f 0xd3 - vpsrlq Vx, Hx, Wx */ 7429 FNIEMOP_STUB(iemOp_vpsrlq_Vx_Hx_Wx); 7430 /* Opcode 0xf3 0x0f 0xd3 - invalid */ 7431 /* Opcode 0xf2 0x0f 0xd3 - invalid */ 7432 7433 /** Opcode 0x0f 0xd4 - paddq Pq, Qq */ 7434 FNIEMOP_STUB(iemOp_paddq_Pq_Qq); 7435 /** Opcode 0x66 0x0f 0xd4 - vpaddq Vx, Hx, W */ 7436 FNIEMOP_STUB(iemOp_vpaddq_Vx_Hx_W); 7437 /* Opcode 0xf3 0x0f 0xd4 - invalid */ 7438 /* Opcode 0xf2 0x0f 0xd4 - invalid */ 7439 7440 /** Opcode 0x0f 0xd5 - pmullw Pq, Qq */ 7441 FNIEMOP_STUB(iemOp_pmullw_Pq_Qq); 7442 /** Opcode 0x66 0x0f 0xd5 - vpmullw Vx, Hx, Wx */ 7443 FNIEMOP_STUB(iemOp_vpmullw_Vx_Hx_Wx); 7444 /* Opcode 0xf3 0x0f 0xd5 - invalid */ 7445 /* Opcode 0xf2 0x0f 0xd5 - invalid */ 7446 7447 /* Opcode 0x0f 0xd6 - invalid */ 7448 /** Opcode 0x66 0x0f 0xd6 - vmovq Wq, Vq */ 7449 FNIEMOP_STUB(iemOp_vmovq_Wq_Vq); 7450 /** Opcode 0xf3 0x0f 0xd6 - movq2dq Vdq, Nq */ 7451 FNIEMOP_STUB(iemOp_movq2dq_Vdq_Nq); 7452 /** Opcode 0xf2 0x0f 0xd6 - movdq2q Pq, Uq */ 7453 FNIEMOP_STUB(iemOp_movdq2q_Pq_Uq); 7097 7454 #if 0 7098 7455 FNIEMOP_DEF(iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq) … … 7191 7548 7192 7549 7193 /** Opcode 0x0f 0xd8. */ 7194 FNIEMOP_STUB(iemOp_psubusb_Pq_Qq__psubusb_Vdq_Wdq); 7195 /** Opcode 0x0f 0xd9. */ 7196 FNIEMOP_STUB(iemOp_psubusw_Pq_Qq__psubusw_Vdq_Wdq); 7197 /** Opcode 0x0f 0xda. */ 7198 FNIEMOP_STUB(iemOp_pminub_Pq_Qq__pminub_Vdq_Wdq); 7199 /** Opcode 0x0f 0xdb. */ 7200 FNIEMOP_STUB(iemOp_pand_Pq_Qq__pand_Vdq_Wdq); 7201 /** Opcode 0x0f 0xdc. */ 7202 FNIEMOP_STUB(iemOp_paddusb_Pq_Qq__paddusb_Vdq_Wdq); 7203 /** Opcode 0x0f 0xdd. */ 7204 FNIEMOP_STUB(iemOp_paddusw_Pq_Qq__paddusw_Vdq_Wdq); 7205 /** Opcode 0x0f 0xde. */ 7206 FNIEMOP_STUB(iemOp_pmaxub_Pq_Qq__pamxub_Vdq_Wdq); 7207 /** Opcode 0x0f 0xdf. */ 7208 FNIEMOP_STUB(iemOp_pandn_Pq_Qq__pandn_Vdq_Wdq); 7209 /** Opcode 0x0f 0xe0. */ 7210 FNIEMOP_STUB(iemOp_pavgb_Pq_Qq__pavgb_Vdq_Wdq); 7211 /** Opcode 0x0f 0xe1. */ 7212 FNIEMOP_STUB(iemOp_psraw_Pq_Qq__psraw_Vdq_Wdq); 7213 /** Opcode 0x0f 0xe2. */ 7214 FNIEMOP_STUB(iemOp_psrad_Pq_Qq__psrad_Vdq_Wdq); 7215 /** Opcode 0x0f 0xe3. */ 7216 FNIEMOP_STUB(iemOp_pavgw_Pq_Qq__pavgw_Vdq_Wdq); 7217 /** Opcode 0x0f 0xe4. */ 7218 FNIEMOP_STUB(iemOp_pmulhuw_Pq_Qq__pmulhuw_Vdq_Wdq); 7219 /** Opcode 0x0f 0xe5. */ 7220 FNIEMOP_STUB(iemOp_pmulhw_Pq_Qq__pmulhw_Vdq_Wdq); 7221 /** Opcode 0x0f 0xe6. */ 7222 FNIEMOP_STUB(iemOp_cvttpd2dq_Vdq_Wdp__cvtdq2pd_Vdq_Wpd__cvtpd2dq_Vdq_Wpd); 7550 /** Opcode 0x0f 0xd8 - psubusb Pq, Qq */ 7551 FNIEMOP_STUB(iemOp_psubusb_Pq_Qq); 7552 /** Opcode 0x66 0x0f 0xd8 - vpsubusb Vx, Hx, W */ 7553 FNIEMOP_STUB(iemOp_vpsubusb_Vx_Hx_W); 7554 /* Opcode 0xf3 0x0f 0xd8 - invalid */ 7555 /* Opcode 0xf2 0x0f 0xd8 - invalid */ 7556 7557 /** Opcode 0x0f 0xd9 - psubusw Pq, Qq */ 7558 FNIEMOP_STUB(iemOp_psubusw_Pq_Qq); 7559 /** Opcode 0x66 0x0f 0xd9 - vpsubusw Vx, Hx, Wx */ 7560 FNIEMOP_STUB(iemOp_vpsubusw_Vx_Hx_Wx); 7561 /* Opcode 0xf3 0x0f 0xd9 - invalid */ 7562 /* Opcode 0xf2 0x0f 0xd9 - invalid */ 7563 7564 /** Opcode 0x0f 0xda - pminub Pq, Qq */ 7565 FNIEMOP_STUB(iemOp_pminub_Pq_Qq); 7566 /** Opcode 0x66 0x0f 0xda - vpminub Vx, Hx, Wx */ 7567 FNIEMOP_STUB(iemOp_vpminub_Vx_Hx_Wx); 7568 /* Opcode 0xf3 0x0f 0xda - invalid */ 7569 /* Opcode 0xf2 0x0f 0xda - invalid */ 7570 7571 /** Opcode 0x0f 0xdb - pand Pq, Qq */ 7572 FNIEMOP_STUB(iemOp_pand_Pq_Qq); 7573 /** Opcode 0x66 0x0f 0xdb - vpand Vx, Hx, W */ 7574 FNIEMOP_STUB(iemOp_vpand_Vx_Hx_W); 7575 /* Opcode 0xf3 0x0f 0xdb - invalid */ 7576 /* Opcode 0xf2 0x0f 0xdb - invalid */ 7577 7578 /** Opcode 0x0f 0xdc - paddusb Pq, Qq */ 7579 FNIEMOP_STUB(iemOp_paddusb_Pq_Qq); 7580 /** Opcode 0x66 0x0f 0xdc - vpaddusb Vx, Hx, Wx */ 7581 FNIEMOP_STUB(iemOp_vpaddusb_Vx_Hx_Wx); 7582 /* Opcode 0xf3 0x0f 0xdc - invalid */ 7583 /* Opcode 0xf2 0x0f 0xdc - invalid */ 7584 7585 /** Opcode 0x0f 0xdd - paddusw Pq, Qq */ 7586 FNIEMOP_STUB(iemOp_paddusw_Pq_Qq); 7587 /** Opcode 0x66 0x0f 0xdd - vpaddusw Vx, Hx, Wx */ 7588 FNIEMOP_STUB(iemOp_vpaddusw_Vx_Hx_Wx); 7589 /* Opcode 0xf3 0x0f 0xdd - invalid */ 7590 /* Opcode 0xf2 0x0f 0xdd - invalid */ 7591 7592 /** Opcode 0x0f 0xde - pmaxub Pq, Qq */ 7593 FNIEMOP_STUB(iemOp_pmaxub_Pq_Qq); 7594 /** Opcode 0x66 0x0f 0xde - vpmaxub Vx, Hx, W */ 7595 FNIEMOP_STUB(iemOp_vpmaxub_Vx_Hx_W); 7596 /* Opcode 0xf3 0x0f 0xde - invalid */ 7597 /* Opcode 0xf2 0x0f 0xde - invalid */ 7598 7599 /** Opcode 0x0f 0xdf - pandn Pq, Qq */ 7600 FNIEMOP_STUB(iemOp_pandn_Pq_Qq); 7601 /** Opcode 0x66 0x0f 0xdf - vpandn Vx, Hx, Wx */ 7602 FNIEMOP_STUB(iemOp_vpandn_Vx_Hx_Wx); 7603 /* Opcode 0xf3 0x0f 0xdf - invalid */ 7604 /* Opcode 0xf2 0x0f 0xdf - invalid */ 7605 7606 /** Opcode 0x0f 0xe0 - pavgb Pq, Qq */ 7607 FNIEMOP_STUB(iemOp_pavgb_Pq_Qq); 7608 /** Opcode 0x66 0x0f 0xe0 - vpavgb Vx, Hx, Wx */ 7609 FNIEMOP_STUB(iemOp_vpavgb_Vx_Hx_Wx); 7610 /* Opcode 0xf3 0x0f 0xe0 - invalid */ 7611 /* Opcode 0xf2 0x0f 0xe0 - invalid */ 7612 7613 /** Opcode 0x0f 0xe1 - psraw Pq, Qq */ 7614 FNIEMOP_STUB(iemOp_psraw_Pq_Qq); 7615 /** Opcode 0x66 0x0f 0xe1 - vpsraw Vx, Hx, W */ 7616 FNIEMOP_STUB(iemOp_vpsraw_Vx_Hx_W); 7617 /* Opcode 0xf3 0x0f 0xe1 - invalid */ 7618 /* Opcode 0xf2 0x0f 0xe1 - invalid */ 7619 7620 /** Opcode 0x0f 0xe2 - psrad Pq, Qq */ 7621 FNIEMOP_STUB(iemOp_psrad_Pq_Qq); 7622 /** Opcode 0x66 0x0f 0xe2 - vpsrad Vx, Hx, Wx */ 7623 FNIEMOP_STUB(iemOp_vpsrad_Vx_Hx_Wx); 7624 /* Opcode 0xf3 0x0f 0xe2 - invalid */ 7625 /* Opcode 0xf2 0x0f 0xe2 - invalid */ 7626 7627 /** Opcode 0x0f 0xe3 - pavgw Pq, Qq */ 7628 FNIEMOP_STUB(iemOp_pavgw_Pq_Qq); 7629 /** Opcode 0x66 0x0f 0xe3 - vpavgw Vx, Hx, Wx */ 7630 FNIEMOP_STUB(iemOp_vpavgw_Vx_Hx_Wx); 7631 /* Opcode 0xf3 0x0f 0xe3 - invalid */ 7632 /* Opcode 0xf2 0x0f 0xe3 - invalid */ 7633 7634 /** Opcode 0x0f 0xe4 - pmulhuw Pq, Qq */ 7635 FNIEMOP_STUB(iemOp_pmulhuw_Pq_Qq); 7636 /** Opcode 0x66 0x0f 0xe4 - vpmulhuw Vx, Hx, W */ 7637 FNIEMOP_STUB(iemOp_vpmulhuw_Vx_Hx_W); 7638 /* Opcode 0xf3 0x0f 0xe4 - invalid */ 7639 /* Opcode 0xf2 0x0f 0xe4 - invalid */ 7640 7641 /** Opcode 0x0f 0xe5 - pmulhw Pq, Qq */ 7642 FNIEMOP_STUB(iemOp_pmulhw_Pq_Qq); 7643 /** Opcode 0x66 0x0f 0xe5 - vpmulhw Vx, Hx, Wx */ 7644 FNIEMOP_STUB(iemOp_vpmulhw_Vx_Hx_Wx); 7645 /* Opcode 0xf3 0x0f 0xe5 - invalid */ 7646 /* Opcode 0xf2 0x0f 0xe5 - invalid */ 7647 7648 /* Opcode 0x0f 0xe6 - invalid */ 7649 /** Opcode 0x66 0x0f 0xe6 - vcvttpd2dq Vx, Wpd */ 7650 FNIEMOP_STUB(iemOp_vcvttpd2dq_Vx_Wpd); 7651 /** Opcode 0xf3 0x0f 0xe6 - vcvtdq2pd Vx, Wpd */ 7652 FNIEMOP_STUB(iemOp_vcvtdq2pd_Vx_Wpd); 7653 /** Opcode 0xf2 0x0f 0xe6 - vcvtpd2dq Vx, Wpd */ 7654 FNIEMOP_STUB(iemOp_vcvtpd2dq_Vx_Wpd); 7223 7655 7224 7656 … … 7283 7715 7284 7716 7285 /** Opcode 0x0f 0xe8. */ 7286 FNIEMOP_STUB(iemOp_psubsb_Pq_Qq__psubsb_Vdq_Wdq); 7287 /** Opcode 0x0f 0xe9. */ 7288 FNIEMOP_STUB(iemOp_psubsw_Pq_Qq__psubsw_Vdq_Wdq); 7289 /** Opcode 0x0f 0xea. */ 7290 FNIEMOP_STUB(iemOp_pminsw_Pq_Qq__pminsw_Vdq_Wdq); 7291 /** Opcode 0x0f 0xeb. */ 7292 FNIEMOP_STUB(iemOp_por_Pq_Qq__por_Vdq_Wdq); 7293 /** Opcode 0x0f 0xec. */ 7294 FNIEMOP_STUB(iemOp_paddsb_Pq_Qq__paddsb_Vdq_Wdq); 7295 /** Opcode 0x0f 0xed. */ 7296 FNIEMOP_STUB(iemOp_paddsw_Pq_Qq__paddsw_Vdq_Wdq); 7297 /** Opcode 0x0f 0xee. */ 7298 FNIEMOP_STUB(iemOp_pmaxsw_Pq_Qq__pmaxsw_Vdq_Wdq); 7717 /** Opcode 0x0f 0xe8 - psubsb Pq, Qq */ 7718 FNIEMOP_STUB(iemOp_psubsb_Pq_Qq); 7719 /** Opcode 0x66 0x0f 0xe8 - vpsubsb Vx, Hx, W */ 7720 FNIEMOP_STUB(iemOp_vpsubsb_Vx_Hx_W); 7721 /* Opcode 0xf3 0x0f 0xe8 - invalid */ 7722 /* Opcode 0xf2 0x0f 0xe8 - invalid */ 7723 7724 /** Opcode 0x0f 0xe9 - psubsw Pq, Qq */ 7725 FNIEMOP_STUB(iemOp_psubsw_Pq_Qq); 7726 /** Opcode 0x66 0x0f 0xe9 - vpsubsw Vx, Hx, Wx */ 7727 FNIEMOP_STUB(iemOp_vpsubsw_Vx_Hx_Wx); 7728 /* Opcode 0xf3 0x0f 0xe9 - invalid */ 7729 /* Opcode 0xf2 0x0f 0xe9 - invalid */ 7730 7731 /** Opcode 0x0f 0xea - pminsw Pq, Qq */ 7732 FNIEMOP_STUB(iemOp_pminsw_Pq_Qq); 7733 /** Opcode 0x66 0x0f 0xea - vpminsw Vx, Hx, Wx */ 7734 FNIEMOP_STUB(iemOp_vpminsw_Vx_Hx_Wx); 7735 /* Opcode 0xf3 0x0f 0xea - invalid */ 7736 /* Opcode 0xf2 0x0f 0xea - invalid */ 7737 7738 /** Opcode 0x0f 0xeb - por Pq, Qq */ 7739 FNIEMOP_STUB(iemOp_por_Pq_Qq); 7740 /** Opcode 0x66 0x0f 0xeb - vpor Vx, Hx, W */ 7741 FNIEMOP_STUB(iemOp_vpor_Vx_Hx_W); 7742 /* Opcode 0xf3 0x0f 0xeb - invalid */ 7743 /* Opcode 0xf2 0x0f 0xeb - invalid */ 7744 7745 /** Opcode 0x0f 0xec - paddsb Pq, Qq */ 7746 FNIEMOP_STUB(iemOp_paddsb_Pq_Qq); 7747 /** Opcode 0x66 0x0f 0xec - vpaddsb Vx, Hx, Wx */ 7748 FNIEMOP_STUB(iemOp_vpaddsb_Vx_Hx_Wx); 7749 /* Opcode 0xf3 0x0f 0xec - invalid */ 7750 /* Opcode 0xf2 0x0f 0xec - invalid */ 7751 7752 /** Opcode 0x0f 0xed - paddsw Pq, Qq */ 7753 FNIEMOP_STUB(iemOp_paddsw_Pq_Qq); 7754 /** Opcode 0x66 0x0f 0xed - vpaddsw Vx, Hx, Wx */ 7755 FNIEMOP_STUB(iemOp_vpaddsw_Vx_Hx_Wx); 7756 /* Opcode 0xf3 0x0f 0xed - invalid */ 7757 /* Opcode 0xf2 0x0f 0xed - invalid */ 7758 7759 /** Opcode 0x0f 0xee - pmaxsw Pq, Qq */ 7760 FNIEMOP_STUB(iemOp_pmaxsw_Pq_Qq); 7761 /** Opcode 0x66 0x0f 0xee - vpmaxsw Vx, Hx, W */ 7762 FNIEMOP_STUB(iemOp_vpmaxsw_Vx_Hx_W); 7763 /* Opcode 0xf3 0x0f 0xee - invalid */ 7764 /* Opcode 0xf2 0x0f 0xee - invalid */ 7299 7765 7300 7766 … … 7305 7771 return FNIEMOP_CALL_1(iemOpCommonMmxSse2_FullFull_To_Full, &g_iemAImpl_pxor); 7306 7772 } 7307 7308 7309 /** Opcode 0x0f 0xf0. */ 7310 FNIEMOP_STUB(iemOp_lddqu_Vdq_Mdq); 7311 /** Opcode 0x0f 0xf1. */ 7312 FNIEMOP_STUB(iemOp_psllw_Pq_Qq__pslw_Vdq_Wdq); 7313 /** Opcode 0x0f 0xf2. */ 7314 FNIEMOP_STUB(iemOp_psld_Pq_Qq__pslld_Vdq_Wdq); 7315 /** Opcode 0x0f 0xf3. */ 7316 FNIEMOP_STUB(iemOp_psllq_Pq_Qq__pslq_Vdq_Wdq); 7317 /** Opcode 0x0f 0xf4. */ 7318 FNIEMOP_STUB(iemOp_pmuludq_Pq_Qq__pmuludq_Vdq_Wdq); 7319 /** Opcode 0x0f 0xf5. */ 7320 FNIEMOP_STUB(iemOp_pmaddwd_Pq_Qq__pmaddwd_Vdq_Wdq); 7321 /** Opcode 0x0f 0xf6. */ 7322 FNIEMOP_STUB(iemOp_psadbw_Pq_Qq__psadbw_Vdq_Wdq); 7323 /** Opcode 0x0f 0xf7. */ 7324 FNIEMOP_STUB(iemOp_maskmovq_Pq_Nq__maskmovdqu_Vdq_Udq); 7325 /** Opcode 0x0f 0xf8. */ 7326 FNIEMOP_STUB(iemOp_psubb_Pq_Qq_psubb_Vdq_Wdq); //NEXT 7327 /** Opcode 0x0f 0xf9. */ 7328 FNIEMOP_STUB(iemOp_psubw_Pq_Qq__psubw_Vdq_Wdq); 7329 /** Opcode 0x0f 0xfa. */ 7330 FNIEMOP_STUB(iemOp_psubd_Pq_Qq__psubd_Vdq_Wdq); 7331 /** Opcode 0x0f 0xfb. */ 7332 FNIEMOP_STUB(iemOp_psubq_Pq_Qq__psbuq_Vdq_Wdq); 7333 /** Opcode 0x0f 0xfc. */ 7334 FNIEMOP_STUB(iemOp_paddb_Pq_Qq__paddb_Vdq_Wdq); 7335 /** Opcode 0x0f 0xfd. */ 7336 FNIEMOP_STUB(iemOp_paddw_Pq_Qq__paddw_Vdq_Wdq); 7337 /** Opcode 0x0f 0xfe. */ 7338 FNIEMOP_STUB(iemOp_paddd_Pq_Qq__paddd_Vdq_Wdq); 7339 7340 7341 IEM_STATIC const PFNIEMOP g_apfnTwoByteMap[256] = 7342 { 7343 /* 0x00 */ iemOp_Grp6, 7344 /* 0x01 */ iemOp_Grp7, 7345 /* 0x02 */ iemOp_lar_Gv_Ew, 7346 /* 0x03 */ iemOp_lsl_Gv_Ew, 7347 /* 0x04 */ iemOp_Invalid, 7348 /* 0x05 */ iemOp_syscall, 7349 /* 0x06 */ iemOp_clts, 7350 /* 0x07 */ iemOp_sysret, 7351 /* 0x08 */ iemOp_invd, 7352 /* 0x09 */ iemOp_wbinvd, 7353 /* 0x0a */ iemOp_Invalid, 7354 /* 0x0b */ iemOp_ud2, 7355 /* 0x0c */ iemOp_Invalid, 7356 /* 0x0d */ iemOp_nop_Ev_GrpP, 7357 /* 0x0e */ iemOp_femms, 7358 /* 0x0f */ iemOp_3Dnow, 7359 /* 0x10 */ iemOp_movups_Vps_Wps__movupd_Vpd_Wpd__movss_Vss_Wss__movsd_Vsd_Wsd, 7360 /* 0x11 */ iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd, 7361 /* 0x12 */ iemOp_movlps_Vq_Mq__movhlps_Vq_Uq__movlpd_Vq_Mq__movsldup_Vq_Wq__movddup_Vq_Wq, 7362 /* 0x13 */ iemOp_movlps_Mq_Vq__movlpd_Mq_Vq, 7363 /* 0x14 */ iemOp_unpckhlps_Vps_Wq__unpcklpd_Vpd_Wq, 7364 /* 0x15 */ iemOp_unpckhps_Vps_Wq__unpckhpd_Vpd_Wq, 7365 /* 0x16 */ iemOp_movhps_Vq_Mq__movlhps_Vq_Uq__movhpd_Vq_Mq__movshdup_Vq_Wq, 7366 /* 0x17 */ iemOp_movhps_Mq_Vq__movhpd_Mq_Vq, 7367 /* 0x18 */ iemOp_prefetch_Grp16, 7368 /* 0x19 */ iemOp_nop_Ev, 7369 /* 0x1a */ iemOp_nop_Ev, 7370 /* 0x1b */ iemOp_nop_Ev, 7371 /* 0x1c */ iemOp_nop_Ev, 7372 /* 0x1d */ iemOp_nop_Ev, 7373 /* 0x1e */ iemOp_nop_Ev, 7374 /* 0x1f */ iemOp_nop_Ev, 7375 /* 0x20 */ iemOp_mov_Rd_Cd, 7376 /* 0x21 */ iemOp_mov_Rd_Dd, 7377 /* 0x22 */ iemOp_mov_Cd_Rd, 7378 /* 0x23 */ iemOp_mov_Dd_Rd, 7379 /* 0x24 */ iemOp_mov_Rd_Td, 7380 /* 0x25 */ iemOp_Invalid, 7381 /* 0x26 */ iemOp_mov_Td_Rd, 7382 /* 0x27 */ iemOp_Invalid, 7383 /* 0x28 */ iemOp_movaps_Vps_Wps__movapd_Vpd_Wpd, 7384 /* 0x29 */ iemOp_movaps_Wps_Vps__movapd_Wpd_Vpd, 7385 /* 0x2a */ iemOp_cvtpi2ps_Vps_Qpi__cvtpi2pd_Vpd_Qpi__cvtsi2ss_Vss_Ey__cvtsi2sd_Vsd_Ey, 7386 /* 0x2b */ iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd, 7387 /* 0x2c */ iemOp_cvttps2pi_Ppi_Wps__cvttpd2pi_Ppi_Wpd__cvttss2si_Gy_Wss__cvttsd2si_Yu_Wsd, 7388 /* 0x2d */ iemOp_cvtps2pi_Ppi_Wps__cvtpd2pi_QpiWpd__cvtss2si_Gy_Wss__cvtsd2si_Gy_Wsd, 7389 /* 0x2e */ iemOp_ucomiss_Vss_Wss__ucomisd_Vsd_Wsd, 7390 /* 0x2f */ iemOp_comiss_Vss_Wss__comisd_Vsd_Wsd, 7391 /* 0x30 */ iemOp_wrmsr, 7392 /* 0x31 */ iemOp_rdtsc, 7393 /* 0x32 */ iemOp_rdmsr, 7394 /* 0x33 */ iemOp_rdpmc, 7395 /* 0x34 */ iemOp_sysenter, 7396 /* 0x35 */ iemOp_sysexit, 7397 /* 0x36 */ iemOp_Invalid, 7398 /* 0x37 */ iemOp_getsec, 7399 /* 0x38 */ iemOp_3byte_Esc_A4, 7400 /* 0x39 */ iemOp_Invalid, 7401 /* 0x3a */ iemOp_3byte_Esc_A5, 7402 /* 0x3b */ iemOp_Invalid, 7403 /* 0x3c */ iemOp_Invalid, 7404 /* 0x3d */ iemOp_Invalid, 7405 /* 0x3e */ iemOp_Invalid, 7406 /* 0x3f */ iemOp_Invalid, 7407 /* 0x40 */ iemOp_cmovo_Gv_Ev, 7408 /* 0x41 */ iemOp_cmovno_Gv_Ev, 7409 /* 0x42 */ iemOp_cmovc_Gv_Ev, 7410 /* 0x43 */ iemOp_cmovnc_Gv_Ev, 7411 /* 0x44 */ iemOp_cmove_Gv_Ev, 7412 /* 0x45 */ iemOp_cmovne_Gv_Ev, 7413 /* 0x46 */ iemOp_cmovbe_Gv_Ev, 7414 /* 0x47 */ iemOp_cmovnbe_Gv_Ev, 7415 /* 0x48 */ iemOp_cmovs_Gv_Ev, 7416 /* 0x49 */ iemOp_cmovns_Gv_Ev, 7417 /* 0x4a */ iemOp_cmovp_Gv_Ev, 7418 /* 0x4b */ iemOp_cmovnp_Gv_Ev, 7419 /* 0x4c */ iemOp_cmovl_Gv_Ev, 7420 /* 0x4d */ iemOp_cmovnl_Gv_Ev, 7421 /* 0x4e */ iemOp_cmovle_Gv_Ev, 7422 /* 0x4f */ iemOp_cmovnle_Gv_Ev, 7423 /* 0x50 */ iemOp_movmskps_Gy_Ups__movmskpd_Gy_Upd, 7424 /* 0x51 */ iemOp_sqrtps_Wps_Vps__sqrtpd_Wpd_Vpd__sqrtss_Vss_Wss__sqrtsd_Vsd_Wsd, 7425 /* 0x52 */ iemOp_rsqrtps_Wps_Vps__rsqrtss_Vss_Wss, 7426 /* 0x53 */ iemOp_rcpps_Wps_Vps__rcpss_Vs_Wss, 7427 /* 0x54 */ iemOp_andps_Vps_Wps__andpd_Wpd_Vpd, 7428 /* 0x55 */ iemOp_andnps_Vps_Wps__andnpd_Wpd_Vpd, 7429 /* 0x56 */ iemOp_orps_Wpd_Vpd__orpd_Wpd_Vpd, 7430 /* 0x57 */ iemOp_xorps_Vps_Wps__xorpd_Wpd_Vpd, 7431 /* 0x58 */ iemOp_addps_Vps_Wps__addpd_Vpd_Wpd__addss_Vss_Wss__addsd_Vsd_Wsd, 7432 /* 0x59 */ iemOp_mulps_Vps_Wps__mulpd_Vpd_Wpd__mulss_Vss__Wss__mulsd_Vsd_Wsd, 7433 /* 0x5a */ iemOp_cvtps2pd_Vpd_Wps__cvtpd2ps_Vps_Wpd__cvtss2sd_Vsd_Wss__cvtsd2ss_Vss_Wsd, 7434 /* 0x5b */ iemOp_cvtdq2ps_Vps_Wdq__cvtps2dq_Vdq_Wps__cvtps2dq_Vdq_Wps, 7435 /* 0x5c */ iemOp_subps_Vps_Wps__subpd_Vps_Wdp__subss_Vss_Wss__subsd_Vsd_Wsd, 7436 /* 0x5d */ iemOp_minps_Vps_Wps__minpd_Vpd_Wpd__minss_Vss_Wss__minsd_Vsd_Wsd, 7437 /* 0x5e */ iemOp_divps_Vps_Wps__divpd_Vpd_Wpd__divss_Vss_Wss__divsd_Vsd_Wsd, 7438 /* 0x5f */ iemOp_maxps_Vps_Wps__maxpd_Vpd_Wpd__maxss_Vss_Wss__maxsd_Vsd_Wsd, 7439 /* 0x60 */ iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq, 7440 /* 0x61 */ iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq, 7441 /* 0x62 */ iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq, 7442 /* 0x63 */ iemOp_packsswb_Pq_Qq__packsswb_Vdq_Wdq, 7443 /* 0x64 */ iemOp_pcmpgtb_Pq_Qq__pcmpgtb_Vdq_Wdq, 7444 /* 0x65 */ iemOp_pcmpgtw_Pq_Qq__pcmpgtw_Vdq_Wdq, 7445 /* 0x66 */ iemOp_pcmpgtd_Pq_Qq__pcmpgtd_Vdq_Wdq, 7446 /* 0x67 */ iemOp_packuswb_Pq_Qq__packuswb_Vdq_Wdq, 7447 /* 0x68 */ iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq, 7448 /* 0x69 */ iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq, 7449 /* 0x6a */ iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq, 7450 /* 0x6b */ iemOp_packssdw_Pq_Qd__packssdq_Vdq_Wdq, 7451 /* 0x6c */ iemOp_punpcklqdq_Vdq_Wdq, 7452 /* 0x6d */ iemOp_punpckhqdq_Vdq_Wdq, 7453 /* 0x6e */ iemOp_movd_q_Pd_Ey__movd_q_Vy_Ey, 7454 /* 0x6f */ iemOp_movq_Pq_Qq__movdqa_Vdq_Wdq__movdqu_Vdq_Wdq, 7455 /* 0x70 */ iemOp_pshufw_Pq_Qq_Ib__pshufd_Vdq_Wdq_Ib__pshufhw_Vdq_Wdq_Ib__pshuflq_Vdq_Wdq_Ib, 7456 /* 0x71 */ iemOp_Grp12, 7457 /* 0x72 */ iemOp_Grp13, 7458 /* 0x73 */ iemOp_Grp14, 7459 /* 0x74 */ iemOp_pcmpeqb_Pq_Qq__pcmpeqb_Vdq_Wdq, 7460 /* 0x75 */ iemOp_pcmpeqw_Pq_Qq__pcmpeqw_Vdq_Wdq, 7461 /* 0x76 */ iemOp_pcmped_Pq_Qq__pcmpeqd_Vdq_Wdq, 7462 /* 0x77 */ iemOp_emms, 7463 /* 0x78 */ iemOp_vmread_AmdGrp17, 7464 /* 0x79 */ iemOp_vmwrite, 7465 /* 0x7a */ iemOp_Invalid, 7466 /* 0x7b */ iemOp_Invalid, 7467 /* 0x7c */ iemOp_haddpd_Vdp_Wpd__haddps_Vps_Wps, 7468 /* 0x7d */ iemOp_hsubpd_Vpd_Wpd__hsubps_Vps_Wps, 7469 /* 0x7e */ iemOp_movd_q_Ey_Pd__movd_q_Ey_Vy__movq_Vq_Wq, 7470 /* 0x7f */ iemOp_movq_Qq_Pq__movq_movdqa_Wdq_Vdq__movdqu_Wdq_Vdq, 7471 /* 0x80 */ iemOp_jo_Jv, 7472 /* 0x81 */ iemOp_jno_Jv, 7473 /* 0x82 */ iemOp_jc_Jv, 7474 /* 0x83 */ iemOp_jnc_Jv, 7475 /* 0x84 */ iemOp_je_Jv, 7476 /* 0x85 */ iemOp_jne_Jv, 7477 /* 0x86 */ iemOp_jbe_Jv, 7478 /* 0x87 */ iemOp_jnbe_Jv, 7479 /* 0x88 */ iemOp_js_Jv, 7480 /* 0x89 */ iemOp_jns_Jv, 7481 /* 0x8a */ iemOp_jp_Jv, 7482 /* 0x8b */ iemOp_jnp_Jv, 7483 /* 0x8c */ iemOp_jl_Jv, 7484 /* 0x8d */ iemOp_jnl_Jv, 7485 /* 0x8e */ iemOp_jle_Jv, 7486 /* 0x8f */ iemOp_jnle_Jv, 7487 /* 0x90 */ iemOp_seto_Eb, 7488 /* 0x91 */ iemOp_setno_Eb, 7489 /* 0x92 */ iemOp_setc_Eb, 7490 /* 0x93 */ iemOp_setnc_Eb, 7491 /* 0x94 */ iemOp_sete_Eb, 7492 /* 0x95 */ iemOp_setne_Eb, 7493 /* 0x96 */ iemOp_setbe_Eb, 7494 /* 0x97 */ iemOp_setnbe_Eb, 7495 /* 0x98 */ iemOp_sets_Eb, 7496 /* 0x99 */ iemOp_setns_Eb, 7497 /* 0x9a */ iemOp_setp_Eb, 7498 /* 0x9b */ iemOp_setnp_Eb, 7499 /* 0x9c */ iemOp_setl_Eb, 7500 /* 0x9d */ iemOp_setnl_Eb, 7501 /* 0x9e */ iemOp_setle_Eb, 7502 /* 0x9f */ iemOp_setnle_Eb, 7503 /* 0xa0 */ iemOp_push_fs, 7504 /* 0xa1 */ iemOp_pop_fs, 7505 /* 0xa2 */ iemOp_cpuid, 7506 /* 0xa3 */ iemOp_bt_Ev_Gv, 7507 /* 0xa4 */ iemOp_shld_Ev_Gv_Ib, 7508 /* 0xa5 */ iemOp_shld_Ev_Gv_CL, 7509 /* 0xa6 */ iemOp_Invalid, 7510 /* 0xa7 */ iemOp_Invalid, 7511 /* 0xa8 */ iemOp_push_gs, 7512 /* 0xa9 */ iemOp_pop_gs, 7513 /* 0xaa */ iemOp_rsm, 7514 /* 0xab */ iemOp_bts_Ev_Gv, 7515 /* 0xac */ iemOp_shrd_Ev_Gv_Ib, 7516 /* 0xad */ iemOp_shrd_Ev_Gv_CL, 7517 /* 0xae */ iemOp_Grp15, 7518 /* 0xaf */ iemOp_imul_Gv_Ev, 7519 /* 0xb0 */ iemOp_cmpxchg_Eb_Gb, 7520 /* 0xb1 */ iemOp_cmpxchg_Ev_Gv, 7521 /* 0xb2 */ iemOp_lss_Gv_Mp, 7522 /* 0xb3 */ iemOp_btr_Ev_Gv, 7523 /* 0xb4 */ iemOp_lfs_Gv_Mp, 7524 /* 0xb5 */ iemOp_lgs_Gv_Mp, 7525 /* 0xb6 */ iemOp_movzx_Gv_Eb, 7526 /* 0xb7 */ iemOp_movzx_Gv_Ew, 7527 /* 0xb8 */ iemOp_popcnt_Gv_Ev_jmpe, 7528 /* 0xb9 */ iemOp_Grp10, 7529 /* 0xba */ iemOp_Grp8, 7530 /* 0xbb */ iemOp_btc_Ev_Gv, 7531 /* 0xbc */ iemOp_bsf_Gv_Ev, 7532 /* 0xbd */ iemOp_bsr_Gv_Ev, 7533 /* 0xbe */ iemOp_movsx_Gv_Eb, 7534 /* 0xbf */ iemOp_movsx_Gv_Ew, 7535 /* 0xc0 */ iemOp_xadd_Eb_Gb, 7536 /* 0xc1 */ iemOp_xadd_Ev_Gv, 7537 /* 0xc2 */ iemOp_cmpps_Vps_Wps_Ib__cmppd_Vpd_Wpd_Ib__cmpss_Vss_Wss_Ib__cmpsd_Vsd_Wsd_Ib, 7538 /* 0xc3 */ iemOp_movnti_My_Gy, 7539 /* 0xc4 */ iemOp_pinsrw_Pq_Ry_Mw_Ib__pinsrw_Vdq_Ry_Mw_Ib, 7540 /* 0xc5 */ iemOp_pextrw_Gd_Nq_Ib__pextrw_Gd_Udq_Ib, 7541 /* 0xc6 */ iemOp_shufps_Vps_Wps_Ib__shufdp_Vpd_Wpd_Ib, 7542 /* 0xc7 */ iemOp_Grp9, 7543 /* 0xc8 */ iemOp_bswap_rAX_r8, 7544 /* 0xc9 */ iemOp_bswap_rCX_r9, 7545 /* 0xca */ iemOp_bswap_rDX_r10, 7546 /* 0xcb */ iemOp_bswap_rBX_r11, 7547 /* 0xcc */ iemOp_bswap_rSP_r12, 7548 /* 0xcd */ iemOp_bswap_rBP_r13, 7549 /* 0xce */ iemOp_bswap_rSI_r14, 7550 /* 0xcf */ iemOp_bswap_rDI_r15, 7551 /* 0xd0 */ iemOp_addsubpd_Vpd_Wpd__addsubps_Vps_Wps, 7552 /* 0xd1 */ iemOp_psrlw_Pp_Qp__psrlw_Vdp_Wdq, 7553 /* 0xd2 */ iemOp_psrld_Pq_Qq__psrld_Vdq_Wdq, 7554 /* 0xd3 */ iemOp_psrlq_Pq_Qq__psrlq_Vdq_Wdq, 7555 /* 0xd4 */ iemOp_paddq_Pq_Qq__paddq_Vdq_Wdq, 7556 /* 0xd5 */ iemOp_pmulq_Pq_Qq__pmullw_Vdq_Wdq, 7557 /* 0xd6 */ iemOp_movq_Wq_Vq__movq2dq_Vdq_Nq__movdq2q_Pq_Uq, 7558 /* 0xd7 */ iemOp_pmovmskb_Gd_Nq__pmovmskb_Gd_Udq, 7559 /* 0xd8 */ iemOp_psubusb_Pq_Qq__psubusb_Vdq_Wdq, 7560 /* 0xd9 */ iemOp_psubusw_Pq_Qq__psubusw_Vdq_Wdq, 7561 /* 0xda */ iemOp_pminub_Pq_Qq__pminub_Vdq_Wdq, 7562 /* 0xdb */ iemOp_pand_Pq_Qq__pand_Vdq_Wdq, 7563 /* 0xdc */ iemOp_paddusb_Pq_Qq__paddusb_Vdq_Wdq, 7564 /* 0xdd */ iemOp_paddusw_Pq_Qq__paddusw_Vdq_Wdq, 7565 /* 0xde */ iemOp_pmaxub_Pq_Qq__pamxub_Vdq_Wdq, 7566 /* 0xdf */ iemOp_pandn_Pq_Qq__pandn_Vdq_Wdq, 7567 /* 0xe0 */ iemOp_pavgb_Pq_Qq__pavgb_Vdq_Wdq, 7568 /* 0xe1 */ iemOp_psraw_Pq_Qq__psraw_Vdq_Wdq, 7569 /* 0xe2 */ iemOp_psrad_Pq_Qq__psrad_Vdq_Wdq, 7570 /* 0xe3 */ iemOp_pavgw_Pq_Qq__pavgw_Vdq_Wdq, 7571 /* 0xe4 */ iemOp_pmulhuw_Pq_Qq__pmulhuw_Vdq_Wdq, 7572 /* 0xe5 */ iemOp_pmulhw_Pq_Qq__pmulhw_Vdq_Wdq, 7573 /* 0xe6 */ iemOp_cvttpd2dq_Vdq_Wdp__cvtdq2pd_Vdq_Wpd__cvtpd2dq_Vdq_Wpd, 7574 /* 0xe7 */ iemOp_movntq_Mq_Pq__movntdq_Mdq_Vdq, 7575 /* 0xe8 */ iemOp_psubsb_Pq_Qq__psubsb_Vdq_Wdq, 7576 /* 0xe9 */ iemOp_psubsw_Pq_Qq__psubsw_Vdq_Wdq, 7577 /* 0xea */ iemOp_pminsw_Pq_Qq__pminsw_Vdq_Wdq, 7578 /* 0xeb */ iemOp_por_Pq_Qq__por_Vdq_Wdq, 7579 /* 0xec */ iemOp_paddsb_Pq_Qq__paddsb_Vdq_Wdq, 7580 /* 0xed */ iemOp_paddsw_Pq_Qq__paddsw_Vdq_Wdq, 7581 /* 0xee */ iemOp_pmaxsw_Pq_Qq__pmaxsw_Vdq_Wdq, 7582 /* 0xef */ iemOp_pxor_Pq_Qq__pxor_Vdq_Wdq, 7583 /* 0xf0 */ iemOp_lddqu_Vdq_Mdq, 7584 /* 0xf1 */ iemOp_psllw_Pq_Qq__pslw_Vdq_Wdq, 7585 /* 0xf2 */ iemOp_psld_Pq_Qq__pslld_Vdq_Wdq, 7586 /* 0xf3 */ iemOp_psllq_Pq_Qq__pslq_Vdq_Wdq, 7587 /* 0xf4 */ iemOp_pmuludq_Pq_Qq__pmuludq_Vdq_Wdq, 7588 /* 0xf5 */ iemOp_pmaddwd_Pq_Qq__pmaddwd_Vdq_Wdq, 7589 /* 0xf6 */ iemOp_psadbw_Pq_Qq__psadbw_Vdq_Wdq, 7590 /* 0xf7 */ iemOp_maskmovq_Pq_Nq__maskmovdqu_Vdq_Udq, 7591 /* 0xf8 */ iemOp_psubb_Pq_Qq_psubb_Vdq_Wdq, 7592 /* 0xf9 */ iemOp_psubw_Pq_Qq__psubw_Vdq_Wdq, 7593 /* 0xfa */ iemOp_psubd_Pq_Qq__psubd_Vdq_Wdq, 7594 /* 0xfb */ iemOp_psubq_Pq_Qq__psbuq_Vdq_Wdq, 7595 /* 0xfc */ iemOp_paddb_Pq_Qq__paddb_Vdq_Wdq, 7596 /* 0xfd */ iemOp_paddw_Pq_Qq__paddw_Vdq_Wdq, 7597 /* 0xfe */ iemOp_paddd_Pq_Qq__paddd_Vdq_Wdq, 7598 /* 0xff */ iemOp_Invalid 7773 /* Opcode 0xf3 0x0f 0xef - invalid */ 7774 /* Opcode 0xf2 0x0f 0xef - invalid */ 7775 7776 /* Opcode 0x0f 0xf0 - invalid */ 7777 /* Opcode 0x66 0x0f 0xf0 - invalid */ 7778 /** Opcode 0xf2 0x0f 0xf0 - vlddqu Vx, Mx */ 7779 FNIEMOP_STUB(iemOp_vlddqu_Vx_Mx); 7780 7781 /** Opcode 0x0f 0xf1 - psllw Pq, Qq */ 7782 FNIEMOP_STUB(iemOp_psllw_Pq_Qq); 7783 /** Opcode 0x66 0x0f 0xf1 - vpsllw Vx, Hx, W */ 7784 FNIEMOP_STUB(iemOp_vpsllw_Vx_Hx_W); 7785 /* Opcode 0xf2 0x0f 0xf1 - invalid */ 7786 7787 /** Opcode 0x0f 0xf2 - pslld Pq, Qq */ 7788 FNIEMOP_STUB(iemOp_pslld_Pq_Qq); 7789 /** Opcode 0x66 0x0f 0xf2 - vpslld Vx, Hx, Wx */ 7790 FNIEMOP_STUB(iemOp_vpslld_Vx_Hx_Wx); 7791 /* Opcode 0xf2 0x0f 0xf2 - invalid */ 7792 7793 /** Opcode 0x0f 0xf3 - psllq Pq, Qq */ 7794 FNIEMOP_STUB(iemOp_psllq_Pq_Qq); 7795 /** Opcode 0x66 0x0f 0xf3 - vpsllq Vx, Hx, Wx */ 7796 FNIEMOP_STUB(iemOp_vpsllq_Vx_Hx_Wx); 7797 /* Opcode 0xf2 0x0f 0xf3 - invalid */ 7798 7799 /** Opcode 0x0f 0xf4 - pmuludq Pq, Qq */ 7800 FNIEMOP_STUB(iemOp_pmuludq_Pq_Qq); 7801 /** Opcode 0x66 0x0f 0xf4 - vpmuludq Vx, Hx, W */ 7802 FNIEMOP_STUB(iemOp_vpmuludq_Vx_Hx_W); 7803 /* Opcode 0xf2 0x0f 0xf4 - invalid */ 7804 7805 /** Opcode 0x0f 0xf5 - pmaddwd Pq, Qq */ 7806 FNIEMOP_STUB(iemOp_pmaddwd_Pq_Qq); 7807 /** Opcode 0x66 0x0f 0xf5 - vpmaddwd Vx, Hx, Wx */ 7808 FNIEMOP_STUB(iemOp_vpmaddwd_Vx_Hx_Wx); 7809 /* Opcode 0xf2 0x0f 0xf5 - invalid */ 7810 7811 /** Opcode 0x0f 0xf6 - psadbw Pq, Qq */ 7812 FNIEMOP_STUB(iemOp_psadbw_Pq_Qq); 7813 /** Opcode 0x66 0x0f 0xf6 - vpsadbw Vx, Hx, Wx */ 7814 FNIEMOP_STUB(iemOp_vpsadbw_Vx_Hx_Wx); 7815 /* Opcode 0xf2 0x0f 0xf6 - invalid */ 7816 7817 /** Opcode 0x0f 0xf7 - maskmovq Pq, Nq */ 7818 FNIEMOP_STUB(iemOp_maskmovq_Pq_Nq); 7819 /** Opcode 0x66 0x0f 0xf7 - vmaskmovdqu Vdq, Udq */ 7820 FNIEMOP_STUB(iemOp_vmaskmovdqu_Vdq_Udq); 7821 /* Opcode 0xf2 0x0f 0xf7 - invalid */ 7822 7823 /** Opcode 0x0f 0xf8 - psubb Pq, Qq */ 7824 FNIEMOP_STUB(iemOp_psubb_Pq_Qq); 7825 /** Opcode 0x66 0x0f 0xf8 - vpsubb Vx, Hx, W */ 7826 FNIEMOP_STUB(iemOp_vpsubb_Vx_Hx_W); 7827 /* Opcode 0xf2 0x0f 0xf8 - invalid */ 7828 7829 /** Opcode 0x0f 0xf9 - psubw Pq, Qq */ 7830 FNIEMOP_STUB(iemOp_psubw_Pq_Qq); 7831 /** Opcode 0x66 0x0f 0xf9 - vpsubw Vx, Hx, Wx */ 7832 FNIEMOP_STUB(iemOp_vpsubw_Vx_Hx_Wx); 7833 /* Opcode 0xf2 0x0f 0xf9 - invalid */ 7834 7835 /** Opcode 0x0f 0xfa - psubd Pq, Qq */ 7836 FNIEMOP_STUB(iemOp_psubd_Pq_Qq); 7837 /** Opcode 0x66 0x0f 0xfa - vpsubd Vx, Hx, Wx */ 7838 FNIEMOP_STUB(iemOp_vpsubd_Vx_Hx_Wx); 7839 /* Opcode 0xf2 0x0f 0xfa - invalid */ 7840 7841 /** Opcode 0x0f 0xfb - psubq Pq, Qq */ 7842 FNIEMOP_STUB(iemOp_psubq_Pq_Qq); 7843 /** Opcode 0x66 0x0f 0xfb - vpsubq Vx, Hx, W */ 7844 FNIEMOP_STUB(iemOp_vpsubq_Vx_Hx_W); 7845 /* Opcode 0xf2 0x0f 0xfb - invalid */ 7846 7847 /** Opcode 0x0f 0xfc - paddb Pq, Qq */ 7848 FNIEMOP_STUB(iemOp_paddb_Pq_Qq); 7849 /** Opcode 0x66 0x0f 0xfc - vpaddb Vx, Hx, Wx */ 7850 FNIEMOP_STUB(iemOp_vpaddb_Vx_Hx_Wx); 7851 /* Opcode 0xf2 0x0f 0xfc - invalid */ 7852 7853 /** Opcode 0x0f 0xfd - paddw Pq, Qq */ 7854 FNIEMOP_STUB(iemOp_paddw_Pq_Qq); 7855 /** Opcode 0x66 0x0f 0xfd - vpaddw Vx, Hx, Wx */ 7856 FNIEMOP_STUB(iemOp_vpaddw_Vx_Hx_Wx); 7857 /* Opcode 0xf2 0x0f 0xfd - invalid */ 7858 7859 /** Opcode 0x0f 0xfe - paddd Pq, Qq */ 7860 FNIEMOP_STUB(iemOp_paddd_Pq_Qq); 7861 /** Opcode 0x66 0x0f 0xfe - vpaddd Vx, Hx, W */ 7862 FNIEMOP_STUB(iemOp_vpaddd_Vx_Hx_W); 7863 /* Opcode 0xf2 0x0f 0xfe - invalid */ 7864 7865 7866 /** Opcode **** 0x0f 0xff - UD0 */ 7867 FNIEMOP_DEF(iemOp_ud0) 7868 { 7869 IEMOP_MNEMONIC(ud0, "ud0"); 7870 if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL) 7871 { 7872 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm); 7873 #ifndef TST_IEM_CHECK_MC 7874 RTGCPTR GCPtrEff; 7875 VBOXSTRICTRC rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff); 7876 if (rcStrict != VINF_SUCCESS) 7877 return rcStrict; 7878 #endif 7879 IEMOP_HLP_DONE_DECODING(); 7880 } 7881 return IEMOP_RAISE_INVALID_OPCODE(); 7882 } 7883 7884 7885 7886 /** Repeats a_fn four times. For decoding tables. */ 7887 #define IEMOP_X4(a_fn) a_fn, a_fn, a_fn, a_fn 7888 7889 IEM_STATIC const PFNIEMOP g_apfnTwoByteMap[] = 7890 { 7891 /* no prefix, 066h prefix f3h prefix, f2h prefix */ 7892 /* 0x00 */ IEMOP_X4(iemOp_Grp6), 7893 /* 0x01 */ IEMOP_X4(iemOp_Grp7), 7894 /* 0x02 */ IEMOP_X4(iemOp_lar_Gv_Ew), 7895 /* 0x03 */ IEMOP_X4(iemOp_lsl_Gv_Ew), 7896 /* 0x04 */ IEMOP_X4(iemOp_Invalid), 7897 /* 0x05 */ IEMOP_X4(iemOp_syscall), 7898 /* 0x06 */ IEMOP_X4(iemOp_clts), 7899 /* 0x07 */ IEMOP_X4(iemOp_sysret), 7900 /* 0x08 */ IEMOP_X4(iemOp_invd), 7901 /* 0x09 */ IEMOP_X4(iemOp_wbinvd), 7902 /* 0x0a */ IEMOP_X4(iemOp_Invalid), 7903 /* 0x0b */ IEMOP_X4(iemOp_ud2), 7904 /* 0x0c */ IEMOP_X4(iemOp_Invalid), 7905 /* 0x0d */ IEMOP_X4(iemOp_nop_Ev_GrpP), 7906 /* 0x0e */ IEMOP_X4(iemOp_femms), 7907 /* 0x0f */ IEMOP_X4(iemOp_3Dnow), 7908 7909 /* 0x10 */ iemOp_movups_Vps_Wps, iemOp_movupd_Vpd_Wpd, iemOp_movss_Vss_Hx_Wss, iemOp_movsd_Vsd_Hx_Wsd, 7910 /* 0x11 */ iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd, iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd, iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd, iemOp_movups_Wps_Vps__movupd_Wpd_Vpd__movss_Wss_Vss__movsd_Vsd_Wsd, 7911 /* 0x12 */ iemOp_vmovlps_Vq_Hq_Mq__vmovhlps, iemOp_vmovlpd_Vq_Hq_Mq, iemOp_vmovsldup_Vx_Wx, iemOp_vmovddup_Vx_Wx, 7912 /* 0x13 */ iemOp_movlps_Mq_Vq__movlpd_Mq_Vq, iemOp_movlps_Mq_Vq__movlpd_Mq_Vq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7913 /* 0x14 */ iemOp_vunpcklps_Vx_Hx_Wx, iemOp_vunpcklpd_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7914 /* 0x15 */ iemOp_vunpckhps_Vx_Hx_Wx, iemOp_vunpckhpd_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7915 /* 0x16 */ iemOp_vmovhpsv1_Vdq_Hq_Mq__vmovlhps_Vdq_Hq_Uq, iemOp_vmovhpdv1_Vdq_Hq_Mq, iemOp_vmovshdup_Vx_Wx, iemOp_InvalidNeedRM, 7916 /* 0x17 */ iemOp_vmovhpsv1_Mq_Vq, iemOp_vmovhpdv1_Mq_Vq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7917 /* 0x18 */ IEMOP_X4(iemOp_prefetch_Grp16), 7918 /* 0x19 */ IEMOP_X4(iemOp_nop_Ev), 7919 /* 0x1a */ IEMOP_X4(iemOp_nop_Ev), 7920 /* 0x1b */ IEMOP_X4(iemOp_nop_Ev), 7921 /* 0x1c */ IEMOP_X4(iemOp_nop_Ev), 7922 /* 0x1d */ IEMOP_X4(iemOp_nop_Ev), 7923 /* 0x1e */ IEMOP_X4(iemOp_nop_Ev), 7924 /* 0x1f */ IEMOP_X4(iemOp_nop_Ev), 7925 7926 /* 0x20 */ iemOp_mov_Rd_Cd, iemOp_mov_Rd_Cd, iemOp_mov_Rd_Cd, iemOp_mov_Rd_Cd, 7927 /* 0x21 */ iemOp_mov_Rd_Dd, iemOp_mov_Rd_Dd, iemOp_mov_Rd_Dd, iemOp_mov_Rd_Dd, 7928 /* 0x22 */ iemOp_mov_Cd_Rd, iemOp_mov_Cd_Rd, iemOp_mov_Cd_Rd, iemOp_mov_Cd_Rd, 7929 /* 0x23 */ iemOp_mov_Dd_Rd, iemOp_mov_Dd_Rd, iemOp_mov_Dd_Rd, iemOp_mov_Dd_Rd, 7930 /* 0x24 */ iemOp_mov_Rd_Td, iemOp_mov_Rd_Td, iemOp_mov_Rd_Td, iemOp_mov_Rd_Td, 7931 /* 0x25 */ iemOp_Invalid, iemOp_Invalid, iemOp_Invalid, iemOp_Invalid, 7932 /* 0x26 */ iemOp_mov_Td_Rd, iemOp_mov_Td_Rd, iemOp_mov_Td_Rd, iemOp_mov_Td_Rd, 7933 /* 0x27 */ iemOp_Invalid, iemOp_Invalid, iemOp_Invalid, iemOp_Invalid, 7934 /* 0x28 */ iemOp_movaps_Vps_Wps__movapd_Vpd_Wpd, iemOp_movaps_Vps_Wps__movapd_Vpd_Wpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7935 /* 0x29 */ iemOp_movaps_Wps_Vps__movapd_Wpd_Vpd, iemOp_movaps_Wps_Vps__movapd_Wpd_Vpd, iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_InvalidNeedRM, 7936 /* 0x2a */ iemOp_cvtpi2ps_Vps_Qpi, iemOp_cvtpi2pd_Vpd_Qpi, iemOp_vcvtsi2ss_Vss_Hss_Ey, iemOp_vcvtsi2sd_Vsd_Hsd_Ey, 7937 /* 0x2b */ iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7938 /* 0x2c */ iemOp_cvttps2pi_Ppi_Wps, iemOp_cvttpd2pi_Ppi_Wpd, iemOp_vcvttss2si_Gy_Wss, iemOp_vcvttsd2si_Gy_Wsd, 7939 /* 0x2d */ iemOp_cvtps2pi_Ppi_Wps, iemOp_cvtpd2pi_Qpi_Wpd, iemOp_vcvtss2si_Gy_Wss, iemOp_vcvtsd2si_Gy_Wsd, 7940 /* 0x2e */ iemOp_vucomiss_Vss_Wss, iemOp_vucomisd_Vsd_Wsd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7941 /* 0x2f */ iemOp_vcomiss_Vss_Wss, iemOp_vcomisd_Vsd_Wsd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7942 7943 /* 0x30 */ IEMOP_X4(iemOp_wrmsr), 7944 /* 0x31 */ IEMOP_X4(iemOp_rdtsc), 7945 /* 0x32 */ IEMOP_X4(iemOp_rdmsr), 7946 /* 0x33 */ IEMOP_X4(iemOp_rdpmc), 7947 /* 0x34 */ IEMOP_X4(iemOp_sysenter), 7948 /* 0x35 */ IEMOP_X4(iemOp_sysexit), 7949 /* 0x36 */ IEMOP_X4(iemOp_Invalid), 7950 /* 0x37 */ IEMOP_X4(iemOp_getsec), 7951 /* 0x38 */ IEMOP_X4(iemOp_3byte_Esc_A4), 7952 /* 0x39 */ IEMOP_X4(iemOp_InvalidNeed3ByteEscRM), 7953 /* 0x3a */ IEMOP_X4(iemOp_3byte_Esc_A5), 7954 /* 0x3b */ IEMOP_X4(iemOp_InvalidNeed3ByteEscRMImm8), 7955 /* 0x3c */ IEMOP_X4(iemOp_InvalidNeed3ByteEscRM), 7956 /* 0x3d */ IEMOP_X4(iemOp_InvalidNeed3ByteEscRM), 7957 /* 0x3e */ IEMOP_X4(iemOp_InvalidNeed3ByteEscRMImm8), 7958 /* 0x3f */ IEMOP_X4(iemOp_InvalidNeed3ByteEscRMImm8), 7959 7960 /* 0x40 */ IEMOP_X4(iemOp_cmovo_Gv_Ev), 7961 /* 0x41 */ IEMOP_X4(iemOp_cmovno_Gv_Ev), 7962 /* 0x42 */ IEMOP_X4(iemOp_cmovc_Gv_Ev), 7963 /* 0x43 */ IEMOP_X4(iemOp_cmovnc_Gv_Ev), 7964 /* 0x44 */ IEMOP_X4(iemOp_cmove_Gv_Ev), 7965 /* 0x45 */ IEMOP_X4(iemOp_cmovne_Gv_Ev), 7966 /* 0x46 */ IEMOP_X4(iemOp_cmovbe_Gv_Ev), 7967 /* 0x47 */ IEMOP_X4(iemOp_cmovnbe_Gv_Ev), 7968 /* 0x48 */ IEMOP_X4(iemOp_cmovs_Gv_Ev), 7969 /* 0x49 */ IEMOP_X4(iemOp_cmovns_Gv_Ev), 7970 /* 0x4a */ IEMOP_X4(iemOp_cmovp_Gv_Ev), 7971 /* 0x4b */ IEMOP_X4(iemOp_cmovnp_Gv_Ev), 7972 /* 0x4c */ IEMOP_X4(iemOp_cmovl_Gv_Ev), 7973 /* 0x4d */ IEMOP_X4(iemOp_cmovnl_Gv_Ev), 7974 /* 0x4e */ IEMOP_X4(iemOp_cmovle_Gv_Ev), 7975 /* 0x4f */ IEMOP_X4(iemOp_cmovnle_Gv_Ev), 7976 7977 /* 0x50 */ iemOp_vmovmskps_Gy_Ups, iemOp_vmovmskpd_Gy_Upd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7978 /* 0x51 */ iemOp_vsqrtps_Vps_Wps, iemOp_vsqrtpd_Vpd_Wpd, iemOp_vsqrtss_Vss_Hss_Wss, iemOp_vsqrtsd_Vsd_Hsd_Wsd, 7979 /* 0x52 */ iemOp_vrsqrtps_Vps_Wps, iemOp_InvalidNeedRM, iemOp_vrsqrtss_Vss_Hss_Wss, iemOp_InvalidNeedRM, 7980 /* 0x53 */ iemOp_vrcpps_Vps_Wps, iemOp_InvalidNeedRM, iemOp_vrcpss_Vss_Hss_Wss, iemOp_InvalidNeedRM, 7981 /* 0x54 */ iemOp_vandps_Vps_Hps_Wps, iemOp_vandpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7982 /* 0x55 */ iemOp_vandnps_Vps_Hps_Wps, iemOp_vandnpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7983 /* 0x56 */ iemOp_vorps_Vps_Hps_Wps, iemOp_vorpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7984 /* 0x57 */ iemOp_vxorps_Vps_Hps_Wps, iemOp_vxorpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7985 /* 0x58 */ iemOp_vaddps_Vps_Hps_Wps, iemOp_vaddpd_Vpd_Hpd_Wpd, iemOp_vaddss_Vss_Hss_Wss, iemOp_vaddsd_Vsd_Hsd_Wsd, 7986 /* 0x59 */ iemOp_vmulps_Vps_Hps_Wps, iemOp_vmulpd_Vpd_Hpd_Wpd, iemOp_vmulss_Vss_Hss_Wss, iemOp_vmulsd_Vsd_Hsd_Wsd, 7987 /* 0x5a */ iemOp_vcvtps2pd_Vpd_Wps, iemOp_vcvtpd2ps_Vps_Wpd, iemOp_vcvtss2sd_Vsd_Hx_Wss, iemOp_vcvtsd2ss_Vss_Hx_Wsd, 7988 /* 0x5b */ iemOp_vcvtdq2ps_Vps_Wdq, iemOp_vcvtps2dq_Vdq_Wps, iemOp_vcvttps2dq_Vdq_Wps, iemOp_InvalidNeedRM, 7989 /* 0x5c */ iemOp_vsubps_Vps_Hps_Wps, iemOp_vsubpd_Vpd_Hpd_Wpd, iemOp_vsubss_Vss_Hss_Wss, iemOp_vsubsd_Vsd_Hsd_Wsd, 7990 /* 0x5d */ iemOp_vminps_Vps_Hps_Wps, iemOp_vminpd_Vpd_Hpd_Wpd, iemOp_vminss_Vss_Hss_Wss, iemOp_vminsd_Vsd_Hsd_Wsd, 7991 /* 0x5e */ iemOp_vdivps_Vps_Hps_Wps, iemOp_vdivpd_Vpd_Hpd_Wpd, iemOp_vdivss_Vss_Hss_Wss, iemOp_vdivsd_Vsd_Hsd_Wsd, 7992 /* 0x5f */ iemOp_vmaxps_Vps_Hps_Wps, iemOp_vmaxpd_Vpd_Hpd_Wpd, iemOp_vmaxss_Vss_Hss_Wss, iemOp_vmaxsd_Vsd_Hsd_Wsd, 7993 7994 /* 0x60 */ IEMOP_X4(iemOp_punpcklbw_Pq_Qd__punpcklbw_Vdq_Wdq), 7995 /* 0x61 */ IEMOP_X4(iemOp_punpcklwd_Pq_Qd__punpcklwd_Vdq_Wdq), 7996 /* 0x62 */ IEMOP_X4(iemOp_punpckldq_Pq_Qd__punpckldq_Vdq_Wdq), 7997 /* 0x63 */ iemOp_packsswb_Pq_Qq, iemOp_vpacksswb_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7998 /* 0x64 */ iemOp_pcmpgtb_Pq_Qq, iemOp_vpcmpgtb_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7999 /* 0x65 */ iemOp_pcmpgtw_Pq_Qq, iemOp_vpcmpgtw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8000 /* 0x66 */ iemOp_pcmpgtd_Pq_Qq, iemOp_vpcmpgtd_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8001 /* 0x67 */ iemOp_packuswb_Pq_Qq, iemOp_vpackuswb_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8002 /* 0x68 */ IEMOP_X4(iemOp_punpckhbw_Pq_Qq__punpckhbw_Vdq_Wdq), 8003 /* 0x69 */ IEMOP_X4(iemOp_punpckhwd_Pq_Qd__punpckhwd_Vdq_Wdq), 8004 /* 0x6a */ IEMOP_X4(iemOp_punpckhdq_Pq_Qd__punpckhdq_Vdq_Wdq), 8005 /* 0x6b */ IEMOP_X4(iemOp_packssdw_Pq_Qd__packssdq_Vdq_Wdq), 8006 /* 0x6c */ IEMOP_X4(iemOp_punpcklqdq_Vdq_Wdq), 8007 /* 0x6d */ IEMOP_X4(iemOp_punpckhqdq_Vdq_Wdq), 8008 /* 0x6e */ IEMOP_X4(iemOp_movd_q_Pd_Ey__movd_q_Vy_Ey), 8009 /* 0x6f */ IEMOP_X4(iemOp_movq_Pq_Qq__movdqa_Vdq_Wdq__movdqu_Vdq_Wdq), 8010 8011 /* 0x70 */ IEMOP_X4(iemOp_pshufw_Pq_Qq_Ib__pshufd_Vdq_Wdq_Ib__pshufhw_Vdq_Wdq_Ib__pshuflq_Vdq_Wdq_Ib), 8012 /* 0x71 */ IEMOP_X4(iemOp_Grp12), 8013 /* 0x72 */ IEMOP_X4(iemOp_Grp13), 8014 /* 0x73 */ IEMOP_X4(iemOp_Grp14), 8015 /* 0x74 */ iemOp_pcmpeqb_Pq_Qq__pcmpeqb_Vdq_Wdq, iemOp_pcmpeqb_Pq_Qq__pcmpeqb_Vdq_Wdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8016 /* 0x75 */ iemOp_pcmpeqw_Pq_Qq__pcmpeqw_Vdq_Wdq, iemOp_pcmpeqw_Pq_Qq__pcmpeqw_Vdq_Wdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8017 /* 0x76 */ iemOp_pcmped_Pq_Qq__pcmpeqd_Vdq_Wdq, iemOp_pcmped_Pq_Qq__pcmpeqd_Vdq_Wdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8018 /* 0x77 */ iemOp_emms__vzeroupperv__vzeroallv, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8019 8020 /* 0x78 */ iemOp_vmread_Ey_Gy, iemOp_AmdGrp17, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8021 /* 0x79 */ iemOp_vmwrite_Gy_Ey, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8022 /* 0x7a */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8023 /* 0x7b */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8024 /* 0x7c */ iemOp_InvalidNeedRM, iemOp_vhaddpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_vhaddps_Vps_Hps_Wps, 8025 /* 0x7d */ iemOp_InvalidNeedRM, iemOp_vhsubpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_vhsubps_Vps_Hps_Wps, 8026 /* 0x7e */ IEMOP_X4(iemOp_movd_q_Ey_Pd__movd_q_Ey_Vy__movq_Vq_Wq), 8027 /* 0x7f */ IEMOP_X4(iemOp_movq_Qq_Pq__movq_movdqa_Wdq_Vdq__movdqu_Wdq_Vdq), 8028 8029 /* 0x80 */ IEMOP_X4(iemOp_jo_Jv), 8030 /* 0x81 */ IEMOP_X4(iemOp_jno_Jv), 8031 /* 0x82 */ IEMOP_X4(iemOp_jc_Jv), 8032 /* 0x83 */ IEMOP_X4(iemOp_jnc_Jv), 8033 /* 0x84 */ IEMOP_X4(iemOp_je_Jv), 8034 /* 0x85 */ IEMOP_X4(iemOp_jne_Jv), 8035 /* 0x86 */ IEMOP_X4(iemOp_jbe_Jv), 8036 /* 0x87 */ IEMOP_X4(iemOp_jnbe_Jv), 8037 /* 0x88 */ IEMOP_X4(iemOp_js_Jv), 8038 /* 0x89 */ IEMOP_X4(iemOp_jns_Jv), 8039 /* 0x8a */ IEMOP_X4(iemOp_jp_Jv), 8040 /* 0x8b */ IEMOP_X4(iemOp_jnp_Jv), 8041 /* 0x8c */ IEMOP_X4(iemOp_jl_Jv), 8042 /* 0x8d */ IEMOP_X4(iemOp_jnl_Jv), 8043 /* 0x8e */ IEMOP_X4(iemOp_jle_Jv), 8044 /* 0x8f */ IEMOP_X4(iemOp_jnle_Jv), 8045 8046 /* 0x90 */ IEMOP_X4(iemOp_seto_Eb), 8047 /* 0x91 */ IEMOP_X4(iemOp_setno_Eb), 8048 /* 0x92 */ IEMOP_X4(iemOp_setc_Eb), 8049 /* 0x93 */ IEMOP_X4(iemOp_setnc_Eb), 8050 /* 0x94 */ IEMOP_X4(iemOp_sete_Eb), 8051 /* 0x95 */ IEMOP_X4(iemOp_setne_Eb), 8052 /* 0x96 */ IEMOP_X4(iemOp_setbe_Eb), 8053 /* 0x97 */ IEMOP_X4(iemOp_setnbe_Eb), 8054 /* 0x98 */ IEMOP_X4(iemOp_sets_Eb), 8055 /* 0x99 */ IEMOP_X4(iemOp_setns_Eb), 8056 /* 0x9a */ IEMOP_X4(iemOp_setp_Eb), 8057 /* 0x9b */ IEMOP_X4(iemOp_setnp_Eb), 8058 /* 0x9c */ IEMOP_X4(iemOp_setl_Eb), 8059 /* 0x9d */ IEMOP_X4(iemOp_setnl_Eb), 8060 /* 0x9e */ IEMOP_X4(iemOp_setle_Eb), 8061 /* 0x9f */ IEMOP_X4(iemOp_setnle_Eb), 8062 8063 /* 0xa0 */ IEMOP_X4(iemOp_push_fs), 8064 /* 0xa1 */ IEMOP_X4(iemOp_pop_fs), 8065 /* 0xa2 */ IEMOP_X4(iemOp_cpuid), 8066 /* 0xa3 */ IEMOP_X4(iemOp_bt_Ev_Gv), 8067 /* 0xa4 */ IEMOP_X4(iemOp_shld_Ev_Gv_Ib), 8068 /* 0xa5 */ IEMOP_X4(iemOp_shld_Ev_Gv_CL), 8069 /* 0xa6 */ IEMOP_X4(iemOp_InvalidNeedRM), 8070 /* 0xa7 */ IEMOP_X4(iemOp_InvalidNeedRM), 8071 /* 0xa8 */ IEMOP_X4(iemOp_push_gs), 8072 /* 0xa9 */ IEMOP_X4(iemOp_pop_gs), 8073 /* 0xaa */ IEMOP_X4(iemOp_rsm), 8074 /* 0xab */ IEMOP_X4(iemOp_bts_Ev_Gv), 8075 /* 0xac */ IEMOP_X4(iemOp_shrd_Ev_Gv_Ib), 8076 /* 0xad */ IEMOP_X4(iemOp_shrd_Ev_Gv_CL), 8077 /* 0xae */ IEMOP_X4(iemOp_Grp15), 8078 /* 0xaf */ IEMOP_X4(iemOp_imul_Gv_Ev), 8079 8080 /* 0xb0 */ IEMOP_X4(iemOp_cmpxchg_Eb_Gb), 8081 /* 0xb1 */ IEMOP_X4(iemOp_cmpxchg_Ev_Gv), 8082 /* 0xb2 */ IEMOP_X4(iemOp_lss_Gv_Mp), 8083 /* 0xb3 */ IEMOP_X4(iemOp_btr_Ev_Gv), 8084 /* 0xb4 */ IEMOP_X4(iemOp_lfs_Gv_Mp), 8085 /* 0xb5 */ IEMOP_X4(iemOp_lgs_Gv_Mp), 8086 /* 0xb6 */ IEMOP_X4(iemOp_movzx_Gv_Eb), 8087 /* 0xb7 */ IEMOP_X4(iemOp_movzx_Gv_Ew), 8088 /* 0xb8 */ iemOp_jmpe, iemOp_InvalidNeedRM, iemOp_popcnt_Gv_Ev, iemOp_InvalidNeedRM, 8089 /* 0xb9 */ IEMOP_X4(iemOp_Grp10), 8090 /* 0xba */ IEMOP_X4(iemOp_Grp8), 8091 /* 0xbb */ IEMOP_X4(iemOp_btc_Ev_Gv), // 0xf3? 8092 /* 0xbc */ iemOp_bsf_Gv_Ev, iemOp_bsf_Gv_Ev, iemOp_tzcnt_Gv_Ev, iemOp_bsf_Gv_Ev, 8093 /* 0xbd */ iemOp_bsr_Gv_Ev, iemOp_bsr_Gv_Ev, iemOp_lzcnt_Gv_Ev, iemOp_bsr_Gv_Ev, 8094 /* 0xbe */ IEMOP_X4(iemOp_movsx_Gv_Eb), 8095 /* 0xbf */ IEMOP_X4(iemOp_movsx_Gv_Ew), 8096 8097 /* 0xc0 */ IEMOP_X4(iemOp_xadd_Eb_Gb), 8098 /* 0xc1 */ IEMOP_X4(iemOp_xadd_Ev_Gv), 8099 /* 0xc2 */ iemOp_vcmpps_Vps_Hps_Wps_Ib, iemOp_vcmppd_Vpd_Hpd_Wpd_Ib, iemOp_vcmpss_Vss_Hss_Wss_Ib, iemOp_vcmpsd_Vsd_Hsd_Wsd_Ib, 8100 /* 0xc3 */ iemOp_movnti_My_Gy, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8101 /* 0xc4 */ iemOp_pinsrw_Pq_RyMw_Ib, iemOp_vpinsrw_Vdq_Hdq_RyMw_Ib, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8102 /* 0xc5 */ iemOp_pextrw_Gd_Nq_Ib, iemOp_vpextrw_Gd_Udq_Ib, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8103 /* 0xc6 */ iemOp_vshufps_Vps_Hps_Wps_Ib, iemOp_vshufpd_Vpd_Hpd_Wpd_Ib, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8104 /* 0xc7 */ IEMOP_X4(iemOp_Grp9), 8105 /* 0xc8 */ IEMOP_X4(iemOp_bswap_rAX_r8), 8106 /* 0xc9 */ IEMOP_X4(iemOp_bswap_rCX_r9), 8107 /* 0xca */ IEMOP_X4(iemOp_bswap_rDX_r10), 8108 /* 0xcb */ IEMOP_X4(iemOp_bswap_rBX_r11), 8109 /* 0xcc */ IEMOP_X4(iemOp_bswap_rSP_r12), 8110 /* 0xcd */ IEMOP_X4(iemOp_bswap_rBP_r13), 8111 /* 0xce */ IEMOP_X4(iemOp_bswap_rSI_r14), 8112 /* 0xcf */ IEMOP_X4(iemOp_bswap_rDI_r15), 8113 8114 /* 0xd0 */ iemOp_InvalidNeedRM, iemOp_vaddsubpd_Vpd_Hpd_Wpd, iemOp_InvalidNeedRM, iemOp_vaddsubps_Vps_Hps_Wps, 8115 /* 0xd1 */ iemOp_psrlw_Pq_Qq, iemOp_vpsrlw_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8116 /* 0xd2 */ iemOp_psrld_Pq_Qq, iemOp_vpsrld_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8117 /* 0xd3 */ iemOp_psrlq_Pq_Qq, iemOp_vpsrlq_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8118 /* 0xd4 */ iemOp_paddq_Pq_Qq, iemOp_vpaddq_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8119 /* 0xd5 */ iemOp_pmullw_Pq_Qq, iemOp_vpmullw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8120 /* 0xd6 */ iemOp_InvalidNeedRM, iemOp_vmovq_Wq_Vq, iemOp_movq2dq_Vdq_Nq, iemOp_movdq2q_Pq_Uq, 8121 /* 0xd7 */ IEMOP_X4(iemOp_pmovmskb_Gd_Nq__pmovmskb_Gd_Udq), 8122 /* 0xd8 */ iemOp_psubusb_Pq_Qq, iemOp_vpsubusb_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8123 /* 0xd9 */ iemOp_psubusw_Pq_Qq, iemOp_vpsubusw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8124 /* 0xda */ iemOp_pminub_Pq_Qq, iemOp_vpminub_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8125 /* 0xdb */ iemOp_pand_Pq_Qq, iemOp_vpand_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8126 /* 0xdc */ iemOp_paddusb_Pq_Qq, iemOp_vpaddusb_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8127 /* 0xdd */ iemOp_paddusw_Pq_Qq, iemOp_vpaddusw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8128 /* 0xde */ iemOp_pmaxub_Pq_Qq, iemOp_vpmaxub_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8129 /* 0xdf */ iemOp_pandn_Pq_Qq, iemOp_vpandn_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8130 8131 /* 0xe0 */ iemOp_pavgb_Pq_Qq, iemOp_vpavgb_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8132 /* 0xe1 */ iemOp_psraw_Pq_Qq, iemOp_vpsraw_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8133 /* 0xe2 */ iemOp_psrad_Pq_Qq, iemOp_vpsrad_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8134 /* 0xe3 */ iemOp_pavgw_Pq_Qq, iemOp_vpavgw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8135 /* 0xe4 */ iemOp_pmulhuw_Pq_Qq, iemOp_vpmulhuw_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8136 /* 0xe5 */ iemOp_pmulhw_Pq_Qq, iemOp_vpmulhw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8137 /* 0xe6 */ iemOp_InvalidNeedRM, iemOp_vcvttpd2dq_Vx_Wpd, iemOp_vcvtdq2pd_Vx_Wpd, iemOp_vcvtpd2dq_Vx_Wpd, 8138 /* 0xe7 */ iemOp_movntq_Mq_Pq__movntdq_Mdq_Vdq, iemOp_movntq_Mq_Pq__movntdq_Mdq_Vdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8139 /* 0xe8 */ iemOp_psubsb_Pq_Qq, iemOp_vpsubsb_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8140 /* 0xe9 */ iemOp_psubsw_Pq_Qq, iemOp_vpsubsw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8141 /* 0xea */ iemOp_pminsw_Pq_Qq, iemOp_vpminsw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8142 /* 0xeb */ iemOp_por_Pq_Qq, iemOp_vpor_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8143 /* 0xec */ iemOp_paddsb_Pq_Qq, iemOp_vpaddsb_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8144 /* 0xed */ iemOp_paddsw_Pq_Qq, iemOp_vpaddsw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8145 /* 0xee */ iemOp_pmaxsw_Pq_Qq, iemOp_vpmaxsw_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8146 /* 0xef */ iemOp_pxor_Pq_Qq__pxor_Vdq_Wdq, iemOp_pxor_Pq_Qq__pxor_Vdq_Wdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8147 8148 /* 0xf0 */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_vlddqu_Vx_Mx, 8149 /* 0xf1 */ iemOp_psllw_Pq_Qq, iemOp_vpsllw_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8150 /* 0xf2 */ iemOp_pslld_Pq_Qq, iemOp_vpslld_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8151 /* 0xf3 */ iemOp_psllq_Pq_Qq, iemOp_vpsllq_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8152 /* 0xf4 */ iemOp_pmuludq_Pq_Qq, iemOp_vpmuludq_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8153 /* 0xf5 */ iemOp_pmaddwd_Pq_Qq, iemOp_vpmaddwd_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8154 /* 0xf6 */ iemOp_psadbw_Pq_Qq, iemOp_vpsadbw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8155 /* 0xf7 */ iemOp_maskmovq_Pq_Nq, iemOp_vmaskmovdqu_Vdq_Udq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8156 /* 0xf8 */ iemOp_psubb_Pq_Qq, iemOp_vpsubb_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8157 /* 0xf9 */ iemOp_psubw_Pq_Qq, iemOp_vpsubw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8158 /* 0xfa */ iemOp_psubd_Pq_Qq, iemOp_vpsubd_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8159 /* 0xfb */ iemOp_psubq_Pq_Qq, iemOp_vpsubq_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8160 /* 0xfc */ iemOp_paddb_Pq_Qq, iemOp_vpaddb_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8161 /* 0xfd */ iemOp_paddw_Pq_Qq, iemOp_vpaddw_Vx_Hx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8162 /* 0xfe */ iemOp_paddd_Pq_Qq, iemOp_vpaddd_Vx_Hx_W, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 8163 /* 0xff */ IEMOP_X4(iemOp_ud0), 7599 8164 }; 7600 8165 AssertCompile(RT_ELEMENTS(g_apfnTwoByteMap) == 1024); 7601 8166 /** @} */ 7602 8167 … … 7738 8303 FNIEMOP_DEF(iemOp_2byteEscape) 7739 8304 { 8305 #ifdef VBOX_STRICT 8306 static bool s_fTested = false; 8307 if (RT_LIKELY(s_fTested)) { /* likely */ } 8308 else 8309 { 8310 s_fTested = true; 8311 Assert(g_apfnTwoByteMap[0xbc * 4 + 0] == iemOp_bsf_Gv_Ev); 8312 Assert(g_apfnTwoByteMap[0xbc * 4 + 1] == iemOp_bsf_Gv_Ev); 8313 Assert(g_apfnTwoByteMap[0xbc * 4 + 2] == iemOp_tzcnt_Gv_Ev); 8314 Assert(g_apfnTwoByteMap[0xbc * 4 + 3] == iemOp_bsf_Gv_Ev); 8315 } 8316 #endif 8317 7740 8318 uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b); 8319 7741 8320 /** @todo PUSH CS on 8086, undefined on 80186. */ 7742 8321 IEMOP_HLP_MIN_286(); 7743 return FNIEMOP_CALL(g_apfnTwoByteMap[ b]);8322 return FNIEMOP_CALL(g_apfnTwoByteMap[(uintptr_t)b * 4 + pVCpu->iem.s.idxPrefix]); 7744 8323 } 7745 8324 … … 8991 9570 pVCpu->iem.s.fPrefixes |= IEM_OP_PRF_SIZE_OP; 8992 9571 iemRecalEffOpSize(pVCpu); 9572 9573 /* For the 4 entry opcode tables, the operand prefix doesn't not count 9574 when REPZ or REPNZ are present. */ 9575 if (pVCpu->iem.s.idxPrefix == 0) 9576 pVCpu->iem.s.idxPrefix = 1; 8993 9577 8994 9578 uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b); … … 17075 17659 pVCpu->iem.s.fPrefixes |= IEM_OP_PRF_REPNZ; 17076 17660 17661 /* For the 4 entry opcode tables, REPNZ overrides any previous 17662 REPZ and operand size prefixes. */ 17663 pVCpu->iem.s.idxPrefix = 3; 17664 17077 17665 uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b); 17078 17666 return FNIEMOP_CALL(g_apfnOneByteMap[b]); … … 17087 17675 IEMOP_HLP_CLEAR_REX_NOT_BEFORE_OPCODE("repe"); 17088 17676 pVCpu->iem.s.fPrefixes |= IEM_OP_PRF_REPZ; 17677 17678 /* For the 4 entry opcode tables, REPNZ overrides any previous 17679 REPNZ and operand size prefixes. */ 17680 pVCpu->iem.s.idxPrefix = 2; 17089 17681 17090 17682 uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
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