Changeset 65770 in vbox for trunk/src/VBox
- Timestamp:
- Feb 13, 2017 3:09:30 PM (8 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r65769 r65770 1560 1560 1561 1561 1562 /** Opcode 0x0f 0x2b. */ 1563 FNIEMOP_DEF(iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd) /** @todo split me */ 1564 { 1565 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP)) 1566 IEMOP_MNEMONIC(movntps_mr_r, "movntps Mps,Vps"); 1567 else 1568 IEMOP_MNEMONIC(movntpd_mr_r, "movntpd Mdq,Vpd"); 1562 /** Opcode 0x0f 0x2b - vmovntps Mps, Vps */ 1563 FNIEMOP_DEF(iemOp_vmovntps_Mps_Vps) 1564 { 1565 IEMOP_MNEMONIC(movntps_mr_r, "movntps Mps,Vps"); 1569 1566 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1570 1567 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) … … 1579 1576 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1580 1577 IEMOP_HLP_DONE_DECODING_NO_LOCK_REPZ_OR_REPNZ_PREFIXES(); /** @todo check if this is delayed this long for REPZ/NZ */ 1581 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_OP)) 1582 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1583 else 1584 IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT(); 1578 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1585 1579 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 1586 1580 … … 1596 1590 return VINF_SUCCESS; 1597 1591 } 1592 1593 /** Opcode 0x66 0x0f 0x2b - vmovntpd Mpd, Vpd */ 1594 FNIEMOP_DEF(iemOp_vmovntpd_Mpd_Vpd) 1595 { 1596 IEMOP_MNEMONIC(movntpd_mr_r, "movntpd Mdq,Vpd"); 1597 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1598 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1599 { 1600 /* 1601 * memory, register. 1602 */ 1603 IEM_MC_BEGIN(0, 2); 1604 IEM_MC_LOCAL(uint128_t, uSrc); /** @todo optimize this one day... */ 1605 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 1606 1607 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1608 IEMOP_HLP_DONE_DECODING_NO_LOCK_REPZ_OR_REPNZ_PREFIXES(); /** @todo check if this is delayed this long for REPZ/NZ */ 1609 IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT(); 1610 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 1611 1612 IEM_MC_FETCH_XREG_U128(uSrc, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 1613 IEM_MC_STORE_MEM_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1614 1615 IEM_MC_ADVANCE_RIP(); 1616 IEM_MC_END(); 1617 } 1618 /* The register, register encoding is invalid. */ 1619 else 1620 return IEMOP_RAISE_INVALID_OPCODE(); 1621 return VINF_SUCCESS; 1622 } 1623 /* Opcode 0xf3 0x0f 0x2b - invalid */ 1624 /* Opcode 0xf2 0x0f 0x2b - invalid */ 1598 1625 1599 1626 … … 7665 7692 /* 0x29 */ iemOp_vmovaps_Wps_Vps, iemOp_vmovapd_Wpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7666 7693 /* 0x2a */ iemOp_cvtpi2ps_Vps_Qpi, iemOp_cvtpi2pd_Vpd_Qpi, iemOp_vcvtsi2ss_Vss_Hss_Ey, iemOp_vcvtsi2sd_Vsd_Hsd_Ey, 7667 /* 0x2b */ iemOp_ movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, /** @todo split me */7694 /* 0x2b */ iemOp_vmovntps_Mps_Vps, iemOp_vmovntpd_Mpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7668 7695 /* 0x2c */ iemOp_cvttps2pi_Ppi_Wps, iemOp_cvttpd2pi_Ppi_Wpd, iemOp_vcvttss2si_Gy_Wss, iemOp_vcvttsd2si_Gy_Wsd, 7669 7696 /* 0x2d */ iemOp_cvtps2pi_Ppi_Wps, iemOp_cvtpd2pi_Qpi_Wpd, iemOp_vcvtss2si_Gy_Wss, iemOp_vcvtsd2si_Gy_Wsd, … … 7950 7977 /* 0x29 */ iemOp_vmovaps_Wps_Vps, iemOp_vmovapd_Wpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7951 7978 /* 0x2a */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_vcvtsi2ss_Vss_Hss_Ey, iemOp_vcvtsi2sd_Vsd_Hsd_Ey, 7952 /* 0x2b */ iemOp_ movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_movntps_Mps_Vps__movntpd_Mpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, /** @todo split me */7979 /* 0x2b */ iemOp_vmovntps_Mps_Vps, iemOp_vmovntpd_Mpd_Vpd, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 7953 7980 /* 0x2c */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_vcvttss2si_Gy_Wss, iemOp_vcvttsd2si_Gy_Wsd, 7954 7981 /* 0x2d */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_vcvtss2si_Gy_Wss, iemOp_vcvtsd2si_Gy_Wsd,
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