Index: /trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h	(revision 65777)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h	(revision 65778)
@@ -549,11 +549,11 @@
 
 
-/** Invalid opcode where intel requires Mod R/M sequence. */
-FNIEMOP_DEF(iemOp_InvalidNeedRM)
-{
-    IEMOP_MNEMONIC(InvalidNeedRM, "InvalidNeedRM");
+/** Invalid with RM byte where intel requires 8-byte immediate.
+ * Intel will also need SIB and displacement if bRm indicates memory. */
+FNIEMOPRM_DEF(iemOp_InvalidWithRMNeedImm8)
+{
+    IEMOP_MNEMONIC(InvalidWithRMNeedImm8, "InvalidWithRMNeedImm8");
     if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL)
     {
-        uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm);
 #ifndef TST_IEM_CHECK_MC
         if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
@@ -565,4 +565,5 @@
         }
 #endif
+        uint8_t bImm8;  IEM_OPCODE_GET_NEXT_U8(&bImm8);  RT_NOREF(bRm);
         IEMOP_HLP_DONE_DECODING();
     }
@@ -571,12 +572,11 @@
 
 
-/** Invalid opcode where intel requires Mod R/M sequence and 8-byte
- *  immediate. */
-FNIEMOP_DEF(iemOp_InvalidNeedRMImm8)
-{
-    IEMOP_MNEMONIC(InvalidNeedRMImm8, "InvalidNeedRMImm8");
+/** Invalid opcode where intel requires Mod R/M sequence. */
+FNIEMOP_DEF(iemOp_InvalidNeedRM)
+{
+    IEMOP_MNEMONIC(InvalidNeedRM, "InvalidNeedRM");
     if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL)
     {
-        uint8_t bRm;  IEM_OPCODE_GET_NEXT_U8(&bRm);  RT_NOREF(bRm);
+        uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); RT_NOREF(bRm);
 #ifndef TST_IEM_CHECK_MC
         if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
@@ -588,4 +588,27 @@
         }
 #endif
+        IEMOP_HLP_DONE_DECODING();
+    }
+    return IEMOP_RAISE_INVALID_OPCODE();
+}
+
+
+/** Invalid opcode where intel requires Mod R/M sequence and 8-byte
+ *  immediate. */
+FNIEMOP_DEF(iemOp_InvalidNeedRMImm8)
+{
+    IEMOP_MNEMONIC(InvalidNeedRMImm8, "InvalidNeedRMImm8");
+    if (pVCpu->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL)
+    {
+        uint8_t bRm;  IEM_OPCODE_GET_NEXT_U8(&bRm);  RT_NOREF(bRm);
+#ifndef TST_IEM_CHECK_MC
+        if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
+        {
+            RTGCPTR      GCPtrEff;
+            VBOXSTRICTRC rcStrict = iemOpHlpCalcRmEffAddr(pVCpu, bRm, 0, &GCPtrEff);
+            if (rcStrict != VINF_SUCCESS)
+                return rcStrict;
+        }
+#endif
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); RT_NOREF(bImm);
         IEMOP_HLP_DONE_DECODING();
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h	(revision 65777)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h	(revision 65778)
@@ -2943,12 +2943,12 @@
 {
     /** @todo decode imm8? */
-    /* /0 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /1 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /2 */ iemOp_Grp12_psrlw_Nq_Ib,           iemOp_Grp12_vpsrlw_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /3 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /4 */ iemOp_Grp12_psraw_Nq_Ib,           iemOp_Grp12_vpsraw_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /5 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /6 */ iemOp_Grp12_psllw_Nq_Ib,           iemOp_Grp12_vpsllw_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /7 */ IEMOP_X4(iemOp_InvalidWithRM)
+    /* /0 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /1 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /2 */ iemOp_Grp12_psrlw_Nq_Ib,   iemOp_Grp12_vpsrlw_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /3 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /4 */ iemOp_Grp12_psraw_Nq_Ib,   iemOp_Grp12_vpsraw_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /5 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /6 */ iemOp_Grp12_psllw_Nq_Ib,   iemOp_Grp12_vpsllw_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /7 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8)
 };
 
@@ -2962,6 +2962,5 @@
         return FNIEMOP_CALL_1(g_apfnGroup12RegReg[  ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) * 4
                                                   + pVCpu->iem.s.idxPrefix], bRm);
-    /** @todo decode SIB, disp, Ib? */
-    return IEMOP_RAISE_INVALID_OPCODE();
+    return FNIEMOP_CALL_1(iemOp_InvalidWithRMNeedImm8, bRm);
 }
 
@@ -2992,12 +2991,12 @@
 {
     /** @todo decode imm8? */
-    /* /0 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /1 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /2 */ iemOp_Grp13_psrld_Nq_Ib,           iemOp_Grp13_vpsrld_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /3 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /4 */ iemOp_Grp13_psrad_Nq_Ib,           iemOp_Grp13_vpsrad_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /5 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /6 */ iemOp_Grp13_pslld_Nq_Ib,           iemOp_Grp13_vpslld_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /7 */ IEMOP_X4(iemOp_InvalidWithRM)
+    /* /0 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /1 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /2 */ iemOp_Grp13_psrld_Nq_Ib,   iemOp_Grp13_vpsrld_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /3 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /4 */ iemOp_Grp13_psrad_Nq_Ib,   iemOp_Grp13_vpsrad_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /5 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /6 */ iemOp_Grp13_pslld_Nq_Ib,   iemOp_Grp13_vpslld_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /7 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8)
 };
 
@@ -3010,6 +3009,5 @@
         return FNIEMOP_CALL_1(g_apfnGroup13RegReg[ ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) * 4
                                                   + pVCpu->iem.s.idxPrefix], bRm);
-    /** @todo decode SIB, disp, Ib? */
-    return IEMOP_RAISE_INVALID_OPCODE();
+    return FNIEMOP_CALL_1(iemOp_InvalidWithRMNeedImm8, bRm);
 }
 
@@ -3039,12 +3037,12 @@
 {
     /** @todo decode imm8? */
-    /* /0 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /1 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /2 */ iemOp_Grp14_psrlq_Nq_Ib,           iemOp_Grp14_vpsrlq_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /3 */ iemOp_InvalidWithRM,               iemOp_Grp14_vpsrldq_Hx_Ux_Ib,   iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /4 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /5 */ IEMOP_X4(iemOp_InvalidWithRM),
-    /* /6 */ iemOp_Grp14_psllq_Nq_Ib,           iemOp_Grp14_vpsllq_Hx_Ux_Ib,    iemOp_InvalidWithRM, iemOp_InvalidWithRM,
-    /* /7 */ iemOp_InvalidWithRM,               iemOp_Grp14_vpslldq_Hx_Ux_Ib,   iemOp_InvalidWithRM, iemOp_InvalidWithRM,
+    /* /0 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /1 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /2 */ iemOp_Grp14_psrlq_Nq_Ib,     iemOp_Grp14_vpsrlq_Hx_Ux_Ib,  iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /3 */ iemOp_InvalidWithRMNeedImm8, iemOp_Grp14_vpsrldq_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /4 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /5 */ IEMOP_X4(iemOp_InvalidWithRMNeedImm8),
+    /* /6 */ iemOp_Grp14_psllq_Nq_Ib,     iemOp_Grp14_vpsllq_Hx_Ux_Ib,  iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
+    /* /7 */ iemOp_InvalidWithRMNeedImm8, iemOp_Grp14_vpslldq_Hx_Ux_Ib, iemOp_InvalidWithRMNeedImm8, iemOp_InvalidWithRMNeedImm8,
 };
 
@@ -3058,6 +3056,5 @@
         return FNIEMOP_CALL_1(g_apfnGroup14RegReg[ ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) * 4
                                                   + pVCpu->iem.s.idxPrefix], bRm);
-    /** @todo decode SIB, disp, Ib? */
-    return IEMOP_RAISE_INVALID_OPCODE();
+    return FNIEMOP_CALL_1(iemOp_InvalidWithRMNeedImm8, bRm);
 }
 
