Changeset 65850 in vbox for trunk/src/VBox/Devices/PC
- Timestamp:
- Feb 23, 2017 10:16:04 AM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 113619
- Location:
- trunk/src/VBox/Devices/PC
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevACPI.cpp
r65843 r65850 1337 1337 *pu32 = pThis->u64PciPref64Max >> 16; /* 64KB units */ 1338 1338 Assert(((uint64_t)*pu32 << 16) == pThis->u64PciPref64Max); 1339 LogRel(("MAX\n"));1340 1339 break; 1341 1340 … … 3128 3127 cbXsdt += cAddr*sizeof(uint64_t); /* each entry: 64 bits phys. address. */ 3129 3128 3130 rc = CFGMR3QueryU64(pThis->pDevInsR3->pCfg, "RamSize", &pThis->u64RamSize);3131 if (RT_FAILURE(rc))3132 return PDMDEV_SET_ERROR(pThis->pDevInsR3, rc,3133 N_("Configuration error: Querying \"RamSize\" as integer failed"));3134 3135 uint32_t cbRamHole;3136 rc = CFGMR3QueryU32Def(pThis->pDevInsR3->pCfg, "RamHoleSize", &cbRamHole, MM_RAM_HOLE_SIZE_DEFAULT);3137 if (RT_FAILURE(rc))3138 return PDMDEV_SET_ERROR(pThis->pDevInsR3, rc,3139 N_("Configuration error: Querying \"RamHoleSize\" as integer failed"));3140 3141 3129 /* 3142 3130 * Calculate the sizes for the low region and for the 64-bit prefetchable memory. 3143 * The latter starts never below 4G and is 1G-aligned.3131 * The latter starts never below 4G. 3144 3132 */ 3145 const uint64_t offRamHole = _4G - cbRamHole; 3133 PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3); 3134 uint32_t cbBelow4GB = MMR3PhysGetRamSizeBelow4GB(pVM); 3135 uint64_t const cbAbove4GB = MMR3PhysGetRamSizeAbove4GB(pVM); 3136 3137 pThis->u64RamSize = MMR3PhysGetRamSize(pVM); 3146 3138 if (pThis->fPciPref64Enabled) 3147 3139 { 3148 /* Activate MEM4 */ 3149 if (pThis->u64RamSize > offRamHole) 3150 pThis->u64PciPref64Min = RT_ALIGN_64(pThis->u64RamSize + cbRamHole, _1M); 3151 else 3152 pThis->u64PciPref64Min = _4G; 3153 } 3154 uint64_t cbRamLow = pThis->u64RamSize > offRamHole ? offRamHole : pThis->u64RamSize; 3155 if (cbRamLow > UINT32_C(0xffe00000)) /* See MEM3. */ 3140 /* Activate MEM4. See also DevPciIch9.cpp / ich9pciFakePCIBIOS() / uPciBiosMmio64 */ 3141 pThis->u64PciPref64Min = _4G + cbAbove4GB; 3142 LogRel(("ACPI: enabling 64-bit prefetch root bus resource %#018RX64..%#018RX64\n", 3143 pThis->u64PciPref64Min, pThis->u64PciPref64Max-1)); 3144 } 3145 if (cbBelow4GB > UINT32_C(0xffe00000)) /* See MEM3. */ 3156 3146 { 3157 3147 /* Note: This is also enforced by DevPcBios.cpp. */ 3158 LogRel(("ACPI: Clipping cbRamLow=%#RX64 down to 0xffe00000.\n", cb RamLow));3159 cb RamLow= UINT32_C(0xffe00000);3160 } 3161 pThis->cbRamLow = (uint32_t)cbRamLow;3148 LogRel(("ACPI: Clipping cbRamLow=%#RX64 down to 0xffe00000.\n", cbBelow4GB)); 3149 cbBelow4GB = UINT32_C(0xffe00000); 3150 } 3151 pThis->cbRamLow = cbBelow4GB; 3162 3152 3163 3153 GCPhysCur = 0; … … 3567 3557 */ 3568 3558 if (!CFGMR3AreValuesValid(pCfg, 3569 "RamSize\0"3570 "RamHoleSize\0"3571 3559 "IOAPIC\0" 3572 3560 "NumCPUs\0" … … 3578 3566 "McfgLength\0" 3579 3567 "PciPref64Enabled\0" 3580 "PciPref64Limit \0"3568 "PciPref64LimitGB\0" 3581 3569 "SmcEnabled\0" 3582 3570 "FdcEnabled\0" … … 3653 3641 3654 3642 /* query the limit of the the 64-bit prefetchable memory window */ 3655 rc = CFGMR3QueryU64Def(pCfg, "PciPref64Limit", &pThis->u64PciPref64Max, _1G64*64); 3643 uint64_t u64PciPref64MaxGB; 3644 rc = CFGMR3QueryU64Def(pCfg, "PciPref64LimitGB", &u64PciPref64MaxGB, 64); 3656 3645 if (RT_FAILURE(rc)) 3657 3646 return PDMDEV_SET_ERROR(pDevIns, rc, 3658 N_("Configuration error: Failed to read \"PciPref64Limit\"")); 3647 N_("Configuration error: Failed to read \"PciPref64LimitGB\"")); 3648 pThis->u64PciPref64Max = _1G64 * u64PciPref64MaxGB; 3659 3649 3660 3650 /* query whether we are supposed to present custom table */ -
trunk/src/VBox/Devices/PC/DevFwCommon.cpp
r64369 r65850 820 820 * DMI Physical Memory Array (Type 16) * 821 821 ***************************************/ 822 uint64_t u64RamSize; 823 rc = CFGMR3QueryU64(pCfg, "RamSize", &u64RamSize); 824 if (RT_FAILURE (rc)) 825 return PDMDEV_SET_ERROR(pDevIns, rc, 826 N_("Configuration error: Failed to read \"RamSize\"")); 822 uint64_t const cbRamSize = MMR3PhysGetRamSize(PDMDevHlpGetVM(pDevIns)); 827 823 828 824 PDMIRAMARRAY pMemArray = (PDMIRAMARRAY)pszStr; … … 838 834 pMemArray->u8Use = 0x03; /* System memory */ 839 835 pMemArray->u8MemErrorCorrection = 0x01; /* Other */ 840 pMemArray->u32MaxCapacity = (uint32_t)(u64RamSize / _1K); /* RAM size in K */ 836 if (cbRamSize / _1K > INT32_MAX) 837 { 838 /** @todo 2TB-1K limit. In such cases we probably need to provide multiple type-16 descriptors. 839 * Or use 0x8000'0000 = 'capacity unknown'? */ 840 AssertLogRelMsgFailed(("DMI: RAM size %#RX64 does not fit into type-16 descriptor, clipping to %#RX64\n", 841 cbRamSize, (uint64_t)INT32_MAX * _1K)); 842 pMemArray->u32MaxCapacity = INT32_MAX; 843 } 844 else 845 pMemArray->u32MaxCapacity = (int32_t)(cbRamSize / _1K); /* RAM size in K */ 841 846 pMemArray->u16MemErrorHandle = 0xfffe; /* No error info structure */ 842 847 pMemArray->u16NumberOfMemDevices = 1; … … 859 864 pMemDev->u16TotalWidth = 0xffff; /* Unknown */ 860 865 pMemDev->u16DataWidth = 0xffff; /* Unknown */ 861 int16_t u16RamSizeM = (uint16_t)(u64RamSize / _1M); 866 int16_t u16RamSizeM; 867 if (cbRamSize / _1M > INT16_MAX) 868 { 869 /** @todo 32G-1M limit. Provide multiple type-17 descriptors. 870 * The highest bit of u16Size must be 0 to specify 'GB' units / 1 would be 'KB' */ 871 AssertLogRelMsgFailed(("DMI: RAM size %#RX64 too big for one type-17 descriptor, clipping to %#RX64\n", 872 cbRamSize, (uint64_t)INT16_MAX * _1M)); 873 u16RamSizeM = INT16_MAX; 874 } 875 else 876 u16RamSizeM = (uint16_t)(cbRamSize / _1M); 862 877 if (u16RamSizeM == 0) 863 878 u16RamSizeM = 0x400; /* 1G */ -
trunk/src/VBox/Devices/PC/DevPcBios.cpp
r65711 r65850 155 155 /** Boot devices (ordered). */ 156 156 DEVPCBIOSBOOT aenmBootDevice[4]; 157 /** RAM size (in bytes). */158 uint64_t cbRam;159 /** RAM hole size (in bytes). */160 uint32_t cbRamHole;161 157 /** Bochs shutdown index. */ 162 158 uint32_t iShutdown; … … 621 617 LogFlow(("pcbiosInitComplete:\n")); 622 618 619 PVM pVM = PDMDevHlpGetVM(pDevIns); 620 uint64_t const cbRamSize = MMR3PhysGetRamSize(pVM); 621 uint32_t const cbBelow4GB = MMR3PhysGetRamSizeBelow4GB(pVM); 622 uint64_t const cbAbove4GB = MMR3PhysGetRamSizeAbove4GB(pVM); 623 623 624 /* 624 625 * Memory sizes. 625 626 */ 626 627 /* base memory. */ 627 u32 = pThis->cbRam > 640 ? 640 : (uint32_t)pThis->cbRam/ _1K; /* <-- this test is wrong, but it doesn't matter since we never assign less than 1MB */628 pcbiosCmosWrite(pDevIns, 0x15, u32 & 0xff); 629 pcbiosCmosWrite(pDevIns, 0x16, u32 >> 8); 628 u32 = cbRamSize > 640 ? 640 : (uint32_t)cbRamSize / _1K; /* <-- this test is wrong, but it doesn't matter since we never assign less than 1MB */ 629 pcbiosCmosWrite(pDevIns, 0x15, u32 & 0xff); /* 15h - Base Memory in K, Low Byte */ 630 pcbiosCmosWrite(pDevIns, 0x16, u32 >> 8); /* 16h - Base Memory in K, High Byte */ 630 631 631 632 /* Extended memory, up to 65MB */ 632 u32 = pThis->cbRam >= 65 * _1M ? 0xffff : ((uint32_t)pThis->cbRam- _1M) / _1K;633 pcbiosCmosWrite(pDevIns, 0x17, u32 & 0xff); 634 pcbiosCmosWrite(pDevIns, 0x18, u32 >> 8); 635 pcbiosCmosWrite(pDevIns, 0x30, u32 & 0xff); 636 pcbiosCmosWrite(pDevIns, 0x31, u32 >> 8); 633 u32 = cbRamSize >= 65 * _1M ? 0xffff : ((uint32_t)cbRamSize - _1M) / _1K; 634 pcbiosCmosWrite(pDevIns, 0x17, u32 & 0xff); /* 17h - Extended Memory in K, Low Byte */ 635 pcbiosCmosWrite(pDevIns, 0x18, u32 >> 8); /* 18h - Extended Memory in K, High Byte */ 636 pcbiosCmosWrite(pDevIns, 0x30, u32 & 0xff); /* 30h - Extended Memory in K, Low Byte */ 637 pcbiosCmosWrite(pDevIns, 0x31, u32 >> 8); /* 31h - Extended Memory in K, High Byte */ 637 638 638 639 /* Bochs BIOS specific? Anyway, it's the amount of memory above 16MB … … 641 642 be adjusted, we still have to chop it at 0xfffc0000 or it'll conflict 642 643 with the high BIOS mapping.) */ 643 uint64_t const offRamHole = _4G - pThis->cbRamHole; 644 if (pThis->cbRam > 16 * _1M) 645 u32 = (uint32_t)( (RT_MIN(RT_MIN(pThis->cbRam, offRamHole), UINT32_C(0xffe00000)) - 16U * _1M) / _64K ); 644 if (cbRamSize > 16 * _1M) 645 u32 = (RT_MIN(cbBelow4GB, UINT32_C(0xffe00000)) - 16U * _1M) / _64K; 646 646 else 647 647 u32 = 0; … … 652 652 Bochs got these in a different location which we've already used for SATA, 653 653 it also lacks the last two. */ 654 uint64_t c64KBAbove4GB; 655 if (pThis->cbRam <= offRamHole) 656 c64KBAbove4GB = 0; 657 else 658 { 659 c64KBAbove4GB = (pThis->cbRam - offRamHole) / _64K; 660 /* Make sure it doesn't hit the limits of the current BIOS code. */ 661 AssertLogRelMsgReturn((c64KBAbove4GB >> (3 * 8)) < 255, ("%#RX64\n", c64KBAbove4GB), VERR_OUT_OF_RANGE); 662 } 654 uint64_t c64KBAbove4GB = cbAbove4GB / _64K; 655 /* Make sure it doesn't hit the limits of the current BIOS code (RAM limit of ~255TB). */ 656 AssertLogRelMsgReturn((c64KBAbove4GB >> (3 * 8)) < 255, ("%#RX64\n", c64KBAbove4GB), VERR_OUT_OF_RANGE); 663 657 pcbiosCmosWrite(pDevIns, 0x61, c64KBAbove4GB & 0xff); 664 658 pcbiosCmosWrite(pDevIns, 0x62, (c64KBAbove4GB >> 8) & 0xff); … … 1097 1091 "BootDevice2\0" 1098 1092 "BootDevice3\0" 1099 "RamSize\0"1100 "RamHoleSize\0"1101 1093 "HardDiskDevice\0" 1102 1094 "SataHardDiskDevice\0" … … 1163 1155 * Init the data. 1164 1156 */ 1165 rc = CFGMR3QueryU64(pCfg, "RamSize", &pThis->cbRam);1166 if (RT_FAILURE(rc))1167 return PDMDEV_SET_ERROR(pDevIns, rc,1168 N_("Configuration error: Querying \"RamSize\" as integer failed"));1169 1170 rc = CFGMR3QueryU32Def(pCfg, "RamHoleSize", &pThis->cbRamHole, MM_RAM_HOLE_SIZE_DEFAULT);1171 if (RT_FAILURE(rc))1172 return PDMDEV_SET_ERROR(pDevIns, rc,1173 N_("Configuration error: Querying \"RamHoleSize\" as integer failed"));1174 1175 1157 rc = CFGMR3QueryU16Def(pCfg, "NumCPUs", &pThis->cCpus, 1); 1176 1158 if (RT_FAILURE(rc))
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