Changeset 66015 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Mar 9, 2017 3:39:05 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 113871
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/HMSVMAll.cpp
r66008 r66015 182 182 * @param pVCpu The cross context virtual CPU structure. 183 183 * @param pCtx Pointer to the guest-CPU context. 184 */ 185 VMM_INT_DECL(VBOXSTRICTRC) HMSvmVmrun(PVMCPU pVCpu, PCPUMCTX pCtx) 186 { 187 RT_NOREF2(pVCpu, pCtx); 184 * @param pVmcb The VMCB of the nested-guest. 185 * @param pHostState The host-state save area in the guest. 186 */ 187 VMM_INT_DECL(VBOXSTRICTRC) HMSvmVmrun(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMVMCB pVmcb, PSVMHOSTSTATE pHostState) 188 { 189 Assert(pHostState); 190 Assert(pVmcb); 191 192 /* 193 * Save host state. 194 */ 195 pHostState->es = pCtx->es; 196 pHostState->cs = pCtx->cs; 197 pHostState->ss = pCtx->ss; 198 pHostState->ds = pCtx->ds; 199 pHostState->gdtr = pCtx->gdtr; 200 pHostState->idtr = pCtx->idtr; 201 pHostState->uEferMsr = pCtx->msrEFER; 202 pHostState->uCr0 = pCtx->cr0; 203 pHostState->uCr3 = pCtx->cr3; 204 pHostState->uCr4 = pCtx->cr4; 205 pHostState->rflags = pCtx->rflags; 206 pHostState->uRip = pCtx->rip; 207 pHostState->uRsp = pCtx->rsp; 208 pHostState->uRax = pCtx->rax; 209 210 /* 211 * Load controls from VMCB. 212 */ 213 pCtx->hwvirt.svm.u16InterceptRdCRx = pVmcb->ctrl.u16InterceptRdCRx; 214 pCtx->hwvirt.svm.u16InterceptWrCRx = pVmcb->ctrl.u16InterceptWrCRx; 215 pCtx->hwvirt.svm.u16InterceptRdDRx = pVmcb->ctrl.u16InterceptRdDRx; 216 pCtx->hwvirt.svm.u16InterceptWrDRx = pVmcb->ctrl.u16InterceptWrDRx; 217 pCtx->hwvirt.svm.u64InterceptCtrl = pVmcb->ctrl.u64InterceptCtrl; 218 pCtx->hwvirt.svm.u32InterceptXcpt = pVmcb->ctrl.u32InterceptXcpt; 219 if (!(pVmcb->ctrl.u64InterceptCtrl & SVM_CTRL_INTERCEPT_VMRUN)) 220 { 221 Log(("HMSvmVmRun: VMRUN instruction not intercepted -> #VMEXIT\n")); 222 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_INVALID, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 223 } 224 if (!pVmcb->ctrl.TLBCtrl.n.u32ASID) 225 { 226 Log(("HMSvmVmRun: Guest ASID is invalid -> #VMEXIT\n")); 227 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_INVALID, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 228 } 229 230 231 /** @todo the rest. */ 188 232 189 233 return VERR_NOT_IMPLEMENTED; … … 197 241 * @param pVCpu The cross context virtual CPU structure. 198 242 * @param pCtx The guest-CPU context. 199 * @param iExitCode The exit reason.243 * @param uExitCode The exit code. 200 244 * @param uExitInfo1 The exit info. 1 field. 201 245 * @param uExitInfo2 The exit info. 2 field. 202 246 */ 203 VMM_INT_DECL(VBOXSTRICTRC) HMSvmNstGstVmExit(PVMCPU pVCpu, PCPUMCTX pCtx, int64_t iExitCode, uint64_t uExitInfo1,247 VMM_INT_DECL(VBOXSTRICTRC) HMSvmNstGstVmExit(PVMCPU pVCpu, PCPUMCTX pCtx, uint64_t uExitCode, uint64_t uExitInfo1, 204 248 uint64_t uExitInfo2) 205 249 { 206 250 if ( CPUMIsGuestInNestedHwVirtMode(pCtx) 207 || iExitCode == SVM_EXIT_INVALID)251 || uExitCode == SVM_EXIT_INVALID) 208 252 { 209 253 RT_NOREF(pVCpu); … … 211 255 pCtx->hwvirt.svm.fGif = 0; 212 256 213 /** @todo implement VMEXIT. */257 /** @todo implement \#VMEXIT. */ 214 258 215 259 return VINF_SUCCESS; … … 217 261 else 218 262 { 219 Log(("HMNstGstSvmVmExit: Not in SVM guest mode! uExitCode=% RI64 uExitInfo1=%RU64 uExitInfo2=%RU64\n", iExitCode,263 Log(("HMNstGstSvmVmExit: Not in SVM guest mode! uExitCode=%#RX64 uExitInfo1=%#RX64 uExitInfo2=%#RX64\n", uExitCode, 220 264 uExitInfo1, uExitInfo2)); 221 265 RT_NOREF2(uExitInfo1, uExitInfo2); … … 225 269 } 226 270 227 228 /**229 * Peforms the functions of a VMRUN instruction.230 *231 * @returns Strict VBox status code.232 * @param pVCpu The cross context virtual CPU structure.233 * @param pCtx The guest-CPU context.234 */235 VMM_INT_DECL(VBOXSTRICTRC) HMSvmVmRun(PVMCPU pVCpu, PCPUMCTX pCtx)236 {237 RT_NOREF2(pVCpu, pCtx);238 return VERR_NOT_IMPLEMENTED;239 }240 -
trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
r66000 r66015 5895 5895 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_VMRUN)) 5896 5896 { 5897 Log(("vmrun: Guest intercept -> VMexit\n"));5897 Log(("vmrun: Guest intercept -> #VMEXIT\n")); 5898 5898 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_VMMCALL, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 5899 5899 } 5900 5900 #endif 5901 5901 5902 /** @todo think - I probably need to map both the HSAVE area page and the5903 * guest VMCB via iemMemPageMap here and do the copying? */5904 pCtx->hwvirt.svm.GCPhysNstGstVmcb = GCPhysVmcb;5905 5902 void *pvVmcb; 5906 5903 PGMPAGEMAPLOCK PgLockVmcb; 5907 5904 VBOXSTRICTRC rcStrict = iemMemPageMap(pVCpu, GCPhysVmcb, IEM_ACCESS_DATA_RW, &pvVmcb, &PgLockVmcb); 5908 5905 if (rcStrict == VINF_SUCCESS) 5909 return HMSvmVmrun(pVCpu, pCtx); 5906 { 5907 pCtx->hwvirt.svm.GCPhysNstGstVmcb = GCPhysVmcb; 5908 5909 RTGCPHYS GCPhysHostState = pCtx->hwvirt.svm.uMsrHSavePa; 5910 /** @todo SVM does not validate the host-state area beyond checking the 5911 * alignment and range of the physical address. Nothing to prevent users 5912 * from using MMIO or other weird stuff in which case anything might 5913 * happen. */ 5914 void *pvHostState; 5915 PGMPAGEMAPLOCK PgLockHostState; 5916 rcStrict = iemMemPageMap(pVCpu, GCPhysHostState, IEM_ACCESS_DATA_RW, &pvHostState, &PgLockHostState); 5917 if (rcStrict == VINF_SUCCESS) 5918 { 5919 PSVMHOSTSTATE pHostState = (PSVMHOSTSTATE)pvHostState; 5920 PSVMVMCB pVmcb = (PSVMVMCB)pvVmcb; 5921 rcStrict = HMSvmVmrun(pVCpu, pCtx, pVmcb, pHostState); 5922 5923 iemMemPageUnmap(pVCpu, GCPhysHostState, IEM_ACCESS_DATA_RW, pvHostState, &PgLockHostState); 5924 } 5925 iemMemPageUnmap(pVCpu, GCPhysVmcb, IEM_ACCESS_DATA_RW, pvVmcb, &PgLockVmcb); 5926 } 5910 5927 RT_NOREF(cbInstr); 5911 5928 return rcStrict; … … 5922 5939 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_VMMCALL)) 5923 5940 { 5924 Log(("vmrun: Guest intercept -> VMexit\n"));5941 Log(("vmrun: Guest intercept -> #VMEXIT\n")); 5925 5942 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_VMMCALL, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 5926 5943 } … … 5950 5967 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_VMLOAD)) 5951 5968 { 5952 Log(("vmload: Guest intercept -> VMexit\n"));5969 Log(("vmload: Guest intercept -> #VMEXIT\n")); 5953 5970 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_VMLOAD, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 5954 5971 } … … 6001 6018 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_VMSAVE)) 6002 6019 { 6003 Log(("vmsave: Guest intercept -> VMexit\n"));6020 Log(("vmsave: Guest intercept -> #VMEXIT\n")); 6004 6021 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_VMSAVE, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 6005 6022 } … … 6052 6069 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_CLGI)) 6053 6070 { 6054 Log(("clgi: Guest intercept -> VMexit\n"));6071 Log(("clgi: Guest intercept -> #VMEXIT\n")); 6055 6072 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_CLGI, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 6056 6073 } … … 6073 6090 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_STGI)) 6074 6091 { 6075 Log2(("stgi: Guest intercept -> VMexit\n"));6092 Log2(("stgi: Guest intercept -> #VMEXIT\n")); 6076 6093 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_STGI, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 6077 6094 } … … 6094 6111 if (IEM_IS_SVM_CTRL_INTERCEPT_SET(pVCpu, SVM_CTRL_INTERCEPT_INVLPGA)) 6095 6112 { 6096 Log2(("invlpga: Guest intercept -> VMexit\n"));6113 Log2(("invlpga: Guest intercept -> #VMEXIT\n")); 6097 6114 return HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_INVLPGA, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */); 6098 6115 } -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r65989 r66015 666 666 667 667 /* Always trap #AC for reasons of security. */ 668 pVmcb->ctrl.u32Intercept Exception|= RT_BIT_32(X86_XCPT_AC);668 pVmcb->ctrl.u32InterceptXcpt |= RT_BIT_32(X86_XCPT_AC); 669 669 670 670 /* Always trap #DB for reasons of security. */ 671 pVmcb->ctrl.u32Intercept Exception|= RT_BIT_32(X86_XCPT_DB);671 pVmcb->ctrl.u32InterceptXcpt |= RT_BIT_32(X86_XCPT_DB); 672 672 673 673 /* Trap exceptions unconditionally (debug purposes). */ 674 674 #ifdef HMSVM_ALWAYS_TRAP_PF 675 pVmcb->ctrl.u32Intercept Exception|= RT_BIT(X86_XCPT_PF);675 pVmcb->ctrl.u32InterceptXcpt |= RT_BIT(X86_XCPT_PF); 676 676 #endif 677 677 #ifdef HMSVM_ALWAYS_TRAP_ALL_XCPTS 678 678 /* If you add any exceptions here, make sure to update hmR0SvmHandleExit(). */ 679 pVmcb->ctrl.u32Intercept Exception|= 0679 pVmcb->ctrl.u32InterceptXcpt |= 0 680 680 | RT_BIT(X86_XCPT_BP) 681 681 | RT_BIT(X86_XCPT_DE) … … 767 767 768 768 /* Page faults must be intercepted to implement shadow paging. */ 769 pVmcb->ctrl.u32Intercept Exception|= RT_BIT(X86_XCPT_PF);769 pVmcb->ctrl.u32InterceptXcpt |= RT_BIT(X86_XCPT_PF); 770 770 } 771 771 … … 776 776 /* Apply the exceptions intercepts needed by the GIM provider. */ 777 777 if (pVCpu->hm.s.fGIMTrapXcptUD) 778 pVmcb->ctrl.u32Intercept Exception|= RT_BIT(X86_XCPT_UD);778 pVmcb->ctrl.u32InterceptXcpt |= RT_BIT(X86_XCPT_UD); 779 779 780 780 /* Setup Pause Filter for guest pause-loop (spinlock) exiting. */ … … 1076 1076 DECLINLINE(void) hmR0SvmAddXcptIntercept(PSVMVMCB pVmcb, uint32_t u32Xcpt) 1077 1077 { 1078 if (!(pVmcb->ctrl.u32Intercept Exception& RT_BIT(u32Xcpt)))1079 { 1080 pVmcb->ctrl.u32Intercept Exception|= RT_BIT(u32Xcpt);1078 if (!(pVmcb->ctrl.u32InterceptXcpt & RT_BIT(u32Xcpt))) 1079 { 1080 pVmcb->ctrl.u32InterceptXcpt |= RT_BIT(u32Xcpt); 1081 1081 pVmcb->ctrl.u64VmcbCleanBits &= ~HMSVM_VMCB_CLEAN_INTERCEPTS; 1082 1082 } … … 1096 1096 Assert(u32Xcpt != X86_XCPT_AC); 1097 1097 #ifndef HMSVM_ALWAYS_TRAP_ALL_XCPTS 1098 if (pVmcb->ctrl.u32Intercept Exception& RT_BIT(u32Xcpt))1099 { 1100 pVmcb->ctrl.u32Intercept Exception&= ~RT_BIT(u32Xcpt);1098 if (pVmcb->ctrl.u32InterceptXcpt & RT_BIT(u32Xcpt)) 1099 { 1100 pVmcb->ctrl.u32InterceptXcpt &= ~RT_BIT(u32Xcpt); 1101 1101 pVmcb->ctrl.u64VmcbCleanBits &= ~HMSVM_VMCB_CLEAN_INTERCEPTS; 1102 1102 } … … 1538 1538 } 1539 1539 1540 Assert(pVmcb->ctrl.u32Intercept Exception& RT_BIT_32(X86_XCPT_DB));1540 Assert(pVmcb->ctrl.u32InterceptXcpt & RT_BIT_32(X86_XCPT_DB)); 1541 1541 if (fInterceptMovDRx) 1542 1542 { … … 2767 2767 Log4(("ctrl.u16InterceptRdDRx %#x\n", pVmcb->ctrl.u16InterceptRdDRx)); 2768 2768 Log4(("ctrl.u16InterceptWrDRx %#x\n", pVmcb->ctrl.u16InterceptWrDRx)); 2769 Log4(("ctrl.u32Intercept Exception %#x\n", pVmcb->ctrl.u32InterceptException));2769 Log4(("ctrl.u32InterceptXcpt %#x\n", pVmcb->ctrl.u32InterceptXcpt)); 2770 2770 Log4(("ctrl.u64InterceptCtrl %#RX64\n", pVmcb->ctrl.u64InterceptCtrl)); 2771 2771 Log4(("ctrl.u64IOPMPhysAddr %#RX64\n", pVmcb->ctrl.u64IOPMPhysAddr)); … … 3283 3283 hmR0SvmSaveGuestState(pVCpu, pMixedCtx); /* Save the guest state from the VMCB to the guest-CPU context. */ 3284 3284 3285 if (RT_LIKELY(pSvmTransient->u64ExitCode != (uint64_t)SVM_EXIT_INVALID))3285 if (RT_LIKELY(pSvmTransient->u64ExitCode != SVM_EXIT_INVALID)) 3286 3286 { 3287 3287 if (pVCpu->hm.s.svm.fSyncVTpr) … … 3345 3345 hmR0SvmPostRunGuest(pVM, pVCpu, pCtx, &SvmTransient, rc); 3346 3346 3347 if (RT_UNLIKELY( rc != VINF_SUCCESS 3348 || SvmTransient.u64ExitCode == (uint64_t)SVM_EXIT_INVALID)) /* Check for invalid guest-state errors. */3347 if (RT_UNLIKELY( rc != VINF_SUCCESS /* Check for VMRUN errors. */ 3348 || SvmTransient.u64ExitCode == SVM_EXIT_INVALID)) /* Check for invalid guest-state errors. */ 3349 3349 { 3350 3350 if (rc == VINF_SUCCESS) … … 3423 3423 */ 3424 3424 hmR0SvmPostRunGuest(pVM, pVCpu, pCtx, &SvmTransient, rc); 3425 if (RT_UNLIKELY( rc != VINF_SUCCESS 3426 || SvmTransient.u64ExitCode == (uint64_t)SVM_EXIT_INVALID)) /* Check for invalid guest-state errors. */3425 if (RT_UNLIKELY( rc != VINF_SUCCESS /* Check for VMRUN errors. */ 3426 || SvmTransient.u64ExitCode == SVM_EXIT_INVALID)) /* Check for invalid guest-state errors. */ 3427 3427 { 3428 3428 if (rc == VINF_SUCCESS) … … 3517 3517 DECLINLINE(int) hmR0SvmHandleExit(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) 3518 3518 { 3519 Assert(pSvmTransient->u64ExitCode != (uint64_t)SVM_EXIT_INVALID);3519 Assert(pSvmTransient->u64ExitCode != SVM_EXIT_INVALID); 3520 3520 Assert(pSvmTransient->u64ExitCode <= SVM_EXIT_MAX); 3521 3521 … … 4070 4070 Log4(("IDT: Nested #AC - Bad guest\n")); 4071 4071 } 4072 else if ( (pVmcb->ctrl.u32Intercept Exception& HMSVM_CONTRIBUTORY_XCPT_MASK)4072 else if ( (pVmcb->ctrl.u32InterceptXcpt & HMSVM_CONTRIBUTORY_XCPT_MASK) 4073 4073 && hmR0SvmIsContributoryXcpt(uExitVector) 4074 4074 && ( hmR0SvmIsContributoryXcpt(uIdtVector)
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