Changeset 66113 in vbox
- Timestamp:
- Mar 15, 2017 2:32:28 PM (8 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h
r65959 r66113 52 52 * @opstats add_Eb_Gb 53 53 * @opgroup op_gen_arith_bin 54 * @optest op1=1 op2=1 -> op1=2 efl =of,sf,zf,af54 * @optest op1=1 op2=1 -> op1=2 efl&|=nv,pl,nz,na,pe 55 55 */ 56 56 FNIEMOP_DEF(iemOp_add_Eb_Gb) … … 101 101 * @opgroup op_gen_arith_bin 102 102 * @opflmodify of,sf,zf,af,pf,cf 103 * @optest op1=1 op2=1 -> op1=2 efl =of,sf,zf,af103 * @optest op1=1 op2=1 -> op1=2 efl&|=nv,pl,nz,na,pe 104 104 */ 105 105 FNIEMOP_DEF(iemOp_add_Al_Ib) … … 114 114 * @opgroup op_gen_arith_bin 115 115 * @opflmodify of,sf,zf,af,pf,cf 116 * @optest op1=1 op2=1 -> op1=2 efl =of,sf,zf,af116 * @optest op1=1 op2=1 -> op1=2 efl&|=nv,pl,nz,na,pe 117 117 */ 118 118 FNIEMOP_DEF(iemOp_add_eAX_Iz) … … 297 297 * @opfltest cf 298 298 * @opflmodify of,sf,zf,af,pf,cf 299 * @optest op1=1 op2=1 efl&~=cf -> op1=2 efl&|= of,sf,zf,af300 * @optest op1=1 op2=1 efl|=cf -> op1=3 efl&|= of,sf,zf,af299 * @optest op1=1 op2=1 efl&~=cf -> op1=2 efl&|=nc,nv,pl,nz,na,pe 300 * @optest op1=1 op2=1 efl|=cf -> op1=3 efl&|=nc,nv,pl,nz,na,po 301 301 */ 302 302 FNIEMOP_DEF(iemOp_adc_Eb_Gb) -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r65962 r66113 74 74 'X86_EFL_LIVE_MASK': 0x003f7fd5, # UINT32_C(0x003f7fd5) 75 75 'X86_EFL_RA1_MASK': 0x00000002, # RT_BIT_32(1) 76 }; 77 78 ## EFlags values allowed in \@opfltest, \@opflmodify, \@opflundef, \@opflset, and \@opflclear. 79 g_kdEFlagsMnemonics = { 80 # Debugger flag notation: 81 'ov': 'X86_EFL_OF', ##< OVerflow. 82 'nv': '!X86_EFL_OF', ##< No Overflow. 83 84 'ng': 'X86_EFL_SF', ##< NeGative (sign). 85 'pl': '!X86_EFL_SF', ##< PLuss (sign). 86 87 'zr': 'X86_EFL_ZF', ##< ZeRo. 88 'nz': '!X86_EFL_ZF', ##< No Zero. 89 90 'af': 'X86_EFL_AF', ##< Aux Flag. 91 'na': '!X86_EFL_AF', ##< No Aux. 92 93 'po': 'X86_EFL_PF', ##< Parity Pdd. 94 'pe': '!X86_EFL_PF', ##< Parity Even. 95 96 'cf': 'X86_EFL_CF', ##< Carry Flag. 97 'nc': '!X86_EFL_CF', ##< No Carry. 98 99 'ei': 'X86_EFL_IF', ##< Enabled Interrupts. 100 'di': '!X86_EFL_IF', ##< Disabled Interrupts. 101 102 'dn': 'X86_EFL_DF', ##< DowN (string op direction). 103 'up': '!X86_EFL_DF', ##< UP (string op direction). 104 105 'vip': 'X86_EFL_VIP', ##< Virtual Interrupt Pending. 106 'vif': 'X86_EFL_VIF', ##< Virtual Interrupt Flag. 107 'ac': 'X86_EFL_AC', ##< Alignment Check. 108 'vm': 'X86_EFL_VM', ##< Virtual-8086 Mode. 109 'rf': 'X86_EFL_RF', ##< Resume Flag. 110 'nt': 'X86_EFL_NT', ##< Nested Task. 111 'tf': 'X86_EFL_TF', ##< Trap flag. 112 113 # Reference manual notation: 114 'of': 'X86_EFL_OF', 115 'sf': 'X86_EFL_SF', 116 'zf': 'X86_EFL_ZF', 117 'pf': 'X86_EFL_PF', 118 'if': 'X86_EFL_IF', 119 'df': 'X86_EFL_DF', 120 'iopl': 'X86_EFL_IOPL', 121 'id': 'X86_EFL_ID', 76 122 }; 77 123 … … 588 634 fSet = 0; 589 635 for sFlag in sValue.split(','): 590 sConstant = SimpleParser.kdEFlags.get(sFlag, None);636 sConstant = g_kdEFlagsMnemonics.get(sFlag, None); 591 637 if sConstant is None: 592 638 raise self.BadValue('Unknown flag "%s" in "%s"' % (sFlag, sValue)) … … 643 689 # Flags. 644 690 'efl': ( 'efl', '', ), 691 'efl_undef': ( 'uint', '', ), 645 692 # 8-bit GPRs. 646 693 'al': ( 'uint', '', ), … … 823 870 824 871 def __init__(self, oInstr): # type: (InstructionTest, Instruction) 825 self.oInstr = oInstr; # type: InstructionTest826 self.aoInputs = []; 827 self.aoOutputs = []; 828 self.aoSelectors = []; # type: list(TestSelector)872 self.oInstr = oInstr; # type: InstructionTest 873 self.aoInputs = []; # type: TestInOut 874 self.aoOutputs = []; # type: TestInOut 875 self.aoSelectors = []; # type: list(TestSelector) 829 876 830 877 … … 975 1022 raise Exception('unsupported opcode byte spec "%s" for %s' % (sOpcode, self,)); 976 1023 1024 @staticmethod 1025 def _flagsToIntegerMask(asFlags): 1026 """ 1027 Returns the integer mask value for asFlags. 1028 """ 1029 uRet = 0; 1030 if asFlags: 1031 for sFlag in asFlags: 1032 sConstant = g_kdEFlagsMnemonics[sFlag]; 1033 assert sConstant[0] != '!', sConstant 1034 uRet |= g_kdX86EFlagsConstants[sConstant]; 1035 return uRet; 1036 1037 def getTestedFlagsMask(self): 1038 """ Returns asFlTest into a integer mask value """ 1039 return self._flagsToIntegerMask(self.asFlTest); 1040 1041 def getModifiedFlagsMask(self): 1042 """ Returns asFlModify into a integer mask value """ 1043 return self._flagsToIntegerMask(self.asFlModify); 1044 1045 def getUndefinedFlagsMask(self): 1046 """ Returns asFlUndefined into a integer mask value """ 1047 return self._flagsToIntegerMask(self.asFlUndefined); 1048 1049 def getSetFlagsMask(self): 1050 """ Returns asFlSet into a integer mask value """ 1051 return self._flagsToIntegerMask(self.asFlSet); 1052 1053 def getClearedFlagsMask(self): 1054 """ Returns asFlClear into a integer mask value """ 1055 return self._flagsToIntegerMask(self.asFlClear); 977 1056 978 1057 … … 1607 1686 return True; 1608 1687 1609 ## EFlags values allowed in \@opfltest, \@opflmodify, \@opflundef, \@opflset, and \@opflclear.1610 kdEFlags = {1611 # Debugger flag notation:1612 'ov': 'X86_EFL_OF', ##< OVerflow.1613 'nv': '!X86_EFL_OF', ##< No Overflow.1614 1615 'ng': 'X86_EFL_SF', ##< NeGative (sign).1616 'pl': '!X86_EFL_SF', ##< PLuss (sign).1617 1618 'zr': 'X86_EFL_ZF', ##< ZeRo.1619 'nz': '!X86_EFL_ZF', ##< No Zero.1620 1621 'af': 'X86_EFL_AF', ##< Aux Flag.1622 'na': '!X86_EFL_AF', ##< No Aux.1623 1624 'po': 'X86_EFL_PF', ##< Parity Pdd.1625 'pe': '!X86_EFL_PF', ##< Parity Even.1626 1627 'cf': 'X86_EFL_CF', ##< Carry Flag.1628 'nc': '!X86_EFL_CF', ##< No Carry.1629 1630 'ei': 'X86_EFL_IF', ##< Enabled Interrupts.1631 'di': '!X86_EFL_IF', ##< Disabled Interrupts.1632 1633 'dn': 'X86_EFL_DF', ##< DowN (string op direction).1634 'up': '!X86_EFL_DF', ##< UP (string op direction).1635 1636 'vip': 'X86_EFL_VIP', ##< Virtual Interrupt Pending.1637 'vif': 'X86_EFL_VIF', ##< Virtual Interrupt Flag.1638 'ac': 'X86_EFL_AC', ##< Alignment Check.1639 'vm': 'X86_EFL_VM', ##< Virtual-8086 Mode.1640 'rf': 'X86_EFL_RF', ##< Resume Flag.1641 'nt': 'X86_EFL_NT', ##< Nested Task.1642 'tf': 'X86_EFL_TF', ##< Trap flag.1643 1644 # Reference manual notation:1645 'of': 'X86_EFL_OF',1646 'sf': 'X86_EFL_SF',1647 'zf': 'X86_EFL_ZF',1648 'pf': 'X86_EFL_PF',1649 'if': 'X86_EFL_IF',1650 'df': 'X86_EFL_DF',1651 'iopl': 'X86_EFL_IOPL',1652 'id': 'X86_EFL_ID',1653 };1654 1655 1688 ## EFlags tag to Instruction attribute name. 1656 1689 kdOpFlagToAttr = { … … 1677 1710 fRc = True; 1678 1711 for iFlag, sFlag in enumerate(asFlags): 1679 if sFlag not in self.kdEFlags:1680 if sFlag.strip() in self.kdEFlags:1712 if sFlag not in g_kdEFlagsMnemonics: 1713 if sFlag.strip() in g_kdEFlagsMnemonics: 1681 1714 asFlags[iFlag] = sFlag.strip(); 1682 1715 else: … … 1990 2023 oItem = TestInOut(sField, sOp, sValue, sType); 1991 2024 else: 1992 self.errorComment(iTagLine, '%s: and-or %s value "%s" can only be used with the "="'2025 self.errorComment(iTagLine, '%s: and-or %s value "%s" can only be used with "&|="' 1993 2026 % ( sTag, sDesc, sItem, )); 1994 2027 else: 1995 self.errorComment(iTagLine, '%s: invalid %s value "%s" in "%s" (type: %s) '1996 % ( sTag, sDesc, sValue, sItem, sType, ));2028 self.errorComment(iTagLine, '%s: invalid %s value "%s" in "%s" (type: %s): %s' 2029 % ( sTag, sDesc, sValue, sItem, sType, oValid, )); 1997 2030 else: 1998 2031 self.errorComment(iTagLine, '%s: invalid %s type "%s" in "%s" (valid types: %s)' -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py
r66055 r66113 104 104 105 105 @staticmethod 106 def _amendOutputs(aoOutputs, oInstr): # type: (list(iai.TestInOut), iai.Instruction) -> list(iai.TestInOut) 107 """ 108 Amends aoOutputs for instructions with special flag behaviour (undefined, 109 always set, always clear). 110 111 Undefined flags are copied from the result context as the very first 112 operation so they can be set to CPU vendor specific values later if 113 desired. 114 115 Always set or cleared flags are applied at the very end of the 116 modification operations so that we spot incorrect specifications. 117 """ 118 if oInstr.asFlUndefined or oInstr.asFlClear or oInstr.asFlSet: 119 aoOutputs = list(aoOutputs); 120 121 if oInstr.asFlUndefined: 122 fFlags = oInstr.getUndefinedFlagsMask(); 123 assert fFlags != 0; 124 aoOutputs.insert(0, iai.TestInOut('efl_undef', '=', fFlags, 'uint')); 125 126 if oInstr.asFlClear: 127 fFlags = oInstr.getClearedFlagsMask(); 128 assert fFlags != 0; 129 aoOutputs.append(iai.TestInOut('efl', '&~=', fFlags, 'uint')); 130 131 if oInstr.asFlSet: 132 fFlags = oInstr.getSetFlagsMask(); 133 assert fFlags != 0; 134 aoOutputs.append(iai.TestInOut('efl', '|=', fFlags, 'uint')); 135 136 return aoOutputs; 137 138 @staticmethod 106 139 def _compileContextModifers(aoOperations): # (list(iai.TestInOut)) 107 140 """ … … 116 149 sOp = oOperation.sOp; 117 150 if sOp == '&|=': 118 sOp = '|=' if len(aaoValues) == 1 else '& ~=';151 sOp = '|=' if len(aaoValues) == 1 else '&='; 119 152 120 153 for fSignExtend, abValue in aaoValues: … … 184 217 self.asSelectors = self._compileSelectors(oTest.aoSelectors); 185 218 self.asInputs = self._compileContextModifers(oTest.aoInputs); 186 self.asOutputs = self._compileContextModifers( oTest.aoOutputs);219 self.asOutputs = self._compileContextModifers(self._amendOutputs(oTest.aoOutputs, oTest.oInstr)); 187 220 self.asHdr = self._constructHeader(); 188 221 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66102 r66113 81 81 #endif 82 82 83 #define BS3CG1_DEBUG_CTX_MOD 84 83 85 84 86 /********************************************************************************************************************************* … … 170 172 * are marked not-present. */ 171 173 uint8_t BS3_FAR *pbCodePg; 174 /** The flat address corresponding to pbCodePg. */ 175 uintptr_t uCodePgFlat; 172 176 /** Page for placing data operands in. When paging is enabled, the page before 173 177 * and after are marked not-present. */ … … 226 230 /** Destination field sizes indexed by bBS3CG1DST. 227 231 * Zero means operand size sized. */ 228 static const uint8_t g_ cbBs3Cg1DstFields[] =232 static const uint8_t g_acbBs3Cg1DstFields[] = 229 233 { 230 234 /* [BS3CG1DST_INVALID] = */ BS3CG1DSTSIZE_OPERAND, … … 329 333 /** Destination field offset indexed by bBS3CG1DST. 330 334 * Zero means operand size sized. */ 331 static const unsigned g_ offBs3Cg1DstFields[] =335 static const unsigned g_aoffBs3Cg1DstFields[] = 332 336 { 333 337 /* [BS3CG1DST_INVALID] = */ ~0U, … … 428 432 /* [BS3CG1DST_OZ_R15] = */ RT_OFFSETOF(BS3REGCTX, r15), 429 433 }; 434 435 #ifdef BS3CG1_DEBUG_CTX_MOD 436 /** Destination field names. */ 437 static const struct { char sz[8]; } g_aszBs3Cg1DstFields[] = 438 { 439 { "INVALID" }, 440 { "OP1" }, 441 { "OP2" }, 442 { "OP3" }, 443 { "OP4" }, 444 { "EFL" }, 445 { "EFL_UND" }, 446 447 { "AL" }, 448 { "CL" }, 449 { "DL" }, 450 { "BL" }, 451 { "AH" }, 452 { "CH" }, 453 { "DH" }, 454 { "BH" }, 455 { "SPL" }, 456 { "BPL" }, 457 { "SIL" }, 458 { "DIL" }, 459 { "R8L" }, 460 { "R9L" }, 461 { "R10L" }, 462 { "R11L" }, 463 { "R12L" }, 464 { "R13L" }, 465 { "R14L" }, 466 { "R15L" }, 467 468 { "AX" }, 469 { "CX" }, 470 { "DX" }, 471 { "BX" }, 472 { "SP" }, 473 { "BP" }, 474 { "SI" }, 475 { "DI" }, 476 { "R8W" }, 477 { "R9W" }, 478 { "R10W" }, 479 { "R11W" }, 480 { "R12W" }, 481 { "R13W" }, 482 { "R14W" }, 483 { "R15W" }, 484 485 { "EAX" }, 486 { "ECX" }, 487 { "EDX" }, 488 { "EBX" }, 489 { "ESP" }, 490 { "EBP" }, 491 { "ESI" }, 492 { "EDI" }, 493 { "R8D" }, 494 { "R9D" }, 495 { "R10D" }, 496 { "R11D" }, 497 { "R12D" }, 498 { "R13D" }, 499 { "R14D" }, 500 { "R15D" }, 501 502 { "RAX" }, 503 { "RCX" }, 504 { "RDX" }, 505 { "RBX" }, 506 { "RSP" }, 507 { "RBP" }, 508 { "RSI" }, 509 { "RDI" }, 510 { "R8" }, 511 { "R9" }, 512 { "R10" }, 513 { "R11" }, 514 { "R12" }, 515 { "R13" }, 516 { "R14" }, 517 { "R15" }, 518 519 { "OZ_RAX" }, 520 { "OZ_RCX" }, 521 { "OZ_RDX" }, 522 { "OZ_RBX" }, 523 { "OZ_RSP" }, 524 { "OZ_RBP" }, 525 { "OZ_RSI" }, 526 { "OZ_RDI" }, 527 { "OZ_R8" }, 528 { "OZ_R9" }, 529 { "OZ_R10" }, 530 { "OZ_R11" }, 531 { "OZ_R12" }, 532 { "OZ_R13" }, 533 { "OZ_R14" }, 534 { "OZ_R15" }, 535 }; 536 537 #endif 430 538 431 539 #if 0 … … 738 846 * Do value processing specific to the target field size. 739 847 */ 740 cbDst = g_ cbBs3Cg1DstFields[idxField];848 cbDst = g_acbBs3Cg1DstFields[idxField]; 741 849 if (cbDst == BS3CG1DSTSIZE_OPERAND) 742 850 cbDst = pThis->aOperands[idxField - BS3CG1DST_OP1].cbOp; … … 745 853 if (cbDst <= 8) 746 854 { 747 unsigned const offField = g_ offBs3Cg1DstFields[idxField];855 unsigned const offField = g_aoffBs3Cg1DstFields[idxField]; 748 856 BS3PTRUNION PtrField; 749 857 … … 808 916 } 809 917 918 #ifdef BS3CG1_DEBUG_CTX_MOD 919 { 920 const char BS3_FAR *pszOp; 921 switch (bOpcode & BS3CG1_CTXOP_OPERATOR_MASK) 922 { 923 case BS3CG1_CTXOP_ASSIGN: pszOp = "="; break; 924 case BS3CG1_CTXOP_OR: pszOp = "|="; break; 925 case BS3CG1_CTXOP_AND: pszOp = "&="; break; 926 case BS3CG1_CTXOP_AND_INV: pszOp = "&~="; break; 927 } 928 switch (cbDst) 929 { 930 case 1: 931 BS3CG1_DPRINTF(("dbg: modify %s: %#04RX8 (LB %u) %s %#RX64 (LB %u)\n", 932 g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu8, cbDst, pszOp, uValue, cbValue)); 933 break; 934 case 2: 935 BS3CG1_DPRINTF(("dbg: modify %s: %#06RX16 (LB %u) %s %#RX64 (LB %u)\n", 936 g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu16, cbDst, pszOp, uValue, cbValue)); 937 break; 938 case 4: 939 BS3CG1_DPRINTF(("dbg: modify %s: %#010RX32 (LB %u) %s %#RX64 (LB %u)\n", 940 g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu32, cbDst, pszOp, uValue, cbValue)); 941 break; 942 default: 943 BS3CG1_DPRINTF(("dbg: modify %s: %#018RX64 (LB %u) %s %#RX64 (LB %u)\n", 944 g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu64, cbDst, pszOp, uValue, cbValue)); 945 break; 946 } 947 } 948 #endif 949 810 950 /* Modify the field. */ 811 951 switch (cbDst) … … 855 995 return false; 856 996 } 997 998 #ifdef BS3CG1_DEBUG_CTX_MOD 999 switch (cbDst) 1000 { 1001 case 1: BS3CG1_DPRINTF(("dbg: --> %s: %#04RX32\n", g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu8)); break; 1002 case 2: BS3CG1_DPRINTF(("dbg: --> %s: %#06RX32\n", g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu16)); break; 1003 case 4: BS3CG1_DPRINTF(("dbg: --> %s: %#010RX32\n", g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu32)); break; 1004 default: BS3CG1_DPRINTF(("dbg: --> %s: %#018RX64\n", g_aszBs3Cg1DstFields[idxField].sz, *PtrField.pu64)); break; 1005 } 1006 #endif 1007 857 1008 } 858 1009 /* … … 932 1083 } 933 1084 } 1085 This.uCodePgFlat = Bs3SelPtrToFlat(This.pbCodePg); 934 1086 935 1087 /* Create basic context for each target ring. In protected 16-bit code we need … … 1050 1202 Bs3MemCpy(&This.Ctx, &This.aInitialCtxs[iRing], sizeof(This.Ctx)); 1051 1203 if (BS3_MODE_IS_PAGED(bMode)) 1052 pbCode = &This.pbCodePg[ This.cbCurInstr];1204 pbCode = &This.pbCodePg[X86_PAGE_SIZE - This.cbCurInstr]; 1053 1205 else 1054 1206 { … … 1073 1225 { 1074 1226 /* Apply output modifications and compare the contexts. */ 1227 if (BS3_MODE_IS_PAGED(bMode)) 1228 This.Ctx.cr2.u = This.uCodePgFlat + X86_PAGE_SIZE; 1229 This.Ctx.rflags.u32 &= ~X86_EFL_RF; 1230 This.Ctx.rflags.u32 |= X86_EFL_RF & This.TrapFrame.Ctx.rflags.u32; 1075 1231 if (Bs3Cg1RunContextModifier(&This, &This.Ctx, pHdr, 1076 1232 pHdr->cbSelector + pHdr->cbInput, pHdr->cbOutput, … … 1083 1239 else 1084 1240 { 1085 Bs3TestFailedF("bXcpt=%#x expected %#x; rip=%RX64 expected %RX64 encoding: %.*Rhxs",1241 Bs3TestFailedF("bXcpt=%#x expected %#x; rip=%RX64 expected %RX64; encoding: %.*Rhxs", 1086 1242 This.TrapFrame.bXcpt, BS3_MODE_IS_PAGED(bMode) ? X86_XCPT_PF : X86_XCPT_UD, 1087 1243 This.TrapFrame.Ctx.rip.u, This.Ctx.rip.u + This.cbCurInstr, … … 1120 1276 } 1121 1277 1278 Bs3TestSubDone(); 1279 1122 1280 return 0; 1123 1281 }
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