Changeset 66172 in vbox
- Timestamp:
- Mar 20, 2017 11:36:10 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 114083
- Location:
- trunk/src/VBox
- Files:
-
- 5 edited
-
VMM/VMMAll/IEMAllInstructionsPython.py (modified) (4 diffs)
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VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h (modified) (1 diff)
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ValidationKit/bootsectors/bs3-cpu-generated-1-data.py (modified) (2 diffs)
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ValidationKit/bootsectors/bs3-cpu-generated-1-template.c (modified) (14 diffs)
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ValidationKit/bootsectors/bs3-cpu-generated-1.h (modified) (4 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r66160 r66172 161 161 'Ew': ( 'IDX_UseModRM', 'rm', '%Ew', 'Ew', ), 162 162 'Ev': ( 'IDX_UseModRM', 'rm', '%Ev', 'Ev', ), 163 'Wsd': ( 'IDX_UseModRM', 'rm', '%Wsd', 'Wsd', ), 163 164 164 165 # ModR/M.rm - memory only. … … 169 170 'Gw': ( 'IDX_UseModRM', 'reg', '%Gw', 'Gw', ), 170 171 'Gv': ( 'IDX_UseModRM', 'reg', '%Gv', 'Gv', ), 172 'Vsd': ( 'IDX_UseModRM', 'reg', '%Vsd', 'Vsd', ), 171 173 172 174 # Immediate values. … … 1694 1696 if len(sPrefix) == 2: 1695 1697 sPrefix = '0x' + sPrefix; 1696 if _isValidOpcodeByte(sPrefix):1698 if not _isValidOpcodeByte(sPrefix): 1697 1699 return self.errorComment(iTagLine, '%s: invalid prefix: %s' % (sTag, sPrefix,)); 1698 1700 … … 2808 2810 for sDefaultMap, sName in [ 2809 2811 ( 'one', 'IEMAllInstructionsOneByte.cpp.h'), 2810 #( 'two0f', 'IEMAllInstructionsTwoByte0f.cpp.h'),2812 ( 'two0f', 'IEMAllInstructionsTwoByte0f.cpp.h'), 2811 2813 ]: 2812 2814 cErrors += __parseFileByName(os.path.join(sSrcDir, sName), sDefaultMap); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r66007 r66172 1125 1125 FNIEMOP_STUB(iemOp_vmovss_Wss_Hx_Vss); 1126 1126 1127 /** Opcode 0xf2 0x0f 0x11 - vmovsd Wsd, Hx, Vsd */ 1127 /** 1128 * @opcode 0x11 1129 * @oppfx 0xf2 1130 * @opcpuid sse2 1131 * @opgroup og_sse2_pcksclr_datamov 1132 * @optestign op1=1 op2=2 -> op1=2 1133 */ 1128 1134 FNIEMOP_DEF(iemOp_vmovsd_Wsd_Hx_Vsd) 1129 1135 { 1130 IEMOP_MNEMONIC (movsd_Wsd_Vsd, "movsd Wsd,Vsd");1136 IEMOP_MNEMONIC2(MR, MOVSD, movsd, Wsd, Vsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1131 1137 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1132 1138 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py
r66134 r66172 318 318 self.sPfxKind = '0'; 319 319 320 self.sCpu = 'BS3CG1CPU_'; 321 assert len(oInstr.asCpuIds) in [0, 1], str(oInstr); 322 if oInstr.asCpuIds: 323 self.sCpu += oInstr.asCpuIds[0].upper(); 324 elif oInstr.sMinCpu: 325 self.sCpu += 'GE_' + oInstr.sMinCpu; 326 else: 327 self.sCpu += 'ANY'; 328 320 329 321 330 def getOperands(self): … … 332 341 ' /* offTests = */ %s,' % (self.oTests.offTests,), 333 342 ' /* enmEncoding = */ (unsigned)%s,' % (self.sEncoding,), 334 ' /* enmPfxKind = */ (unsigned)%s,' % (self.sPfxKind,), 343 ' /* enmPrefixKind = */ (unsigned)%s,' % (self.sPfxKind,), 344 ' /* enmCpuTest = */ (unsigned)%s,' % (self.sCpu,), 335 345 ' /* uUnused = */ 0,', 336 346 ' /* fFlags = */ %s' % (' | '.join(self.asFlags) if self.asFlags else '0'), -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66162 r66172 120 120 /** The encoding. */ 121 121 BS3CG1ENC enmEncoding; 122 #if ARCH_BITS == 16 123 uint16_t u16Padding0; 124 #endif 122 /** The CPU test / CPU ID. */ 123 BS3CG1CPU enmCpuTest; 125 124 /** Per operand flags. */ 126 125 BS3CG1OP aenmOperands[4]; … … 203 202 /** The name corresponding to bMode. */ 204 203 const char BS3_FAR *pszMode; 204 /** The short name corresponding to bMode. */ 205 const char BS3_FAR *pszModeShort; 205 206 206 207 /** @name Expected result (modifiable by output program). … … 1083 1084 return true; 1084 1085 } 1086 1087 1088 static bool Bs3Cg3SetupAvx(PBS3CG1STATE pThis) 1089 { 1090 return true; 1091 } 1092 1093 1094 /** 1095 * Sets up SSE. 1096 * 1097 * @returns true (if successful, false if not and the SSE instructions ends up 1098 * being invalid). 1099 * @param pThis The state. 1100 */ 1101 static bool Bs3Cg3SetupSse(PBS3CG1STATE pThis) 1102 { 1103 ASMSetCR4(ASMGetCR4() | X86_CR4_OSFXSR | X86_CR4_OSXMMEEXCPT); 1104 return true; 1105 } 1106 1107 1108 /** 1109 * Check if the instruction is supported by the CPU, possibly making state 1110 * adjustments to enable support for it. 1111 * 1112 * @returns true if supported, false if not. 1113 * @param pThis The state. 1114 */ 1115 static bool Bs3Cg1CpuTestAndEnable(PBS3CG1STATE pThis) 1116 { 1117 uint32_t fEax; 1118 uint32_t fEbx; 1119 uint32_t fEcx; 1120 uint32_t fEdx; 1121 ASMCpuIdExSlow(1, 0, 0, 0, NULL, NULL, &fEcx, &fEdx); 1122 1123 if ( (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT) 1124 && BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 1125 return false; 1126 1127 switch (pThis->enmCpuTest) 1128 { 1129 case BS3CG1CPU_ANY: 1130 return true; 1131 1132 case BS3CG1CPU_GE_80186: 1133 if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_80186) 1134 return true; 1135 return false; 1136 1137 case BS3CG1CPU_GE_80286: 1138 if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_80286) 1139 return true; 1140 return false; 1141 1142 case BS3CG1CPU_GE_80386: 1143 if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_80386) 1144 return true; 1145 return false; 1146 1147 case BS3CG1CPU_GE_80486: 1148 if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_80486) 1149 return true; 1150 return false; 1151 1152 case BS3CG1CPU_GE_Pentium: 1153 if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_Pentium) 1154 return true; 1155 return false; 1156 1157 case BS3CG1CPU_SSE: 1158 case BS3CG1CPU_SSE2: 1159 case BS3CG1CPU_SSE3: 1160 case BS3CG1CPU_AVX: 1161 if (g_uBs3CpuDetected & BS3CPU_F_CPUID) 1162 { 1163 ASMCpuIdExSlow(1, 0, 0, 0, NULL, NULL, &fEcx, &fEdx); 1164 switch (pThis->enmCpuTest) 1165 { 1166 case BS3CG1CPU_SSE: 1167 if (fEdx & X86_CPUID_FEATURE_EDX_SSE) 1168 return Bs3Cg3SetupSse(pThis); 1169 return false; 1170 case BS3CG1CPU_SSE2: 1171 if (fEdx & X86_CPUID_FEATURE_EDX_SSE2) 1172 return Bs3Cg3SetupSse(pThis); 1173 return false; 1174 case BS3CG1CPU_SSE3: 1175 if (fEcx & X86_CPUID_FEATURE_ECX_SSE3) 1176 return Bs3Cg3SetupSse(pThis); 1177 return false; 1178 case BS3CG1CPU_AVX: 1179 if (fEcx & X86_CPUID_FEATURE_ECX_AVX) 1180 return Bs3Cg3SetupAvx(pThis); 1181 return false; 1182 default: BS3_ASSERT(0); /* impossible */ 1183 } 1184 } 1185 return false; 1186 1187 case BS3CG1CPU_AVX2: 1188 if (g_uBs3CpuDetected & BS3CPU_F_CPUID) 1189 { 1190 ASMCpuIdExSlow(7, 0, 0/*leaf*/, 0, &fEax, &fEbx, &fEcx, &fEdx); 1191 1192 switch (pThis->enmCpuTest) 1193 { 1194 case BS3CG1CPU_AVX2: 1195 if (fEbx & X86_CPUID_STEXT_FEATURE_EBX_AVX2) 1196 return Bs3Cg3SetupAvx(pThis); 1197 return false; 1198 default: BS3_ASSERT(0); return false; /* impossible */ 1199 } 1200 } 1201 return false; 1202 1203 default: 1204 Bs3TestFailedF("Invalid enmCpuTest value: %d", pThis->enmCpuTest); 1205 return false; 1206 } 1207 } 1208 1085 1209 1086 1210 … … 1649 1773 BS3_DECL_FAR(uint8_t) BS3_CMN_NM(Bs3Cg1Worker)(uint8_t bMode) 1650 1774 { 1651 BS3CG1STATE This; 1775 BS3CG1STATE ThisIsIt; 1776 PBS3CG1STATE pThis = &ThisIsIt; 1652 1777 unsigned const iFirstRing = BS3_MODE_IS_V86(bMode) ? 3 : 0; 1653 1778 uint8_t const cRings = BS3_MODE_IS_RM_OR_V86(bMode) ? 1 : 4; … … 1665 1790 * Initalize the state. 1666 1791 */ 1667 Bs3MemSet(&This, 0, sizeof(This)); 1668 1669 This.bMode = bMode; 1670 This.pszMode = Bs3GetModeName(bMode); 1671 This.pchMnemonic = g_achBs3Cg1Mnemonics; 1672 This.pabOperands = g_abBs3Cg1Operands; 1673 This.pabOpcodes = g_abBs3Cg1Opcodes; 1674 This.fAdvanceMnemonic = 1; 1792 Bs3MemSet(pThis, 0, sizeof(*pThis)); 1793 1794 pThis->bMode = bMode; 1795 pThis->pszMode = Bs3GetModeName(bMode); 1796 pThis->pszModeShort = Bs3GetModeNameShortLower(bMode); 1797 pThis->pchMnemonic = g_achBs3Cg1Mnemonics; 1798 pThis->pabOperands = g_abBs3Cg1Operands; 1799 pThis->pabOpcodes = g_abBs3Cg1Opcodes; 1800 pThis->fAdvanceMnemonic = 1; 1675 1801 1676 1802 /* Allocate guarded exectuable and data memory. */ 1677 1803 if (BS3_MODE_IS_PAGED(bMode)) 1678 1804 { 1679 This.pbCodePg = Bs3MemGuardedTestPageAlloc(enmMemKind);1680 if (! This.pbCodePg)1805 pThis->pbCodePg = Bs3MemGuardedTestPageAlloc(enmMemKind); 1806 if (!pThis->pbCodePg) 1681 1807 return Bs3TestFailedF("First Bs3MemGuardedTestPageAlloc(%d) failed", enmMemKind); 1682 This.pbDataPg = Bs3MemGuardedTestPageAlloc(enmMemKind);1683 if (! This.pbDataPg)1808 pThis->pbDataPg = Bs3MemGuardedTestPageAlloc(enmMemKind); 1809 if (!pThis->pbDataPg) 1684 1810 { 1685 Bs3MemGuardedTestPageFree( This.pbCodePg);1811 Bs3MemGuardedTestPageFree(pThis->pbCodePg); 1686 1812 return Bs3TestFailedF("Second Bs3MemGuardedTestPageAlloc(%d) failed", enmMemKind); 1687 1813 } 1688 1814 if ( BS3_MODE_IS_64BIT_CODE(bMode) 1689 && (uintptr_t) This.pbDataPg >= _2G)1815 && (uintptr_t)pThis->pbDataPg >= _2G) 1690 1816 { 1691 Bs3TestFailedF("pbDataPg=%p is above 2GB and not simple to address from 64-bit code", This.pbDataPg);1692 Bs3MemGuardedTestPageFree( This.pbDataPg);1693 Bs3MemGuardedTestPageFree( This.pbCodePg);1817 Bs3TestFailedF("pbDataPg=%p is above 2GB and not simple to address from 64-bit code", pThis->pbDataPg); 1818 Bs3MemGuardedTestPageFree(pThis->pbDataPg); 1819 Bs3MemGuardedTestPageFree(pThis->pbCodePg); 1694 1820 return 0; 1695 1821 } … … 1697 1823 else 1698 1824 { 1699 This.pbCodePg = Bs3MemAlloc(enmMemKind, X86_PAGE_SIZE);1700 if (! This.pbCodePg)1825 pThis->pbCodePg = Bs3MemAlloc(enmMemKind, X86_PAGE_SIZE); 1826 if (!pThis->pbCodePg) 1701 1827 return Bs3TestFailedF("First Bs3MemAlloc(%d,Pg) failed", enmMemKind); 1702 This.pbDataPg = Bs3MemAlloc(enmMemKind, X86_PAGE_SIZE);1703 if (! This.pbDataPg)1828 pThis->pbDataPg = Bs3MemAlloc(enmMemKind, X86_PAGE_SIZE); 1829 if (!pThis->pbDataPg) 1704 1830 { 1705 Bs3MemFree( This.pbCodePg, X86_PAGE_SIZE);1831 Bs3MemFree(pThis->pbCodePg, X86_PAGE_SIZE); 1706 1832 return Bs3TestFailedF("Second Bs3MemAlloc(%d,Pg) failed", enmMemKind); 1707 1833 } 1708 1834 } 1709 This.uCodePgFlat = Bs3SelPtrToFlat(This.pbCodePg);1710 This.uDataPgFlat = Bs3SelPtrToFlat(This.pbDataPg);1835 pThis->uCodePgFlat = Bs3SelPtrToFlat(pThis->pbCodePg); 1836 pThis->uDataPgFlat = Bs3SelPtrToFlat(pThis->pbDataPg); 1711 1837 #if ARCH_BITS == 16 1712 This.DataPgFar.off = BS3_FP_OFF(This.pbDataPg);1713 This.DataPgFar.sel = BS3_FP_SEG(This.pbDataPg);1838 pThis->DataPgFar.off = BS3_FP_OFF(pThis->pbDataPg); 1839 pThis->DataPgFar.sel = BS3_FP_SEG(pThis->pbDataPg); 1714 1840 #else 1715 1841 if (BS3_MODE_IS_RM_OR_V86(bMode)) 1716 *(uint32_t *)& This.DataPgFar = Bs3SelFlatDataToRealMode(This.uDataPgFlat);1842 *(uint32_t *)&pThis->DataPgFar = Bs3SelFlatDataToRealMode(pThis->uDataPgFlat); 1717 1843 else if (!BS3_MODE_IS_64BIT_CODE(bMode)) 1718 *(uint32_t *)& This.DataPgFar = Bs3SelFlatDataToProtFar16(This.uDataPgFlat);1844 *(uint32_t *)&pThis->DataPgFar = Bs3SelFlatDataToProtFar16(pThis->uDataPgFlat); 1719 1845 else 1720 *(uint32_t *)& This.DataPgFar = 0;1846 *(uint32_t *)&pThis->DataPgFar = 0; 1721 1847 #endif 1722 1848 1723 1849 /* Create basic context for each target ring. In protected 16-bit code we need 1724 1850 set up code selectors that can access pbCodePg. ASSUMES 16-bit driver code! */ 1725 Bs3RegCtxSaveEx(& This.aInitialCtxs[iFirstRing], bMode, 512);1726 if (BS3_MODE_IS_ 16BIT_CODE(bMode) && !BS3_MODE_IS_RM_OR_V86(bMode))1851 Bs3RegCtxSaveEx(&pThis->aInitialCtxs[iFirstRing], bMode, 512); 1852 if (BS3_MODE_IS_RM_OR_V86(bMode)) 1727 1853 { 1728 1854 #if ARCH_BITS == 16 1729 uintptr_t const uFlatCodePg = Bs3SelPtrToFlat(BS3_FP_MAKE(BS3_FP_SEG(This.pbCodePg), 0));1855 pThis->aInitialCtxs[iFirstRing].cs = BS3_FP_SEG(pThis->pbCodePg); 1730 1856 #else 1731 uintptr_t const uFlatCodePg = (uintptr_t)This.pbCodePg; 1857 pThis->aInitialCtxs[iFirstRing].cs = Bs3SelFlatCodeToRealMode((uintptr_t)pThis->pbCodePg) >> 16; 1858 #endif 1859 BS3_ASSERT(iFirstRing + 1 >= cRings); 1860 } 1861 else if (BS3_MODE_IS_16BIT_CODE(bMode)) 1862 { 1863 #if ARCH_BITS == 16 1864 uintptr_t const uFlatCodePg = Bs3SelPtrToFlat(BS3_FP_MAKE(BS3_FP_SEG(pThis->pbCodePg), 0)); 1865 #else 1866 uintptr_t const uFlatCodePg = (uintptr_t)pThis->pbCodePg; 1732 1867 #endif 1733 1868 BS3_ASSERT(ARCH_BITS == 16); 1734 1869 for (iRing = iFirstRing + 1; iRing < cRings; iRing++) 1735 1870 { 1736 Bs3MemCpy(& This.aInitialCtxs[iRing], &This.aInitialCtxs[iFirstRing], sizeof(This.aInitialCtxs[iRing]));1737 Bs3RegCtxConvertToRingX(& This.aInitialCtxs[iRing], iRing);1871 Bs3MemCpy(&pThis->aInitialCtxs[iRing], &pThis->aInitialCtxs[iFirstRing], sizeof(pThis->aInitialCtxs[iRing])); 1872 Bs3RegCtxConvertToRingX(&pThis->aInitialCtxs[iRing], iRing); 1738 1873 } 1739 1874 for (iRing = iFirstRing; iRing < cRings; iRing++) 1740 1875 { 1741 This.aInitialCtxs[iRing].cs = BS3_SEL_SPARE_00 + iRing * 8 + iRing;1876 pThis->aInitialCtxs[iRing].cs = BS3_SEL_SPARE_00 + iRing * 8 + iRing; 1742 1877 Bs3SelSetup16BitCode(&Bs3GdteSpare00 + iRing, uFlatCodePg, iRing); 1743 1878 } … … 1745 1880 else 1746 1881 { 1747 Bs3RegCtxSetRipCsFromCurPtr(& This.aInitialCtxs[iFirstRing], (FPFNBS3FAR)This.pbCodePg);1882 Bs3RegCtxSetRipCsFromCurPtr(&pThis->aInitialCtxs[iFirstRing], (FPFNBS3FAR)pThis->pbCodePg); 1748 1883 for (iRing = iFirstRing + 1; iRing < cRings; iRing++) 1749 1884 { 1750 Bs3MemCpy(& This.aInitialCtxs[iRing], &This.aInitialCtxs[iFirstRing], sizeof(This.aInitialCtxs[iRing]));1751 Bs3RegCtxConvertToRingX(& This.aInitialCtxs[iRing], iRing);1885 Bs3MemCpy(&pThis->aInitialCtxs[iRing], &pThis->aInitialCtxs[iFirstRing], sizeof(pThis->aInitialCtxs[iRing])); 1886 Bs3RegCtxConvertToRingX(&pThis->aInitialCtxs[iRing], iRing); 1752 1887 } 1753 1888 } … … 1758 1893 for (iInstr = 0; iInstr < g_cBs3Cg1Instructions; 1759 1894 iInstr++, 1760 This.pchMnemonic += This.fAdvanceMnemonic * This.cchMnemonic,1761 This.pabOperands += This.cOperands,1762 This.pabOpcodes += This.cbOpcodes)1895 pThis->pchMnemonic += pThis->fAdvanceMnemonic * pThis->cchMnemonic, 1896 pThis->pabOperands += pThis->cOperands, 1897 pThis->pabOpcodes += pThis->cbOpcodes) 1763 1898 { 1764 1899 unsigned iEncoding; … … 1772 1907 */ 1773 1908 PCBS3CG1INSTR pInstr = &g_aBs3Cg1Instructions[iInstr]; 1774 This.iInstr = iInstr; 1775 This.pTestHdr = (PCBS3CG1TESTHDR)&g_abBs3Cg1Tests[pInstr->offTests]; 1776 This.fFlags = pInstr->fFlags; 1777 This.enmEncoding = (BS3CG1ENC)pInstr->enmEncoding; 1778 This.cchMnemonic = pInstr->cchMnemonic; 1779 if (This.fAdvanceMnemonic) 1780 Bs3TestSubF("%.*s", This.cchMnemonic, This.pchMnemonic); 1781 This.fAdvanceMnemonic = pInstr->fAdvanceMnemonic; 1782 This.cOperands = pInstr->cOperands; 1783 This.cbOpcodes = pInstr->cbOpcodes; 1784 switch (This.cOperands) 1909 pThis->iInstr = iInstr; 1910 pThis->pTestHdr = (PCBS3CG1TESTHDR)&g_abBs3Cg1Tests[pInstr->offTests]; 1911 pThis->fFlags = pInstr->fFlags; 1912 pThis->enmEncoding = (BS3CG1ENC)pInstr->enmEncoding; 1913 pThis->enmCpuTest = (BS3CG1CPU)pInstr->enmCpuTest; 1914 pThis->cchMnemonic = pInstr->cchMnemonic; 1915 if (pThis->fAdvanceMnemonic) 1916 Bs3TestSubF("%s / %.*s", pThis->pszModeShort, pThis->cchMnemonic, pThis->pchMnemonic); 1917 pThis->fAdvanceMnemonic = pInstr->fAdvanceMnemonic; 1918 pThis->cOperands = pInstr->cOperands; 1919 pThis->cbOpcodes = pInstr->cbOpcodes; 1920 switch (pThis->cOperands) 1785 1921 { 1786 case 3: This.aenmOperands[3] = (BS3CG1OP)This.pabOperands[3];1787 case 2: This.aenmOperands[2] = (BS3CG1OP)This.pabOperands[2];1788 case 1: This.aenmOperands[1] = (BS3CG1OP)This.pabOperands[1];1789 case 0: This.aenmOperands[0] = (BS3CG1OP)This.pabOperands[0];1922 case 3: pThis->aenmOperands[3] = (BS3CG1OP)pThis->pabOperands[3]; 1923 case 2: pThis->aenmOperands[2] = (BS3CG1OP)pThis->pabOperands[2]; 1924 case 1: pThis->aenmOperands[1] = (BS3CG1OP)pThis->pabOperands[1]; 1925 case 0: pThis->aenmOperands[0] = (BS3CG1OP)pThis->pabOperands[0]; 1790 1926 } 1791 1927 1792 switch ( This.cbOpcodes)1928 switch (pThis->cbOpcodes) 1793 1929 { 1794 case 3: This.abOpcodes[3] = This.pabOpcodes[3];1795 case 2: This.abOpcodes[2] = This.pabOpcodes[2];1796 case 1: This.abOpcodes[1] = This.pabOpcodes[1];1797 case 0: This.abOpcodes[0] = This.pabOpcodes[0];1930 case 3: pThis->abOpcodes[3] = pThis->pabOpcodes[3]; 1931 case 2: pThis->abOpcodes[2] = pThis->pabOpcodes[2]; 1932 case 1: pThis->abOpcodes[1] = pThis->pabOpcodes[1]; 1933 case 0: pThis->abOpcodes[0] = pThis->pabOpcodes[0]; 1798 1934 } 1799 1935 1800 if ((This.fFlags & BS3CG1INSTR_F_INVALID_64BIT) && BS3_MODE_IS_64BIT_CODE(bMode)) 1936 /* 1937 * Check if the CPU supports the instruction. 1938 */ 1939 if (!Bs3Cg1CpuTestAndEnable(pThis)) 1801 1940 { 1802 1941 fInvalidInstr = true; … … 1807 1946 * Prep the operands and encoding handling. 1808 1947 */ 1809 if (!Bs3Cg1EncodePrep( &This))1948 if (!Bs3Cg1EncodePrep(pThis)) 1810 1949 continue; 1811 1950 … … 1818 1957 * Encode the next instruction variation. 1819 1958 */ 1820 iEncodingNext = Bs3Cg1EncodeNext( &This, iEncoding);1959 iEncodingNext = Bs3Cg1EncodeNext(pThis, iEncoding); 1821 1960 if (iEncodingNext <= iEncoding) 1822 1961 break; 1823 BS3CG1_DPRINTF(("\ndbg: Encoding #%u: cbCurInst=%u: %.*Rhxs\n", iEncoding, This.cbCurInstr, This.cbCurInstr, This.abCurInstr)); 1962 BS3CG1_DPRINTF(("\ndbg: Encoding #%u: cbCurInst=%u: %.*Rhxs\n", 1963 iEncoding, pThis->cbCurInstr, pThis->cbCurInstr, pThis->abCurInstr)); 1824 1964 1825 1965 /* 1826 1966 * Do the rings. 1827 1967 */ 1828 for (iRing = iFirstRing + This.fSameRingNotOkay; iRing < cRings; iRing++)1968 for (iRing = iFirstRing + pThis->fSameRingNotOkay; iRing < cRings; iRing++) 1829 1969 { 1830 1970 PCBS3CG1TESTHDR pHdr; 1831 1971 1832 This.uCpl = iRing;1972 pThis->uCpl = iRing; 1833 1973 BS3CG1_DPRINTF(("dbg: Ring %u\n", iRing)); 1834 1974 … … 1836 1976 * Do the tests one by one. 1837 1977 */ 1838 pHdr = This.pTestHdr;1839 for ( This.iTest = 0;; This.iTest++)1978 pHdr = pThis->pTestHdr; 1979 for (pThis->iTest = 0;; pThis->iTest++) 1840 1980 { 1841 if (Bs3Cg1RunSelector( &This, pHdr))1981 if (Bs3Cg1RunSelector(pThis, pHdr)) 1842 1982 { 1843 1983 /* Okay, set up the execution context. */ 1844 1984 uint8_t BS3_FAR *pbCode; 1845 1985 1846 Bs3MemCpy(& This.Ctx, &This.aInitialCtxs[iRing], sizeof(This.Ctx));1986 Bs3MemCpy(&pThis->Ctx, &pThis->aInitialCtxs[iRing], sizeof(pThis->Ctx)); 1847 1987 if (BS3_MODE_IS_PAGED(bMode)) 1848 pbCode = & This.pbCodePg[X86_PAGE_SIZE - This.cbCurInstr];1988 pbCode = &pThis->pbCodePg[X86_PAGE_SIZE - pThis->cbCurInstr]; 1849 1989 else 1850 1990 { 1851 pbCode = This.pbCodePg;1852 pbCode[ This.cbCurInstr] = 0x0f; /* UD2 */1853 pbCode[ This.cbCurInstr + 1] = 0x0b;1991 pbCode = pThis->pbCodePg; 1992 pbCode[pThis->cbCurInstr] = 0x0f; /* UD2 */ 1993 pbCode[pThis->cbCurInstr + 1] = 0x0b; 1854 1994 } 1855 Bs3MemCpy(pbCode, This.abCurInstr, This.cbCurInstr);1856 This.Ctx.rip.u = BS3_FP_OFF(pbCode);1857 1858 if (Bs3Cg1RunContextModifier( &This, &This.Ctx, pHdr, pHdr->cbSelector, pHdr->cbInput, NULL, pbCode))1995 Bs3MemCpy(pbCode, pThis->abCurInstr, pThis->cbCurInstr); 1996 pThis->Ctx.rip.u = BS3_FP_OFF(pbCode); 1997 1998 if (Bs3Cg1RunContextModifier(pThis, &pThis->Ctx, pHdr, pHdr->cbSelector, pHdr->cbInput, NULL, pbCode)) 1859 1999 { 1860 2000 /* Run the instruction. */ 1861 BS3CG1_DPRINTF(("dbg: Running test #%u\n", This.iTest)); 1862 //Bs3RegCtxPrint(&This.Ctx); 1863 Bs3TrapSetJmpAndRestore(&This.Ctx, &This.TrapFrame); 1864 BS3CG1_DPRINTF(("dbg: bXcpt=%#x rip=%RX64 -> %RX64\n", This.TrapFrame.bXcpt, This.Ctx.rip.u, This.TrapFrame.Ctx.rip.u)); 2001 BS3CG1_DPRINTF(("dbg: Running test #%u\n", pThis->iTest)); 2002 //Bs3RegCtxPrint(&pThis->Ctx); 2003 Bs3TrapSetJmpAndRestore(&pThis->Ctx, &pThis->TrapFrame); 2004 BS3CG1_DPRINTF(("dbg: bXcpt=%#x rip=%RX64 -> %RX64\n", 2005 pThis->TrapFrame.bXcpt, pThis->Ctx.rip.u, pThis->TrapFrame.Ctx.rip.u)); 1865 2006 1866 2007 /* 1867 2008 * Apply the output modification program to the context. 1868 2009 */ 1869 This.Ctx.rflags.u32 &= ~X86_EFL_RF;1870 This.Ctx.rflags.u32 |= This.TrapFrame.Ctx.rflags.u32 & X86_EFL_RF;1871 This.bValueXcpt = UINT8_MAX;2010 pThis->Ctx.rflags.u32 &= ~X86_EFL_RF; 2011 pThis->Ctx.rflags.u32 |= pThis->TrapFrame.Ctx.rflags.u32 & X86_EFL_RF; 2012 pThis->bValueXcpt = UINT8_MAX; 1872 2013 if ( fInvalidInstr 1873 || Bs3Cg1RunContextModifier( &This, &This.Ctx, pHdr,2014 || Bs3Cg1RunContextModifier(pThis, &pThis->Ctx, pHdr, 1874 2015 pHdr->cbSelector + pHdr->cbInput, pHdr->cbOutput, 1875 & This.TrapFrame.Ctx, NULL /*pbCode*/))2016 &pThis->TrapFrame.Ctx, NULL /*pbCode*/)) 1876 2017 { 1877 Bs3Cg1CheckResult( &This, fInvalidInstr, bTestXcptExpected, iEncoding);2018 Bs3Cg1CheckResult(pThis, fInvalidInstr, bTestXcptExpected, iEncoding); 1878 2019 } 1879 2020 } 1880 2021 } 1881 2022 else 1882 BS3CG1_DPRINTF(("dbg: Skipping #%u\n", This.iTest));2023 BS3CG1_DPRINTF(("dbg: Skipping #%u\n", pThis->iTest)); 1883 2024 1884 2025 /* advance */ … … 1896 2037 * Clean up (segment registers, etc). 1897 2038 */ 1898 Bs3Cg1EncodeCleanup( &This);2039 Bs3Cg1EncodeCleanup(pThis); 1899 2040 } 1900 2041 … … 1904 2045 if (BS3_MODE_IS_PAGED(bMode)) 1905 2046 { 1906 Bs3MemGuardedTestPageFree( This.pbCodePg);1907 Bs3MemGuardedTestPageFree( This.pbDataPg);2047 Bs3MemGuardedTestPageFree(pThis->pbCodePg); 2048 Bs3MemGuardedTestPageFree(pThis->pbDataPg); 1908 2049 } 1909 2050 else 1910 2051 { 1911 Bs3MemFree( This.pbCodePg, X86_PAGE_SIZE);1912 Bs3MemFree( This.pbDataPg, X86_PAGE_SIZE);2052 Bs3MemFree(pThis->pbCodePg, X86_PAGE_SIZE); 2053 Bs3MemFree(pThis->pbDataPg, X86_PAGE_SIZE); 1913 2054 } 1914 2055 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66159 r66172 44 44 BS3CG1OP_Eb, 45 45 BS3CG1OP_Ev, 46 BS3CG1OP_Wsd, 46 47 47 48 BS3CG1OP_Gb, 48 49 BS3CG1OP_Gv, 50 51 BS3CG1OP_Vsd, 49 52 50 53 BS3CG1OP_Ib, … … 74 77 BS3CG1ENC_MODRM_Eb_Gb, 75 78 BS3CG1ENC_MODRM_Ev_Gv, 79 BS3CG1ENC_MODRM_Wsd_Vsd, 76 80 77 81 BS3CG1ENC_MODRM_Gb_Eb, … … 100 104 } BS3CGPFXKIND; 101 105 106 /** 107 * CPU selection or CPU ID. 108 */ 109 typedef enum BS3CG1CPU 110 { 111 /** Works with an CPU. */ 112 BS3CG1CPU_ANY = 0, 113 BS3CG1CPU_GE_80186, 114 BS3CG1CPU_GE_80286, 115 BS3CG1CPU_GE_80386, 116 BS3CG1CPU_GE_80486, 117 BS3CG1CPU_GE_Pentium, 118 119 BS3CG1CPU_SSE, 120 BS3CG1CPU_SSE2, 121 BS3CG1CPU_SSE3, 122 BS3CG1CPU_AVX, 123 BS3CG1CPU_AVX2, 124 BS3CG1CPU_END 125 } BS3CG1CPU; 102 126 103 127 /** … … 120 144 /** BS3CGPFXKIND values. */ 121 145 uint32_t enmPrefixKind : 4; 146 /** CPU test / CPU ID bit test (BS3CG1CPU). */ 147 uint32_t enmCpuTest : 6; 122 148 /** Currently unused bits. */ 123 uint32_t uUnused : 1 8;149 uint32_t uUnused : 12; 124 150 /** BS3CG1INSTR_F_XXX. */ 125 151 uint32_t fFlags;
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