Changeset 66242 in vbox
- Timestamp:
- Mar 23, 2017 7:40:32 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 114163
- Location:
- trunk/src/VBox
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r66172 r66242 1130 1130 * @opcpuid sse2 1131 1131 * @opgroup og_sse2_pcksclr_datamov 1132 * @optestign op1=1 op2=2 -> op1=2 1132 * @optest op1=1 op2=2 -> op1=2 1133 * @optest op1=0 op2=-42 -> op1=-42 1133 1134 */ 1134 1135 FNIEMOP_DEF(iemOp_vmovsd_Wsd_Hx_Vsd) -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66241 r66242 77 77 #if 0 78 78 # define BS3CG1_DPRINTF(a_ArgList) Bs3TestPrintf a_ArgList 79 # define BS3CG1_DEBUG_CTX_MOD79 //# define BS3CG1_DEBUG_CTX_MOD 80 80 #else 81 81 # define BS3CG1_DPRINTF(a_ArgList) do { } while (0) … … 1355 1355 1356 1356 /** 1357 * Next CPU configuration to test the current instruction in. 1358 * 1359 * This is for testing FPU, SSE and AVX instructions with the various lazy state 1360 * load and enable bits in different configurations to ensure we're getting the 1361 * right response. 1362 * 1363 * This also cleans up the CPU and test driver state. 1364 * 1365 * @returns true if we're to do another round, false if we're done. 1366 * @param pThis The state. 1367 * @param iCpuSetup The current CPU setup number. 1368 * @param pfInvalidInstr Where to indicate whether the setup causes an 1369 * invalid instruction or not. This is also used as 1370 * input to avoid unnecessary CPUID work. 1371 */ 1372 static bool Bs3Cg1CpuSetupNext(PBS3CG1STATE pThis, unsigned iCpuSetup, bool *pfInvalidInstr) 1373 { 1374 if ( (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT) 1375 && BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 1376 return false; 1377 1378 switch (pThis->enmCpuTest) 1379 { 1380 case BS3CG1CPU_ANY: 1381 case BS3CG1CPU_GE_80186: 1382 case BS3CG1CPU_GE_80286: 1383 case BS3CG1CPU_GE_80386: 1384 case BS3CG1CPU_GE_80486: 1385 case BS3CG1CPU_GE_Pentium: 1386 return false; 1387 1388 case BS3CG1CPU_SSE: 1389 case BS3CG1CPU_SSE2: 1390 case BS3CG1CPU_SSE3: 1391 case BS3CG1CPU_AVX: 1392 case BS3CG1CPU_AVX2: 1393 if (iCpuSetup > 0 || *pfInvalidInstr) 1394 { 1395 /** @todo do more configs here. */ 1396 pThis->fWorkExtCtx = false; 1397 ASMSetCR0(ASMGetCR0() | X86_CR0_EM | X86_CR0_MP); 1398 ASMSetCR4(ASMGetCR4() & ~(X86_CR4_OSFXSR | X86_CR4_OSXMMEEXCPT | X86_CR4_OSXSAVE)); 1399 return false; 1400 } 1401 return false; 1402 1403 default: 1404 Bs3TestFailedF("Invalid enmCpuTest value: %d", pThis->enmCpuTest); 1405 return false; 1406 } 1407 } 1408 1409 1410 /** 1357 1411 * Check if the instruction is supported by the CPU, possibly making state 1358 1412 * adjustments to enable support for it. … … 1361 1415 * @param pThis The state. 1362 1416 */ 1363 static bool Bs3Cg1Cpu TestAndEnable(PBS3CG1STATE pThis)1417 static bool Bs3Cg1CpuSetupFirst(PBS3CG1STATE pThis) 1364 1418 { 1365 1419 uint32_t fEax; … … 1367 1421 uint32_t fEcx; 1368 1422 uint32_t fEdx; 1369 ASMCpuIdExSlow(1, 0, 0, 0, NULL, NULL, &fEcx, &fEdx);1370 1423 1371 1424 if ( (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT) … … 2459 2512 pThis->pabOpcodes += pThis->cbOpcodes) 2460 2513 { 2461 unsigned iEncoding;2462 unsigned iEncodingNext;2463 2514 bool fInvalidInstr = false; 2515 unsigned iCpuSetup; 2464 2516 uint8_t bTestXcptExpected = BS3_MODE_IS_PAGED(pThis->bMode) ? X86_XCPT_PF : X86_XCPT_UD; 2465 2517 … … 2499 2551 * Check if the CPU supports the instruction. 2500 2552 */ 2501 if (!Bs3Cg1Cpu TestAndEnable(pThis))2553 if (!Bs3Cg1CpuSetupFirst(pThis)) 2502 2554 { 2503 2555 fInvalidInstr = true; … … 2505 2557 } 2506 2558 2507 /* 2508 * Prep the operands and encoding handling. 2509 */ 2510 if (!Bs3Cg1EncodePrep(pThis)) 2511 continue; 2512 2513 /* 2514 * Encode the instruction in various ways and check out the test values. 2515 */ 2516 for (iEncoding = 0;; iEncoding = iEncodingNext) 2559 for (iCpuSetup = 0;; iCpuSetup++) 2517 2560 { 2561 unsigned iEncoding; 2562 unsigned iEncodingNext; 2563 2518 2564 /* 2519 * Encode the next instruction variation.2565 * Prep the operands and encoding handling. 2520 2566 */ 2521 iEncodingNext = Bs3Cg1EncodeNext(pThis, iEncoding); 2522 if (iEncodingNext <= iEncoding) 2567 if (!Bs3Cg1EncodePrep(pThis)) 2523 2568 break; 2524 BS3CG1_DPRINTF(("\ndbg: Encoding #%u: cbCurInst=%u: %.*Rhxs\n",2525 iEncoding, pThis->cbCurInstr, pThis->cbCurInstr, pThis->abCurInstr));2526 2569 2527 2570 /* 2528 * Do the rings.2571 * Encode the instruction in various ways and check out the test values. 2529 2572 */ 2530 for (iRing = pThis->iFirstRing + pThis->fSameRingNotOkay; iRing < pThis->iEndRing; iRing++) 2531 { 2532 PCBS3CG1TESTHDR pHdr; 2533 2534 pThis->uCpl = iRing; 2535 BS3CG1_DPRINTF(("dbg: Ring %u\n", iRing)); 2536 2573 for (iEncoding = 0;; iEncoding = iEncodingNext) 2574 { 2537 2575 /* 2538 * Do the tests one by one.2576 * Encode the next instruction variation. 2539 2577 */ 2540 pHdr = pThis->pTestHdr; 2541 for (pThis->iTest = 0;; pThis->iTest++) 2578 iEncodingNext = Bs3Cg1EncodeNext(pThis, iEncoding); 2579 if (iEncodingNext <= iEncoding) 2580 break; 2581 BS3CG1_DPRINTF(("\ndbg: Encoding #%u: cbCurInst=%u: %.*Rhxs\n", 2582 iEncoding, pThis->cbCurInstr, pThis->cbCurInstr, pThis->abCurInstr)); 2583 2584 /* 2585 * Do the rings. 2586 */ 2587 for (iRing = pThis->iFirstRing + pThis->fSameRingNotOkay; iRing < pThis->iEndRing; iRing++) 2542 2588 { 2543 if (Bs3Cg1RunSelector(pThis, pHdr)) 2589 PCBS3CG1TESTHDR pHdr; 2590 2591 pThis->uCpl = iRing; 2592 BS3CG1_DPRINTF(("dbg: Ring %u\n", iRing)); 2593 2594 /* 2595 * Do the tests one by one. 2596 */ 2597 pHdr = pThis->pTestHdr; 2598 for (pThis->iTest = 0;; pThis->iTest++) 2544 2599 { 2545 /* Okay, set up the execution context. */ 2546 unsigned offCode; 2547 uint8_t BS3_FAR *pbCode; 2548 2549 Bs3MemCpy(&pThis->Ctx, &pThis->aInitialCtxs[iRing], sizeof(pThis->Ctx)); 2550 if (pThis->fWorkExtCtx) 2551 Bs3ExtCtxCopy(pThis->pExtCtx, pThis->pInitialExtCtx); 2552 if (BS3_MODE_IS_PAGED(pThis->bMode)) 2600 if (Bs3Cg1RunSelector(pThis, pHdr)) 2553 2601 { 2554 offCode = X86_PAGE_SIZE - pThis->cbCurInstr; 2555 pbCode = &pThis->pbCodePg[offCode]; 2556 //if (iEncoding > 0) { pbCode[-1] = 0xf4; offCode--; } 2602 /* Okay, set up the execution context. */ 2603 unsigned offCode; 2604 uint8_t BS3_FAR *pbCode; 2605 2606 Bs3MemCpy(&pThis->Ctx, &pThis->aInitialCtxs[iRing], sizeof(pThis->Ctx)); 2607 if (pThis->fWorkExtCtx) 2608 Bs3ExtCtxCopy(pThis->pExtCtx, pThis->pInitialExtCtx); 2609 if (BS3_MODE_IS_PAGED(pThis->bMode)) 2610 { 2611 offCode = X86_PAGE_SIZE - pThis->cbCurInstr; 2612 pbCode = &pThis->pbCodePg[offCode]; 2613 //if (iEncoding > 0) { pbCode[-1] = 0xf4; offCode--; } 2614 } 2615 else 2616 { 2617 pbCode = pThis->pbCodePg; 2618 pbCode[pThis->cbCurInstr] = 0x0f; /* UD2 */ 2619 pbCode[pThis->cbCurInstr + 1] = 0x0b; 2620 offCode = 0; 2621 } 2622 pThis->Ctx.rip.u = pThis->CodePgRip + offCode; 2623 Bs3MemCpy(pbCode, pThis->abCurInstr, pThis->cbCurInstr); 2624 2625 if (Bs3Cg1RunContextModifier(pThis, &pThis->Ctx, pHdr, pHdr->cbSelector, pHdr->cbInput, NULL, pbCode)) 2626 { 2627 /* Run the instruction. */ 2628 BS3CG1_DPRINTF(("dbg: Running test #%u\n", pThis->iTest)); 2629 //Bs3RegCtxPrint(&pThis->Ctx); 2630 if (pThis->fWorkExtCtx) 2631 Bs3ExtCtxRestore(pThis->pExtCtx); 2632 Bs3TrapSetJmpAndRestore(&pThis->Ctx, &pThis->TrapFrame); 2633 if (pThis->fWorkExtCtx) 2634 Bs3ExtCtxSave(pThis->pResultExtCtx); 2635 BS3CG1_DPRINTF(("dbg: bXcpt=%#x rip=%RX64 -> %RX64\n", 2636 pThis->TrapFrame.bXcpt, pThis->Ctx.rip.u, pThis->TrapFrame.Ctx.rip.u)); 2637 2638 /* 2639 * Apply the output modification program to the context. 2640 */ 2641 pThis->Ctx.rflags.u32 &= ~X86_EFL_RF; 2642 pThis->Ctx.rflags.u32 |= pThis->TrapFrame.Ctx.rflags.u32 & X86_EFL_RF; 2643 pThis->bValueXcpt = UINT8_MAX; 2644 if ( fInvalidInstr 2645 || Bs3Cg1RunContextModifier(pThis, &pThis->Ctx, pHdr, 2646 pHdr->cbSelector + pHdr->cbInput, pHdr->cbOutput, 2647 &pThis->TrapFrame.Ctx, NULL /*pbCode*/)) 2648 { 2649 Bs3Cg1CheckResult(pThis, fInvalidInstr, bTestXcptExpected, iEncoding); 2650 } 2651 } 2557 2652 } 2558 2653 else 2654 BS3CG1_DPRINTF(("dbg: Skipping #%u\n", pThis->iTest)); 2655 2656 /* advance */ 2657 if (pHdr->fLast) 2559 2658 { 2560 pbCode = pThis->pbCodePg; 2561 pbCode[pThis->cbCurInstr] = 0x0f; /* UD2 */ 2562 pbCode[pThis->cbCurInstr + 1] = 0x0b; 2563 offCode = 0; 2659 BS3CG1_DPRINTF(("dbg: Last\n\n")); 2660 break; 2564 2661 } 2565 pThis->Ctx.rip.u = pThis->CodePgRip + offCode; 2566 Bs3MemCpy(pbCode, pThis->abCurInstr, pThis->cbCurInstr); 2567 2568 if (Bs3Cg1RunContextModifier(pThis, &pThis->Ctx, pHdr, pHdr->cbSelector, pHdr->cbInput, NULL, pbCode)) 2569 { 2570 /* Run the instruction. */ 2571 BS3CG1_DPRINTF(("dbg: Running test #%u\n", pThis->iTest)); 2572 //Bs3RegCtxPrint(&pThis->Ctx); 2573 if (pThis->fWorkExtCtx) 2574 Bs3ExtCtxRestore(pThis->pExtCtx); 2575 Bs3TrapSetJmpAndRestore(&pThis->Ctx, &pThis->TrapFrame); 2576 if (pThis->fWorkExtCtx) 2577 Bs3ExtCtxSave(pThis->pResultExtCtx); 2578 BS3CG1_DPRINTF(("dbg: bXcpt=%#x rip=%RX64 -> %RX64\n", 2579 pThis->TrapFrame.bXcpt, pThis->Ctx.rip.u, pThis->TrapFrame.Ctx.rip.u)); 2580 2581 /* 2582 * Apply the output modification program to the context. 2583 */ 2584 pThis->Ctx.rflags.u32 &= ~X86_EFL_RF; 2585 pThis->Ctx.rflags.u32 |= pThis->TrapFrame.Ctx.rflags.u32 & X86_EFL_RF; 2586 pThis->bValueXcpt = UINT8_MAX; 2587 if ( fInvalidInstr 2588 || Bs3Cg1RunContextModifier(pThis, &pThis->Ctx, pHdr, 2589 pHdr->cbSelector + pHdr->cbInput, pHdr->cbOutput, 2590 &pThis->TrapFrame.Ctx, NULL /*pbCode*/)) 2591 { 2592 Bs3Cg1CheckResult(pThis, fInvalidInstr, bTestXcptExpected, iEncoding); 2593 } 2594 } 2662 pHdr = (PCBS3CG1TESTHDR)((uint8_t BS3_FAR *)(pHdr + 1) + pHdr->cbInput + pHdr->cbOutput + pHdr->cbSelector); 2595 2663 } 2596 else2597 BS3CG1_DPRINTF(("dbg: Skipping #%u\n", pThis->iTest));2598 2599 /* advance */2600 if (pHdr->fLast)2601 {2602 BS3CG1_DPRINTF(("dbg: Last\n\n"));2603 break;2604 }2605 pHdr = (PCBS3CG1TESTHDR)((uint8_t BS3_FAR *)(pHdr + 1) + pHdr->cbInput + pHdr->cbOutput + pHdr->cbSelector);2606 2664 } 2607 2665 } 2666 2667 /* 2668 * Clean up (segment registers, etc) and get the next CPU config. 2669 */ 2670 Bs3Cg1EncodeCleanup(pThis); 2671 if (!Bs3Cg1CpuSetupNext(pThis, iCpuSetup, &fInvalidInstr)) 2672 break; 2608 2673 } 2609 2610 /*2611 * Clean up (segment registers, etc).2612 */2613 Bs3Cg1EncodeCleanup(pThis);2614 2674 } 2615 2675
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