Changeset 66313 in vbox for trunk/src/VBox/VMM

Timestamp:

Mar 28, 2017 7:28:08 PM (8 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

114242

Message:

bs3-cpu-generated-1,IEM: Introducing @opcodesub to more effectively deal with mod=3 vs mod!=3 encoding different instructions; hacked stuff to test unused mod encodings.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllInstructionsPython.py (modified) (5 diffs)
• IEMAllInstructionsTwoByte0f.cpp.h (modified) (6 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py

@@ -257 +257 @@
     '11 mr/reg':    [],
     '!11 mr/reg':   [],
+};
+
+## Special \@opcodesub tag values.
+g_kdSubOpcodes = {
+    'none':         [ None,         ],
+    '11 mr/reg':    [ '11 mr/reg',  ],
+    '11':           [ '11 mr/reg',  ],      ##< alias
+    '!11 mr/reg':   [ '!11 mr/reg', ],
+    '!11':          [ '!11 mr/reg', ],      ##< alias
 };
 
@@ -997 +1006 @@
         self.sPrefix        = None;     ##< Single prefix: None, 'none', 0x66, 0xf3, 0xf2
         self.sOpcode        = None;     # type: str
+        self.sSubOpcode     = None;     # type: str
         self.sEncoding      = None;
         self.asFlTest       = None;
@@ -1273 +1283 @@
             '@opmaps':      self.parseTagOpMaps,
             '@opcode':      self.parseTagOpcode,
+            '@opcodesub':   self.parseTagOpcodeSub,
             '@openc':       self.parseTagOpEnc,
             '@opfltest':    self.parseTagOpEFlags,
@@ -1433 +1444 @@
         if oInstr.sEncoding is None:
             if not oInstr.aoOperands:
-                oInstr.sEncoding = 'fixed';
+                if oInstr.fUnused and oInstr.sSubOpcode:
+                    oInstr.sEncoding = 'ModR/M';
+                else:
+                    oInstr.sEncoding = 'fixed';
             elif oInstr.aoOperands[0].usesModRM():
                 if len(oInstr.aoOperands) >= 2 and oInstr.aoOperands[1].sWhere == 'vvvv':
@@ -1781 +1795 @@
             return self.errorComment(iTagLine, '%s: attempting to overwrite "%s" with "%s"' % ( sTag, oInstr.sOpcode, sOpcode,));
         oInstr.sOpcode = sOpcode;
+
+        _ = iEndLine;
+        return True;
+
+    def parseTagOpcodeSub(self, sTag, aasSections, iTagLine, iEndLine):
+        """
+        Tag:        \@opcodesub
+        Value:      none | 11 mr/reg | !11 mr/reg
+
+        This is a simple way of dealing with encodings where the mod=3 and mod!=3
+        represents exactly two different instructions.  The more proper way would
+        be to go via maps with two members, but this is faster.
+        """
+        oInstr = self.ensureInstructionForOpTag(iTagLine);
+
+        # Flatten and validate the value.
+        sSubOpcode = self.flattenAllSections(aasSections);
+        if sSubOpcode not in g_kdSubOpcodes:
+            return self.errorComment(iTagLine, '%s: invalid sub opcode: %s  (valid: 11, !11, none)' % (sTag, sSubOpcode,));
+        sSubOpcode = g_kdSubOpcodes[sSubOpcode][0];
+
+        # Set it.
+        if oInstr.sSubOpcode is not None:
+            return self.errorComment(iTagLine, '%s: attempting to overwrite "%s" with "%s"'
+                                               % ( sTag, oInstr.sSubOpcode, sSubOpcode,));
+        oInstr.sSubOpcode = sSubOpcode;
 
         _ = iEndLine;

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h

@@ -1293 +1293 @@
         /**
          * @opcode      0x12
+         * @opcodesub   11 mr/reg
          * @oppfx       none
          * @opcpuid     sse
@@ -1299 +1300 @@
          * @optest      op1=1 op2=2 -> op1=2
          * @optest      op1=0 op2=-42 -> op1=-42
-         * @oponlytest
          */
         IEMOP_MNEMONIC2(RM_REG, MOVHLPS, movhlps, Vq, UqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
@@ -1320 +1320 @@
          * @opdone
          * @opcode      0x12
+         * @opcodesub   !11 mr/reg
          * @oppfx       none
          * @opcpuid     sse
@@ -1327 +1328 @@
          * @optest      op1=0 op2=-42 -> op1=-42
          * @opfunction  iemOp_vmovlps_Vq_Hq_Mq__vmovhlps
-         * @oponlytest
          */
         IEMOP_MNEMONIC2(RM_MEM, MOVLPS, movlps, Vq, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
@@ -1350 +1350 @@
 
 
+/**
+ * @opcode      0x12
+ * @opcodesub   !11 mr/reg
+ * @oppfx       0x66
+ * @opcpuid     sse2
+ * @opgroup     og_sse2_pcksclr_datamove
+ * @opxcpttype  5
+ * @optest      op1=1 op2=2 -> op1=2
+ * @optest      op1=0 op2=-42 -> op1=-42
+ */
 FNIEMOP_DEF(iemOp_vmovlpd_Vq_Hq_Mq)
 {
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
-    if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
-    {
-        /**
-         * @todo figure this out!
-         * opcode      0x12
-         * todo        11 /reg
-         * oppfx       0x66
-         * openc       ModR/M
-         * opcpuid     sse2
-         * opgroup     og_sse_simdfp_datamove
-         * opunused    immediate
-         * optest      op1=1 op2=2 -> op1=2
-         * oponlytest
-         */
-        return IEMOP_RAISE_INVALID_OPCODE();
-    }
-    else
-    {
-        /**
-         * @opdone
-         * @opcode      0x12
-         * @oppfx       0x66
-         * @opcpuid     sse2
-         * @opgroup     og_sse2_pcksclr_datamove
-         * @opxcpttype  5
-         * @optest      op1=1 op2=2 -> op1=2
-         * @optest      op1=0 op2=-42 -> op1=-42
-         * @opfunction  iemOp_vmovlpd_Vq_Hq_Mq
-         * @oponlytest
-         */
+    if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
+    {
         IEMOP_MNEMONIC2(RM_MEM, MOVLPD, movlpd, Vq, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
 
@@ -1399 +1381 @@
         IEM_MC_ADVANCE_RIP();
         IEM_MC_END();
-    }
-    return VINF_SUCCESS;
+        return VINF_SUCCESS;
+    }
+
+    /**
+     * @opdone
+     * @opmnemonic  ud660f12m3
+     * @opcode      0x12
+     * @opcodesub   11 mr/reg
+     * @oppfx       0x66
+     * @opunused    immediate
+     * @opcpuid     sse
+     * @optest      ->
+     */
+    return IEMOP_RAISE_INVALID_OPCODE();
 }