Changeset 66391 in vbox for trunk/src/VBox/ValidationKit

Timestamp:

Apr 2, 2017 2:56:59 PM (8 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

114343

Message:

IEM: Implemented stmxcsr Md (0f ae !11/3).

Location:

trunk/src/VBox/ValidationKit/bootsectors

Files:

• bs3-cpu-generated-1-template.c (modified) (5 diffs)
• bs3-cpu-generated-1.h (modified) (3 diffs)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

@@ -405 +405 @@
     /* [BS3CG1DST_FPUDS] = */       2,
     /* [BS3CG1DST_MXCSR] = */       4,
-    /* [BS3CG1DST_MXCSR_MASK] = */  4,
     /* [BS3CG1DST_ST0] = */         12,
     /* [BS3CG1DST_ST1] = */         12,
@@ -633 +632 @@
     /* [BS3CG1DST_FPUDS] = */       sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.DS),
     /* [BS3CG1DST_MXCSR] = */       sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.MXCSR),
-    /* [BS3CG1DST_MXCSR_MASK] = */  sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.MXCSR_MASK),
     /* [BS3CG1DST_ST0] = */         sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[0]),
     /* [BS3CG1DST_ST1] = */         sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[1]),
@@ -1558 +1556 @@
             break;
 
+        case BS3CG1ENC_MODRM_MdWO:
+            if (iEncoding == 0)
+            {
+                off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)) - 1;
+                off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off,
+                                               (pThis->abCurInstr[off] & X86_MODRM_REG_MASK) >> X86_MODRM_REG_SHIFT,
+                                               4, 0, BS3CG1OPLOC_MEM_RW);
+            }
+            else
+                break;
+            pThis->cbCurInstr = off;
+            iEncoding++;
+            break;
 
         case BS3CG1ENC_FIXED:
@@ -1826 +1837 @@
             pThis->aOperands[0].cbOp = 1;
             pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM;
+            break;
+
+        case BS3CG1ENC_MODRM_MdWO:
+            pThis->iRmOp             = 0;
+            pThis->aOperands[0].cbOp = 4;
+            pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM_RW;
             break;
 
@@ -2675 +2692 @@
                 //CHECK_FIELD(x87.Rsrvd2,   "Rsrvd2: %#06x, expected %#06x");
                 CHECK_FIELD(x87.MXCSR,      "MXCSR:  %#010x, expected %#010x");
-                //CHECK_FIELD(x87.MXCSR_MASK, "MXCSR_MASK: %#010x, expected %#010x");
 #undef CHECK_FIELD
                 for (i = 0; i < RT_ELEMENTS(pExpect->Ctx.x87.aRegs); i++)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

@@ -70 +70 @@
     BS3CG1OP_Ma,
     BS3CG1OP_MbRO,
+    BS3CG1OP_MdWO,
     BS3CG1OP_Mq,
 
@@ -103 +104 @@
     BS3CG1ENC_MODRM_Vdq_Wdq,
     BS3CG1ENC_MODRM_MbRO,
+    BS3CG1ENC_MODRM_MdWO,
 
     BS3CG1ENC_FIXED,
@@ -420 +422 @@
     BS3CG1DST_FPUDS,
     BS3CG1DST_MXCSR,
-    BS3CG1DST_MXCSR_MASK,
     BS3CG1DST_ST0,
     BS3CG1DST_ST1,