Changeset 66747 in vbox
- Timestamp:
- May 2, 2017 2:00:02 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 115155
- Location:
- trunk
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/disopcode.h
r66746 r66747 1071 1071 #define OP_PARM_MdRO OP_PARM_Md /**< Annotates read only memory byte operand. */ 1072 1072 #define OP_PARM_MdWO OP_PARM_Md /**< Annotates write only memory byte operand. */ 1073 #define OP_PARM_MqWO OP_PARM_Mq /**< Annotates write only memory quad word operand. */ 1073 1074 #define OP_PARM_MRO OP_PARM_M /**< Annotates read only memory of variable operand size (xrstor). */ 1074 1075 #define OP_PARM_MRW OP_PARM_M /**< Annotates read-write memory of variable operand size (xsave). */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r66746 r66747 233 233 'MdWO': ( 'IDX_UseModRM', 'rm', '%Md', 'Md', ), 234 234 'Mq': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ), 235 'MqWO': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ), 235 236 'MRO': ( 'IDX_UseModRM', 'rm', '%M', 'M', ), 236 237 'MRW': ( 'IDX_UseModRM', 'rm', '%M', 'M', ), -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r66746 r66747 1156 1156 * @optest op1=0 op2=-42 -> op1=-42 1157 1157 */ 1158 FNIEMOP_DEF(iemOp_movsd_V x_Wsd)1158 FNIEMOP_DEF(iemOp_movsd_Vsd_Wsd) 1159 1159 { 1160 1160 IEMOP_MNEMONIC2(RM, MOVSD, movsd, VsdZxReg, Wsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); … … 1642 1642 1643 1643 1644 /** Opcode 0x0f 0x13 - vmovlps Mq, Vq */ 1645 FNIEMOP_STUB(iemOp_movlps_Mq_Vq); 1644 /** 1645 * @opdone 1646 * @opcode 0x13 1647 * @opcodesub !11 mr/reg 1648 * @oppfx none 1649 * @opcpuid sse 1650 * @opgroup og_sse_simdfp_datamove 1651 * @opxcpttype 5 1652 * @optest op1=1 op2=2 -> op1=2 1653 * @optest op1=0 op2=-42 -> op1=-42 1654 */ 1655 FNIEMOP_DEF(iemOp_movlps_Mq_Vq) 1656 { 1657 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1658 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1659 { 1660 IEMOP_MNEMONIC2(MR_MEM, MOVLPS, movlps, MqWO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1661 1662 IEM_MC_BEGIN(0, 2); 1663 IEM_MC_LOCAL(uint64_t, uSrc); 1664 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 1665 1666 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1667 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1668 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1669 IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ(); 1670 1671 IEM_MC_FETCH_XREG_U64(uSrc, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 1672 IEM_MC_STORE_MEM_U64(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 1673 1674 IEM_MC_ADVANCE_RIP(); 1675 IEM_MC_END(); 1676 return VINF_SUCCESS; 1677 } 1678 1679 /** 1680 * @opdone 1681 * @opmnemonic ud0f13m3 1682 * @opcode 0x13 1683 * @opcodesub 11 mr/reg 1684 * @oppfx none 1685 * @opunused immediate 1686 * @opcpuid sse 1687 * @optest -> 1688 */ 1689 return IEMOP_RAISE_INVALID_OPCODE(); 1690 } 1646 1691 1647 1692 /** Opcode 0x66 0x0f 0x13 - vmovlpd Mq, Vq */ … … 8424 8469 /* 0x0f */ IEMOP_X4(iemOp_3Dnow), 8425 8470 8426 /* 0x10 */ iemOp_movups_Vps_Wps, iemOp_movupd_Vpd_Wpd, iemOp_movss_Vss_Wss, iemOp_movsd_V x_Wsd,8471 /* 0x10 */ iemOp_movups_Vps_Wps, iemOp_movupd_Vpd_Wpd, iemOp_movss_Vss_Wss, iemOp_movsd_Vsd_Wsd, 8427 8472 /* 0x11 */ iemOp_movups_Wps_Vps, iemOp_movupd_Wpd_Vpd, iemOp_movss_Wss_Vss, iemOp_movsd_Wsd_Vsd, 8428 8473 /* 0x12 */ iemOp_movlps_Vq_Mq__movhlps, iemOp_movlpd_Vq_Mq, iemOp_movsldup_Vdq_Wdq, iemOp_movddup_Vdq_Wdq, -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66746 r66747 1944 1944 1945 1945 1946 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_MqWO_Vq(PBS3CG1STATE pThis, unsigned iEncoding) 1947 { 1948 unsigned off; 1949 if (iEncoding == 0) 1950 { 1951 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2_LO; 1952 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1953 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 8, 0, BS3CG1OPLOC_MEM_RW); 1954 } 1955 else if (iEncoding == 1) 1956 { 1957 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO; 1958 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1959 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_RW); 1960 } 1961 else 1962 return 0; 1963 pThis->cbCurInstr = off; 1964 return iEncoding + 1; 1965 } 1966 1967 1946 1968 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_BS3CG1ENC_FIXED(PBS3CG1STATE pThis, unsigned iEncoding) 1947 1969 { … … 2149 2171 case BS3CG1ENC_VEX_MODRM_MdWO: 2150 2172 return Bs3Cg1EncodeNext_BS3CG1ENC_VEX_MODRM_MdWO(pThis, iEncoding); 2173 case BS3CG1ENC_MODRM_MqWO_Vq: 2174 return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_MqWO_Vq(pThis, iEncoding); 2151 2175 2152 2176 case BS3CG1ENC_FIXED: … … 2346 2370 pThis->aOperands[0].cbOp = 4; 2347 2371 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM_RW; 2372 break; 2373 2374 case BS3CG1ENC_MODRM_MqWO_Vq: 2375 pThis->iRmOp = 0; 2376 pThis->iRegOp = 1; 2377 pThis->aOperands[0].cbOp = 8; 2378 pThis->aOperands[1].cbOp = 8; 2379 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM_RW; 2380 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 2348 2381 break; 2349 2382 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66746 r66747 75 75 BS3CG1OP_MdWO, 76 76 BS3CG1OP_Mq, 77 BS3CG1OP_MqWO, 77 78 78 79 BS3CG1OP_END … … 113 114 BS3CG1ENC_MODRM_MdRO, 114 115 BS3CG1ENC_MODRM_MdWO, 116 BS3CG1ENC_MODRM_MqWO_Vq, 115 117 116 118 BS3CG1ENC_VEX_MODRM_MdWO,
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