Changeset 66748 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- May 2, 2017 2:36:39 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 115156
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r66747 r66748 1643 1643 1644 1644 /** 1645 * @opdone1646 1645 * @opcode 0x13 1647 1646 * @opcodesub !11 mr/reg … … 1690 1689 } 1691 1690 1692 /** Opcode 0x66 0x0f 0x13 - vmovlpd Mq, Vq */ 1691 1692 /** 1693 * @opcode 0x13 1694 * @opcodesub !11 mr/reg 1695 * @oppfx 0x66 1696 * @opcpuid sse 1697 * @opgroup og_sse_simdfp_datamove 1698 * @opxcpttype 5 1699 * @optest op1=1 op2=2 -> op1=2 1700 * @optest op1=0 op2=-42 -> op1=-42 1701 */ 1693 1702 FNIEMOP_DEF(iemOp_movlpd_Mq_Vq) 1694 1703 { 1695 IEMOP_MNEMONIC(movlpd_Mq_Vq, "movlpd Mq,Vq"); 1696 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1697 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 1698 { 1699 #if 0 1700 /* 1701 * Register, register. 1702 */ 1703 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1704 IEM_MC_BEGIN(0, 1); 1705 IEM_MC_LOCAL(uint64_t, uSrc); 1706 IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT(); 1707 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 1708 IEM_MC_FETCH_XREG_U64(uSrc, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 1709 IEM_MC_STORE_XREG_U64((bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB, uSrc); 1710 IEM_MC_ADVANCE_RIP(); 1711 IEM_MC_END(); 1712 #else 1713 return IEMOP_RAISE_INVALID_OPCODE(); 1714 #endif 1715 } 1716 else 1717 { 1718 /* 1719 * Memory, register. 1720 */ 1704 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1705 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1706 { 1707 IEMOP_MNEMONIC2(MR_MEM, MOVLPD, movlpd, MqWO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1721 1708 IEM_MC_BEGIN(0, 2); 1722 1709 IEM_MC_LOCAL(uint64_t, uSrc); … … 1733 1720 IEM_MC_ADVANCE_RIP(); 1734 1721 IEM_MC_END(); 1735 } 1736 return VINF_SUCCESS; 1737 } 1738 1739 /* Opcode 0xf3 0x0f 0x13 - invalid */ 1740 /* Opcode 0xf2 0x0f 0x13 - invalid */ 1722 return VINF_SUCCESS; 1723 } 1724 1725 /** 1726 * @opdone 1727 * @opmnemonic ud660f13m3 1728 * @opcode 0x13 1729 * @opcodesub 11 mr/reg 1730 * @oppfx 0x66 1731 * @opunused immediate 1732 * @opcpuid sse 1733 * @optest -> 1734 */ 1735 return IEMOP_RAISE_INVALID_OPCODE(); 1736 } 1737 1738 1739 /** 1740 * @opmnemonic udf30f13 1741 * @opcode 0x13 1742 * @oppfx 0xf3 1743 * @opunused intel-modrm 1744 * @opcpuid sse 1745 * @optest -> 1746 * @opdone 1747 */ 1748 1749 /** 1750 * @opmnemonic udf20f13 1751 * @opcode 0x13 1752 * @oppfx 0xf2 1753 * @opunused intel-modrm 1754 * @opcpuid sse 1755 * @optest -> 1756 * @opdone 1757 */ 1741 1758 1742 1759 /** Opcode 0x0f 0x14 - unpcklps Vx, Wx*/ … … 1744 1761 /** Opcode 0x66 0x0f 0x14 - unpcklpd Vx, Wx */ 1745 1762 FNIEMOP_STUB(iemOp_unpcklpd_Vx_Wx); 1746 /* Opcode 0xf3 0x0f 0x14 - invalid */ 1747 /* Opcode 0xf2 0x0f 0x14 - invalid */ 1763 1764 /** 1765 * @opdone 1766 * @opmnemonic udf30f14 1767 * @opcode 0x14 1768 * @oppfx 0xf3 1769 * @opunused intel-modrm 1770 * @opcpuid sse 1771 * @optest -> 1772 * @opdone 1773 */ 1774 1775 /** 1776 * @opmnemonic udf20f14 1777 * @opcode 0x14 1778 * @oppfx 0xf2 1779 * @opunused intel-modrm 1780 * @opcpuid sse 1781 * @optest -> 1782 * @opdone 1783 */ 1784 1748 1785 /** Opcode 0x0f 0x15 - unpckhps Vx, Wx */ 1749 1786 FNIEMOP_STUB(iemOp_unpckhps_Vx_Wx); … … 1752 1789 /* Opcode 0xf3 0x0f 0x15 - invalid */ 1753 1790 /* Opcode 0xf2 0x0f 0x15 - invalid */ 1791 1792 /** 1793 * @opdone 1794 * @opmnemonic udf30f15 1795 * @opcode 0x15 1796 * @oppfx 0xf3 1797 * @opunused intel-modrm 1798 * @opcpuid sse 1799 * @optest -> 1800 * @opdone 1801 */ 1802 1803 /** 1804 * @opmnemonic udf20f15 1805 * @opcode 0x15 1806 * @oppfx 0xf2 1807 * @opunused intel-modrm 1808 * @opcpuid sse 1809 * @optest -> 1810 * @opdone 1811 */ 1812 1754 1813 /** Opcode 0x0f 0x16 - movhpsv1 Vdq, Mq movlhps Vdq, Uq */ 1755 1814 FNIEMOP_STUB(iemOp_movhpsv1_Vdq_Mq__movlhps_Vdq_Uq); //NEXT … … 1758 1817 /** Opcode 0xf3 0x0f 0x16 - movshdup Vx, Wx */ 1759 1818 FNIEMOP_STUB(iemOp_movshdup_Vx_Wx); //NEXT 1760 /* Opcode 0xf2 0x0f 0x16 - invalid */ 1819 1820 /** 1821 * @opdone 1822 * @opmnemonic udf30f16 1823 * @opcode 0x16 1824 * @oppfx 0xf2 1825 * @opunused intel-modrm 1826 * @opcpuid sse 1827 * @optest -> 1828 * @opdone 1829 */ 1830 1761 1831 /** Opcode 0x0f 0x17 - movhpsv1 Mq, Vq */ 1762 1832 FNIEMOP_STUB(iemOp_movhpsv1_Mq_Vq); //NEXT 1763 1833 /** Opcode 0x66 0x0f 0x17 - movhpdv1 Mq, Vq */ 1764 1834 FNIEMOP_STUB(iemOp_movhpdv1_Mq_Vq); //NEXT 1765 /* Opcode 0xf3 0x0f 0x17 - invalid */ 1766 /* Opcode 0xf2 0x0f 0x17 - invalid */ 1835 1836 /** 1837 * @opdone 1838 * @opmnemonic udf30f17 1839 * @opcode 0x17 1840 * @oppfx 0xf3 1841 * @opunused intel-modrm 1842 * @opcpuid sse 1843 * @optest -> 1844 * @opdone 1845 */ 1846 1847 /** 1848 * @opmnemonic udf20f17 1849 * @opcode 0x17 1850 * @oppfx 0xf2 1851 * @opunused intel-modrm 1852 * @opcpuid sse 1853 * @optest -> 1854 * @opdone 1855 */ 1767 1856 1768 1857
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