VirtualBox

Changeset 66812 in vbox for trunk/include


Ignore:
Timestamp:
May 5, 2017 6:48:33 PM (8 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
115233
Message:

IEM: clearly mark operands that are written to.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/disopcode.h

    r66810 r66812  
    10641064
    10651065/* For making IEM / bs3-cpu-generated-1 happy: */
     1066#define OP_PARM_M_RO            OP_PARM_M               /**< Annotates read only memory of variable operand size (xrstor). */
     1067#define OP_PARM_M_RW            OP_PARM_M               /**< Annotates read-write memory of variable operand size (xsave). */
     1068#define OP_PARM_Mb_RO           OP_PARM_Mb              /**< Annotates read only memory byte operand. */
     1069#define OP_PARM_Md_RO           OP_PARM_Md              /**< Annotates read only memory byte operand. */
     1070#define OP_PARM_Md_WO           OP_PARM_Md              /**< Annotates write only memory byte operand. */
     1071#define OP_PARM_Mq_WO           OP_PARM_Mq              /**< Annotates write only memory quad word operand. */
     1072#define OP_PARM_Pq_WO           OP_PARM_Pq              /**< Annotates write only operand. */
     1073#define OP_PARM_Nq              OP_PARM_Qq              /**< Missing 'N' class (MMX reg selected by modrm.mem) in disasm. */
    10661074#define OP_PARM_Uq              (OP_PARM_U+OP_PARM_q)
    10671075#define OP_PARM_UqHi            (OP_PARM_U+OP_PARM_dq)
    1068 #define OP_PARM_WqZxReg         OP_PARM_Wq              /**< Annotates that register targets get their upper bits cleared. */
    1069 #define OP_PARM_VssZxReg        OP_PARM_Vss             /**< Annotates that register targets get their upper bits cleared. */
    1070 #define OP_PARM_VsdZxReg        OP_PARM_Vsd             /**< Annotates that register targets get their upper bits cleared. */
     1076#define OP_PARM_Vdq_WO          OP_PARM_Vdq             /**< Annotates that only YMM/XMM[127:64] are accessed. */
     1077#define OP_PARM_Vpd_WO          OP_PARM_Vpd             /**< Annotates write only operand. */
     1078#define OP_PARM_Vps_WO          OP_PARM_Vps             /**< Annotates write only operand. */
     1079#define OP_PARM_Vq_WO           OP_PARM_Vq              /**< Annotates write only operand. */
    10711080#define OP_PARM_VqHi            OP_PARM_Vdq             /**< Annotates that only YMM/XMM[127:64] are accessed. */
    1072 #define OP_PARM_VqZxReg         OP_PARM_Vq              /**< Annotates that register targets get their upper bits cleared */
    1073 #define OP_PARM_MbRO            OP_PARM_Mb              /**< Annotates read only memory byte operand. */
    1074 #define OP_PARM_MdRO            OP_PARM_Md              /**< Annotates read only memory byte operand. */
    1075 #define OP_PARM_MdWO            OP_PARM_Md              /**< Annotates write only memory byte operand. */
    1076 #define OP_PARM_MqWO            OP_PARM_Mq              /**< Annotates write only memory quad word operand. */
    1077 #define OP_PARM_MRO             OP_PARM_M               /**< Annotates read only memory of variable operand size (xrstor). */
    1078 #define OP_PARM_MRW             OP_PARM_M               /**< Annotates read-write memory of variable operand size (xsave). */
    1079 #define OP_PARM_Nq              OP_PARM_Qq              /**< Missing 'N' class (MMX reg selected by modrm.mem) in disasm. */
     1081#define OP_PARM_VqHi_WO         OP_PARM_Vdq             /**< Annotates that only YMM/XMM[127:64] are written. */
     1082#define OP_PARM_VqZxReg_WO      OP_PARM_Vq              /**< Annotates that register targets get their upper bits cleared */
     1083#define OP_PARM_VsdZxReg_WO     OP_PARM_Vsd             /**< Annotates that register targets get their upper bits cleared. */
     1084#define OP_PARM_VsdZxReg_WO     OP_PARM_Vsd             /**< Annotates that register targets get their upper bits cleared. */
     1085#define OP_PARM_VssZxReg_WO     OP_PARM_Vss             /**< Annotates that register targets get their upper bits cleared. */
     1086#define OP_PARM_Wpd_WO          OP_PARM_Wpd             /**< Annotates write only operand. */
     1087#define OP_PARM_Wps_WO          OP_PARM_Wps             /**< Annotates write only operand. */
     1088#define OP_PARM_WqZxReg_WO      OP_PARM_Wq              /**< Annotates that register targets get their upper bits cleared. */
     1089#define OP_PARM_Wss_WO          OP_PARM_Wss             /**< Annotates write only operand. */
     1090#define OP_PARM_Wsd_WO          OP_PARM_Wsd             /**< Annotates write only operand. */
     1091
    10801092
    10811093/** @} */
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette