Changeset 66812 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- May 5, 2017 6:48:33 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 115233
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r66811 r66812 210 210 g_kdOpTypes = { 211 211 # Fixed addresses 212 'Ap': ( 'IDX_ParseImmAddrF', 'imm', '%Ap', 'Ap', ),212 'Ap': ( 'IDX_ParseImmAddrF', 'imm', '%Ap', 'Ap', ), 213 213 214 214 # ModR/M.rm 215 'Eb': ( 'IDX_UseModRM', 'rm', '%Eb', 'Eb', ), 216 'Ew': ( 'IDX_UseModRM', 'rm', '%Ew', 'Ew', ), 217 'Ev': ( 'IDX_UseModRM', 'rm', '%Ev', 'Ev', ), 218 'Wss': ( 'IDX_UseModRM', 'rm', '%Wss', 'Wss', ), 219 'Wsd': ( 'IDX_UseModRM', 'rm', '%Wsd', 'Wsd', ), 220 'Wps': ( 'IDX_UseModRM', 'rm', '%Wps', 'Wps', ), 221 'Wpd': ( 'IDX_UseModRM', 'rm', '%Wpd', 'Wpd', ), 222 'Wdq': ( 'IDX_UseModRM', 'rm', '%Wdq', 'Wdq', ), 223 'Wq': ( 'IDX_UseModRM', 'rm', '%Wq', 'Wq', ), 224 'WqZxReg': ( 'IDX_UseModRM', 'rm', '%Wq', 'Wq', ), 215 'Eb': ( 'IDX_UseModRM', 'rm', '%Eb', 'Eb', ), 216 'Ew': ( 'IDX_UseModRM', 'rm', '%Ew', 'Ew', ), 217 'Ev': ( 'IDX_UseModRM', 'rm', '%Ev', 'Ev', ), 218 'Wss': ( 'IDX_UseModRM', 'rm', '%Wss', 'Wss', ), 219 'Wss_WO': ( 'IDX_UseModRM', 'rm', '%Wss', 'Wss', ), 220 'Wsd': ( 'IDX_UseModRM', 'rm', '%Wsd', 'Wsd', ), 221 'Wsd_WO': ( 'IDX_UseModRM', 'rm', '%Wsd', 'Wsd', ), 222 'Wps': ( 'IDX_UseModRM', 'rm', '%Wps', 'Wps', ), 223 'Wps_WO': ( 'IDX_UseModRM', 'rm', '%Wps', 'Wps', ), 224 'Wpd': ( 'IDX_UseModRM', 'rm', '%Wpd', 'Wpd', ), 225 'Wpd_WO': ( 'IDX_UseModRM', 'rm', '%Wpd', 'Wpd', ), 226 'Wdq': ( 'IDX_UseModRM', 'rm', '%Wdq', 'Wdq', ), 227 'Wdq_WO': ( 'IDX_UseModRM', 'rm', '%Wdq', 'Wdq', ), 228 'Wq': ( 'IDX_UseModRM', 'rm', '%Wq', 'Wq', ), 229 'WqZxReg_WO': ( 'IDX_UseModRM', 'rm', '%Wq', 'Wq', ), 225 230 226 231 # ModR/M.rm - register only. 227 'Uq': ( 'IDX_UseModRM', 'rm', '%Uq', 'Uq', ),228 'UqHi': ( 'IDX_UseModRM', 'rm', '%Uq', 'UqHi', ),229 'Nq': ( 'IDX_UseModRM', 'rm', '%Qq', 'Nq', ),232 'Uq': ( 'IDX_UseModRM', 'rm', '%Uq', 'Uq', ), 233 'UqHi': ( 'IDX_UseModRM', 'rm', '%Uq', 'UqHi', ), 234 'Nq': ( 'IDX_UseModRM', 'rm', '%Qq', 'Nq', ), 230 235 231 236 # ModR/M.rm - memory only. 232 'Ma': ( 'IDX_UseModRM', 'rm', '%Ma', 'Ma', ), ##< Only used by BOUND.233 'Mb RO':( 'IDX_UseModRM', 'rm', '%Mb', 'Mb', ),234 'Md RO':( 'IDX_UseModRM', 'rm', '%Md', 'Md', ),235 'Md WO':( 'IDX_UseModRM', 'rm', '%Md', 'Md', ),236 'Mq': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ),237 'Mq WO':( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ),238 'M RO':( 'IDX_UseModRM', 'rm', '%M', 'M', ),239 'M RW':( 'IDX_UseModRM', 'rm', '%M', 'M', ),237 'Ma': ( 'IDX_UseModRM', 'rm', '%Ma', 'Ma', ), ##< Only used by BOUND. 238 'Mb_RO': ( 'IDX_UseModRM', 'rm', '%Mb', 'Mb', ), 239 'Md_RO': ( 'IDX_UseModRM', 'rm', '%Md', 'Md', ), 240 'Md_WO': ( 'IDX_UseModRM', 'rm', '%Md', 'Md', ), 241 'Mq': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ), 242 'Mq_WO': ( 'IDX_UseModRM', 'rm', '%Mq', 'Mq', ), 243 'M_RO': ( 'IDX_UseModRM', 'rm', '%M', 'M', ), 244 'M_RW': ( 'IDX_UseModRM', 'rm', '%M', 'M', ), 240 245 241 246 # ModR/M.reg 242 'Gb': ( 'IDX_UseModRM', 'reg', '%Gb', 'Gb', ), 243 'Gw': ( 'IDX_UseModRM', 'reg', '%Gw', 'Gw', ), 244 'Gv': ( 'IDX_UseModRM', 'reg', '%Gv', 'Gv', ), 245 'Pq': ( 'IDX_UseModRM', 'reg', '%Pq', 'Pq', ), 246 'Vss': ( 'IDX_UseModRM', 'reg', '%Vss', 'Vss', ), 247 'VssZxReg': ( 'IDX_UseModRM', 'reg', '%Vss', 'Vss', ), 248 'Vsd': ( 'IDX_UseModRM', 'reg', '%Vsd', 'Vsd', ), 249 'VsdZxReg': ( 'IDX_UseModRM', 'reg', '%Vsd', 'Vsd', ), 250 'Vps': ( 'IDX_UseModRM', 'reg', '%Vps', 'Vps', ), 251 'Vpd': ( 'IDX_UseModRM', 'reg', '%Vpd', 'Vpd', ), 252 'Vq': ( 'IDX_UseModRM', 'reg', '%Vq', 'Vq', ), 253 'Vdq': ( 'IDX_UseModRM', 'reg', '%Vdq', 'Vdq', ), 254 'VqHi': ( 'IDX_UseModRM', 'reg', '%Vdq', 'VdqHi', ), 255 'VqZxReg': ( 'IDX_UseModRM', 'reg', '%Vq', 'VqZx', ), 247 'Gb': ( 'IDX_UseModRM', 'reg', '%Gb', 'Gb', ), 248 'Gw': ( 'IDX_UseModRM', 'reg', '%Gw', 'Gw', ), 249 'Gv': ( 'IDX_UseModRM', 'reg', '%Gv', 'Gv', ), 250 'Pq_WO': ( 'IDX_UseModRM', 'reg', '%Pq', 'Pq', ), 251 'Vss': ( 'IDX_UseModRM', 'reg', '%Vss', 'Vss', ), 252 'VssZxReg_WO': ( 'IDX_UseModRM', 'reg', '%Vss', 'Vss', ), 253 'Vsd': ( 'IDX_UseModRM', 'reg', '%Vsd', 'Vsd', ), 254 'VsdZxReg_WO': ( 'IDX_UseModRM', 'reg', '%Vsd', 'Vsd', ), 255 'Vps': ( 'IDX_UseModRM', 'reg', '%Vps', 'Vps', ), 256 'Vps_WO': ( 'IDX_UseModRM', 'reg', '%Vps', 'Vps', ), 257 'Vpd': ( 'IDX_UseModRM', 'reg', '%Vpd', 'Vpd', ), 258 'Vpd_WO': ( 'IDX_UseModRM', 'reg', '%Vpd', 'Vpd', ), 259 'Vq': ( 'IDX_UseModRM', 'reg', '%Vq', 'Vq', ), 260 'Vq_WO': ( 'IDX_UseModRM', 'reg', '%Vq', 'Vq', ), 261 'Vdq_WO': ( 'IDX_UseModRM', 'reg', '%Vdq', 'Vdq', ), 262 'VqHi': ( 'IDX_UseModRM', 'reg', '%Vdq', 'VdqHi', ), 263 'VqHi_WO': ( 'IDX_UseModRM', 'reg', '%Vdq', 'VdqHi', ), 264 'VqZxReg_WO': ( 'IDX_UseModRM', 'reg', '%Vq', 'VqZx', ), 256 265 257 266 # Immediate values. 258 'Ib': ( 'IDX_ParseImmByte', 'imm', '%Ib', 'Ib', ), ##< NB! Could be IDX_ParseImmByteSX for some instructions.259 'Iw': ( 'IDX_ParseImmUshort', 'imm', '%Iw', 'Iw', ),260 'Id': ( 'IDX_ParseImmUlong', 'imm', '%Id', 'Id', ),261 'Iq': ( 'IDX_ParseImmQword', 'imm', '%Iq', 'Iq', ),262 'Iv': ( 'IDX_ParseImmV', 'imm', '%Iv', 'Iv', ), ##< o16: word, o32: dword, o64: qword263 'Iz': ( 'IDX_ParseImmZ', 'imm', '%Iz', 'Iz', ), ##< o16: word, o32|o64:dword267 'Ib': ( 'IDX_ParseImmByte', 'imm', '%Ib', 'Ib', ), ##< NB! Could be IDX_ParseImmByteSX for some instrs. 268 'Iw': ( 'IDX_ParseImmUshort', 'imm', '%Iw', 'Iw', ), 269 'Id': ( 'IDX_ParseImmUlong', 'imm', '%Id', 'Id', ), 270 'Iq': ( 'IDX_ParseImmQword', 'imm', '%Iq', 'Iq', ), 271 'Iv': ( 'IDX_ParseImmV', 'imm', '%Iv', 'Iv', ), ##< o16: word, o32: dword, o64: qword 272 'Iz': ( 'IDX_ParseImmZ', 'imm', '%Iz', 'Iz', ), ##< o16: word, o32|o64:dword 264 273 265 274 # Address operands (no ModR/M). 266 'Ob': ( 'IDX_ParseImmAddr', 'imm', '%Ob', 'Ob', ),267 'Ov': ( 'IDX_ParseImmAddr', 'imm', '%Ov', 'Ov', ),275 'Ob': ( 'IDX_ParseImmAddr', 'imm', '%Ob', 'Ob', ), 276 'Ov': ( 'IDX_ParseImmAddr', 'imm', '%Ov', 'Ov', ), 268 277 269 278 # Relative jump targets 270 'Jb': ( 'IDX_ParseImmBRel', 'imm', '%Jb', 'Jb', ),271 'Jv': ( 'IDX_ParseImmVRel', 'imm', '%Jv', 'Jv', ),279 'Jb': ( 'IDX_ParseImmBRel', 'imm', '%Jb', 'Jb', ), 280 'Jv': ( 'IDX_ParseImmVRel', 'imm', '%Jv', 'Jv', ), 272 281 273 282 # DS:rSI 274 'Xb': ( 'IDX_ParseXb', 'rSI', '%eSI', 'Xb', ),275 'Xv': ( 'IDX_ParseXv', 'rSI', '%eSI', 'Xv', ),283 'Xb': ( 'IDX_ParseXb', 'rSI', '%eSI', 'Xb', ), 284 'Xv': ( 'IDX_ParseXv', 'rSI', '%eSI', 'Xv', ), 276 285 # ES:rDI 277 'Yb': ( 'IDX_ParseYb', 'rDI', '%eDI', 'Yb', ),278 'Yv': ( 'IDX_ParseYv', 'rDI', '%eDI', 'Yv', ),279 280 'Fv': ( 'IDX_ParseFixedReg', 'rFLAGS', '%Fv', 'Fv', ),286 'Yb': ( 'IDX_ParseYb', 'rDI', '%eDI', 'Yb', ), 287 'Yv': ( 'IDX_ParseYv', 'rDI', '%eDI', 'Yv', ), 288 289 'Fv': ( 'IDX_ParseFixedReg', 'rFLAGS', '%Fv', 'Fv', ), 281 290 282 291 # Fixed registers. 283 'AL': ( 'IDX_ParseFixedReg', 'AL', 'al', 'REG_AL', ),284 'rAX': ( 'IDX_ParseFixedReg', 'rAX', '%eAX', 'REG_EAX', ),285 'CS': ( 'IDX_ParseFixedReg', 'CS', 'cs', 'REG_CS', ), # 8086: push CS286 'DS': ( 'IDX_ParseFixedReg', 'DS', 'ds', 'REG_DS', ),287 'ES': ( 'IDX_ParseFixedReg', 'ES', 'es', 'REG_ES', ),288 'FS': ( 'IDX_ParseFixedReg', 'FS', 'fs', 'REG_FS', ),289 'GS': ( 'IDX_ParseFixedReg', 'GS', 'gs', 'REG_GS', ),290 'SS': ( 'IDX_ParseFixedReg', 'SS', 'ss', 'REG_SS', ),292 'AL': ( 'IDX_ParseFixedReg', 'AL', 'al', 'REG_AL', ), 293 'rAX': ( 'IDX_ParseFixedReg', 'rAX', '%eAX', 'REG_EAX', ), 294 'CS': ( 'IDX_ParseFixedReg', 'CS', 'cs', 'REG_CS', ), # 8086: push CS 295 'DS': ( 'IDX_ParseFixedReg', 'DS', 'ds', 'REG_DS', ), 296 'ES': ( 'IDX_ParseFixedReg', 'ES', 'es', 'REG_ES', ), 297 'FS': ( 'IDX_ParseFixedReg', 'FS', 'fs', 'REG_FS', ), 298 'GS': ( 'IDX_ParseFixedReg', 'GS', 'gs', 'REG_GS', ), 299 'SS': ( 'IDX_ParseFixedReg', 'SS', 'ss', 'REG_SS', ), 291 300 }; 292 301 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r66811 r66812 1001 1001 FNIEMOP_DEF(iemOp_movups_Vps_Wps) 1002 1002 { 1003 IEMOP_MNEMONIC2(RM, MOVUPS, movups, Vps , Wps, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1003 IEMOP_MNEMONIC2(RM, MOVUPS, movups, Vps_WO, Wps, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1004 1004 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1005 1005 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1053 1053 FNIEMOP_DEF(iemOp_movupd_Vpd_Wpd) 1054 1054 { 1055 IEMOP_MNEMONIC2(RM, MOVUPD, movupd, Vpd , Wpd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1055 IEMOP_MNEMONIC2(RM, MOVUPD, movupd, Vpd_WO, Wpd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1056 1056 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1057 1057 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1104 1104 FNIEMOP_DEF(iemOp_movss_Vss_Wss) 1105 1105 { 1106 IEMOP_MNEMONIC2(RM, MOVSS, movss, VssZxReg , Wss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1106 IEMOP_MNEMONIC2(RM, MOVSS, movss, VssZxReg_WO, Wss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1107 1107 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1108 1108 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1158 1158 FNIEMOP_DEF(iemOp_movsd_Vsd_Wsd) 1159 1159 { 1160 IEMOP_MNEMONIC2(RM, MOVSD, movsd, VsdZxReg , Wsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1160 IEMOP_MNEMONIC2(RM, MOVSD, movsd, VsdZxReg_WO, Wsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1161 1161 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1162 1162 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1212 1212 FNIEMOP_DEF(iemOp_movups_Wps_Vps) 1213 1213 { 1214 IEMOP_MNEMONIC2(MR, MOVUPS, movups, Wps , Vps, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1214 IEMOP_MNEMONIC2(MR, MOVUPS, movups, Wps_WO, Vps, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1215 1215 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1216 1216 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1263 1263 FNIEMOP_DEF(iemOp_movupd_Wpd_Vpd) 1264 1264 { 1265 IEMOP_MNEMONIC2(MR, MOVUPD, movupd, Wpd , Vpd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1265 IEMOP_MNEMONIC2(MR, MOVUPD, movupd, Wpd_WO, Vpd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1266 1266 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1267 1267 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1314 1314 FNIEMOP_DEF(iemOp_movss_Wss_Vss) 1315 1315 { 1316 IEMOP_MNEMONIC2(MR, MOVSS, movss, Wss , Vss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1316 IEMOP_MNEMONIC2(MR, MOVSS, movss, Wss_WO, Vss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1317 1317 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1318 1318 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1368 1368 FNIEMOP_DEF(iemOp_movsd_Wsd_Vsd) 1369 1369 { 1370 IEMOP_MNEMONIC2(MR, MOVSD, movsd, Wsd , Vsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1370 IEMOP_MNEMONIC2(MR, MOVSD, movsd, Wsd_WO, Vsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1371 1371 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1372 1372 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1426 1426 * @optest op1=0 op2=-42 -> op1=-42 1427 1427 */ 1428 IEMOP_MNEMONIC2(RM_REG, MOVHLPS, movhlps, Vq , UqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1428 IEMOP_MNEMONIC2(RM_REG, MOVHLPS, movhlps, Vq_WO, UqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1429 1429 1430 1430 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); … … 1454 1454 * @opfunction iemOp_movlps_Vq_Mq__vmovhlps 1455 1455 */ 1456 IEMOP_MNEMONIC2(RM_MEM, MOVLPS, movlps, Vq , Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1456 IEMOP_MNEMONIC2(RM_MEM, MOVLPS, movlps, Vq_WO, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1457 1457 1458 1458 IEM_MC_BEGIN(0, 2); … … 1490 1490 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1491 1491 { 1492 IEMOP_MNEMONIC2(RM_MEM, MOVLPD, movlpd, Vq , Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1492 IEMOP_MNEMONIC2(RM_MEM, MOVLPD, movlpd, Vq_WO, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1493 1493 1494 1494 IEM_MC_BEGIN(0, 2); … … 1534 1534 FNIEMOP_DEF(iemOp_movsldup_Vdq_Wdq) 1535 1535 { 1536 IEMOP_MNEMONIC2(RM, MOVSLDUP, movsldup, Vdq , Wdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1536 IEMOP_MNEMONIC2(RM, MOVSLDUP, movsldup, Vdq_WO, Wdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1537 1537 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1538 1538 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1594 1594 FNIEMOP_DEF(iemOp_movddup_Vdq_Wdq) 1595 1595 { 1596 IEMOP_MNEMONIC2(RM, MOVDDUP, movddup, Vdq , Wdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1596 IEMOP_MNEMONIC2(RM, MOVDDUP, movddup, Vdq_WO, Wdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1597 1597 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1598 1598 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 1657 1657 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1658 1658 { 1659 IEMOP_MNEMONIC2(MR_MEM, MOVLPS, movlps, Mq WO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1659 IEMOP_MNEMONIC2(MR_MEM, MOVLPS, movlps, Mq_WO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1660 1660 1661 1661 IEM_MC_BEGIN(0, 2); … … 1705 1705 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1706 1706 { 1707 IEMOP_MNEMONIC2(MR_MEM, MOVLPD, movlpd, Mq WO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1707 IEMOP_MNEMONIC2(MR_MEM, MOVLPD, movlpd, Mq_WO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1708 1708 IEM_MC_BEGIN(0, 2); 1709 1709 IEM_MC_LOCAL(uint64_t, uSrc); … … 1826 1826 * @optest op1=0 op2=-42 -> op1=-42 1827 1827 */ 1828 IEMOP_MNEMONIC2(RM_REG, MOVLHPS, movlhps, VqHi , Uq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1828 IEMOP_MNEMONIC2(RM_REG, MOVLHPS, movlhps, VqHi_WO, Uq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1829 1829 1830 1830 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); … … 1854 1854 * @opfunction iemOp_movhps_Vdq_Mq__movlhps_Vdq_Uq 1855 1855 */ 1856 IEMOP_MNEMONIC2(RM_MEM, MOVHPS, movhps, VqHi , Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1856 IEMOP_MNEMONIC2(RM_MEM, MOVHPS, movhps, VqHi_WO, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1857 1857 1858 1858 IEM_MC_BEGIN(0, 2); … … 1890 1890 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 1891 1891 { 1892 IEMOP_MNEMONIC2(RM_MEM, MOVHPD, movhpd, VqHi , Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1892 IEMOP_MNEMONIC2(RM_MEM, MOVHPD, movhpd, VqHi_WO, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1893 1893 IEM_MC_BEGIN(0, 2); 1894 1894 IEM_MC_LOCAL(uint64_t, uSrc); … … 1933 1933 FNIEMOP_DEF(iemOp_movshdup_Vdq_Wdq) 1934 1934 { 1935 IEMOP_MNEMONIC2(RM, MOVSHDUP, movshdup, Vdq , Wdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);1935 IEMOP_MNEMONIC2(RM, MOVSHDUP, movshdup, Vdq_WO, Wdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 1936 1936 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 1937 1937 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 2008 2008 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 2009 2009 { 2010 IEMOP_MNEMONIC2(MR_MEM, MOVHPS, movhps, Mq WO, VqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);2010 IEMOP_MNEMONIC2(MR_MEM, MOVHPS, movhps, Mq_WO, VqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 2011 2011 2012 2012 IEM_MC_BEGIN(0, 2); … … 2056 2056 if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT)) 2057 2057 { 2058 IEMOP_MNEMONIC2(MR_MEM, MOVHPD, movhpd, Mq WO, VqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);2058 IEMOP_MNEMONIC2(MR_MEM, MOVHPD, movhpd, Mq_WO, VqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 2059 2059 2060 2060 IEM_MC_BEGIN(0, 2); … … 4325 4325 FNIEMOP_DEF(iemOp_movq_Vq_Wq) 4326 4326 { 4327 IEMOP_MNEMONIC2(RM, MOVQ, movq, VqZxReg , Wq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);4327 IEMOP_MNEMONIC2(RM, MOVQ, movq, VqZxReg_WO, Wq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 4328 4328 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 4329 4329 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 6453 6453 FNIEMOP_DEF_1(iemOp_Grp15_ldmxcsr, uint8_t, bRm) 6454 6454 { 6455 IEMOP_MNEMONIC1(M_MEM, LDMXCSR, ldmxcsr, Md RO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);6455 IEMOP_MNEMONIC1(M_MEM, LDMXCSR, ldmxcsr, Md_RO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 6456 6456 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse) 6457 6457 return IEMOP_RAISE_INVALID_OPCODE(); … … 6490 6490 FNIEMOP_DEF_1(iemOp_Grp15_stmxcsr, uint8_t, bRm) 6491 6491 { 6492 IEMOP_MNEMONIC1(M_MEM, STMXCSR, stmxcsr, Md WO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);6492 IEMOP_MNEMONIC1(M_MEM, STMXCSR, stmxcsr, Md_WO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 6493 6493 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse) 6494 6494 return IEMOP_RAISE_INVALID_OPCODE(); … … 6517 6517 FNIEMOP_DEF_1(iemOp_Grp15_xsave, uint8_t, bRm) 6518 6518 { 6519 IEMOP_MNEMONIC1(M_MEM, XSAVE, xsave, M RW, DISOPTYPE_HARMLESS, 0);6519 IEMOP_MNEMONIC1(M_MEM, XSAVE, xsave, M_RW, DISOPTYPE_HARMLESS, 0); 6520 6520 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fXSaveRstor) 6521 6521 return IEMOP_RAISE_INVALID_OPCODE(); … … 6545 6545 FNIEMOP_DEF_1(iemOp_Grp15_xrstor, uint8_t, bRm) 6546 6546 { 6547 IEMOP_MNEMONIC1(M_MEM, XRSTOR, xrstor, M RO, DISOPTYPE_HARMLESS, 0);6547 IEMOP_MNEMONIC1(M_MEM, XRSTOR, xrstor, M_RO, DISOPTYPE_HARMLESS, 0); 6548 6548 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fXSaveRstor) 6549 6549 return IEMOP_RAISE_INVALID_OPCODE(); … … 6575 6575 FNIEMOP_DEF_1(iemOp_Grp15_clflush, uint8_t, bRm) 6576 6576 { 6577 IEMOP_MNEMONIC1(M_MEM, CLFLUSH, clflush, Mb RO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);6577 IEMOP_MNEMONIC1(M_MEM, CLFLUSH, clflush, Mb_RO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 6578 6578 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fClFlush) 6579 6579 return FNIEMOP_CALL_1(iemOp_InvalidWithRMAllNeeded, bRm); … … 6600 6600 FNIEMOP_DEF_1(iemOp_Grp15_clflushopt, uint8_t, bRm) 6601 6601 { 6602 IEMOP_MNEMONIC1(M_MEM, CLFLUSHOPT, clflushopt, Mb RO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);6602 IEMOP_MNEMONIC1(M_MEM, CLFLUSHOPT, clflushopt, Mb_RO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 6603 6603 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fClFlushOpt) 6604 6604 return FNIEMOP_CALL_1(iemOp_InvalidWithRMAllNeeded, bRm); … … 8341 8341 FNIEMOP_DEF(iemOp_movq_Wq_Vq) 8342 8342 { 8343 IEMOP_MNEMONIC2(MR, MOVQ, movq, WqZxReg , Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);8343 IEMOP_MNEMONIC2(MR, MOVQ, movq, WqZxReg_WO, Vq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 8344 8344 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 8345 8345 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) … … 8402 8402 * Register, register. 8403 8403 */ 8404 IEMOP_MNEMONIC2(RM_REG, MOVQ2DQ, movq2dq, VqZxReg , Nq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);8404 IEMOP_MNEMONIC2(RM_REG, MOVQ2DQ, movq2dq, VqZxReg_WO, Nq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 8405 8405 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8406 8406 IEM_MC_BEGIN(0, 1); … … 8454 8454 * Register, register. 8455 8455 */ 8456 IEMOP_MNEMONIC2(RM_REG, MOVDQ2Q, movdq2q, Pq , Uq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);8456 IEMOP_MNEMONIC2(RM_REG, MOVDQ2Q, movdq2q, Pq_WO, Uq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 8457 8457 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 8458 8458 IEM_MC_BEGIN(0, 1); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap1.cpp.h
r66479 r66812 2227 2227 FNIEMOP_DEF_1(iemOp_VGrp15_vstmxcsr, uint8_t, bRm) 2228 2228 { 2229 IEMOP_MNEMONIC1(VEX_M_MEM, VSTMXCSR, vstmxcsr, Md WO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);2229 IEMOP_MNEMONIC1(VEX_M_MEM, VSTMXCSR, vstmxcsr, Md_WO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE); 2230 2230 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fAvx) 2231 2231 return IEMOP_RAISE_INVALID_OPCODE();
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