Changeset 66932 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- May 17, 2017 11:02:08 AM (8 years ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66921 r66932 2426 2426 2427 2427 2428 /** 2429 * Wip - VEX.W ignored. 2430 * Lig - VEX.L ignored. 2431 */ 2428 2432 static unsigned BS3_NEAR_CODE 2429 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_ OR_Vice_Versa(PBS3CG1STATE pThis, unsigned iEncoding)2433 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding) 2430 2434 { 2431 2435 unsigned off; … … 2477 2481 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2478 2482 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2483 break; 2484 case 5: 2485 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xc /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W-ignored*/); 2486 off = Bs3Cg1InsertOpcodes(pThis, off); 2487 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2488 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2489 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 3; 2490 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2491 break; 2492 case 6: 2493 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W-ignored*/); 2494 off = Bs3Cg1InsertOpcodes(pThis, off); 2495 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2496 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2497 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7); 2498 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2499 break; 2500 case 7: 2501 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2502 off = Bs3Cg1InsertOpcodes(pThis, off); 2503 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2504 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2505 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7); 2506 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2507 break; 2508 default: 2509 return 0; 2510 } 2511 pThis->cbCurInstr = off; 2512 return iEncoding + 1; 2513 } 2514 2515 2516 /** 2517 * Wip - VEX.W ignored. 2518 */ 2519 static unsigned BS3_NEAR_CODE 2520 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding) 2521 { 2522 unsigned off; 2523 switch (iEncoding) 2524 { 2525 case 0: 2526 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2527 off = Bs3Cg1InsertOpcodes(pThis, off); 2528 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2529 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2530 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2531 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2532 break; 2533 case 1: 2534 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0x8 /*~V*/, 1 /*L-ignored*/, 1 /*~R*/); 2535 off = Bs3Cg1InsertOpcodes(pThis, off); 2536 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 1); 2537 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 3; 2538 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 7; 2539 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2540 pThis->fInvalidEncoding = true; 2541 break; 2542 case 2: 2543 #if ARCH_BITS == 64 2544 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2545 { 2546 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/); 2547 off = Bs3Cg1InsertOpcodes(pThis, off); 2548 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2); 2549 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 2550 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 15; 2551 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 2552 break; 2553 } 2554 #endif 2555 /* fall thru */ 2556 case 3: 2557 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2558 off = Bs3Cg1InsertOpcodes(pThis, off); 2559 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2560 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2561 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2562 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2563 break; 2564 case 4: 2565 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2566 off = Bs3Cg1InsertOpcodes(pThis, off); 2567 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2568 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2569 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 0; 2570 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2571 pThis->fInvalidEncoding = true; 2479 2572 break; 2480 2573 case 5: … … 2611 2704 2612 2705 2706 /** 2707 * Wip - VEX.W ignored. 2708 */ 2709 static unsigned BS3_NEAR_CODE 2710 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Msomething_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding) 2711 { 2712 unsigned off; 2713 switch (iEncoding) 2714 { 2715 case 0: 2716 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xc /*~V*/, 0 /*L*/, 1 /*~R*/); 2717 off = Bs3Cg1InsertOpcodes(pThis, off); 2718 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 0, 0); 2719 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 3; 2720 break; 2721 case 1: 2722 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/); 2723 off = Bs3Cg1InsertOpcodes(pThis, off); 2724 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7, 0); 2725 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2726 pThis->fInvalidEncoding = true; 2727 break; 2728 case 2: 2729 #if ARCH_BITS == 64 2730 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2731 { 2732 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0x1 /*~V*/, 0 /*L*/, 0 /*~R*/); 2733 off = Bs3Cg1InsertOpcodes(pThis, off); 2734 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0); 2735 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 14; 2736 break; 2737 } 2738 #endif 2739 /* fall thru */ 2740 case 3: 2741 iEncoding = 3; 2742 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V*/, 0 /*L*/, 1 /*~R*/); 2743 off = Bs3Cg1InsertOpcodes(pThis, off); 2744 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 0, 0); 2745 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 1; 2746 break; 2747 case 4: 2748 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2749 off = Bs3Cg1InsertOpcodes(pThis, off); 2750 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2751 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2752 break; 2753 case 5: 2754 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L-ignored*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2755 off = Bs3Cg1InsertOpcodes(pThis, off); 2756 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2757 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2758 pThis->fInvalidEncoding = true; 2759 break; 2760 case 6: 2761 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W-ignored*/); 2762 off = Bs3Cg1InsertOpcodes(pThis, off); 2763 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2764 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2765 break; 2766 case 7: 2767 #if ARCH_BITS == 64 2768 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2769 { 2770 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2771 off = Bs3Cg1InsertOpcodes(pThis, off); 2772 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0); 2773 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2774 break; 2775 } 2776 #endif 2777 /* fall thru */ 2778 case 8: 2779 #if ARCH_BITS == 64 2780 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2781 { 2782 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/); 2783 off = Bs3Cg1InsertOpcodes(pThis, off); 2784 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2785 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2786 break; 2787 } 2788 #endif 2789 /* fall thru */ 2790 case 9: 2791 #if ARCH_BITS == 64 2792 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2793 { 2794 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/); 2795 off = Bs3Cg1InsertOpcodes(pThis, off); 2796 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0); 2797 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2798 break; 2799 } 2800 #endif 2801 /* fall thru */ 2802 case 10: 2803 iEncoding = 10; 2804 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2805 off = Bs3Cg1InsertOpcodes(pThis, off); 2806 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2807 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7); 2808 pThis->fInvalidEncoding = true; 2809 break; 2810 default: 2811 return 0; 2812 } 2813 pThis->cbCurInstr = off; 2814 return iEncoding + 1; 2815 } 2816 2817 2613 2818 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_Md_WO(PBS3CG1STATE pThis, unsigned iEncoding) 2614 2819 { … … 3294 3499 3295 3500 case BS3CG1ENC_VEX_MODRM_Vss_WO_HdqCss_Uss: 3296 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_ OR_Vice_Versa;3501 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa; 3297 3502 pThis->iRegOp = 0; 3298 3503 pThis->iRmOp = 2; … … 3321 3526 3322 3527 case BS3CG1ENC_VEX_MODRM_Vsd_WO_HdqCsd_Usd: 3323 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_ OR_Vice_Versa;3528 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa; 3324 3529 pThis->iRegOp = 0; 3325 3530 pThis->iRmOp = 2; … … 3335 3540 break; 3336 3541 3542 case BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_UqHi: 3543 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Wip_OR_ViceVersa; 3544 pThis->iRegOp = 0; 3545 pThis->iRmOp = 2; 3546 pThis->aOperands[0].cbOp = 16; 3547 pThis->aOperands[1].cbOp = 16; 3548 pThis->aOperands[2].cbOp = 8; 3549 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; 3550 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3551 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_CTX; 3552 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3553 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0; 3554 pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_HI; 3555 break; 3556 3557 case BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_Mq: 3558 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Msomething_Wip_OR_ViceVersa; 3559 pThis->iRegOp = 0; 3560 pThis->iRmOp = 2; 3561 pThis->aOperands[0].cbOp = 16; 3562 pThis->aOperands[1].cbOp = 16; 3563 pThis->aOperands[2].cbOp = 8; 3564 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX; 3565 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3566 pThis->aOperands[2].enmLocation = BS3CG1OPLOC_MEM; 3567 pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0; 3568 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0; 3569 pThis->aOperands[2].idxFieldBase = BS3CG1DST_INVALID; 3570 break; 3571 3337 3572 case BS3CG1ENC_VEX_MODRM_Md_WO_Vss: 3338 3573 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa; … … 3360 3595 3361 3596 case BS3CG1ENC_VEX_MODRM_Uss_WO_HdqCss_Vss: 3362 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_ OR_Vice_Versa;3597 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa; 3363 3598 pThis->iRegOp = 2; 3364 3599 pThis->iRmOp = 0; … … 3375 3610 3376 3611 case BS3CG1ENC_VEX_MODRM_Usd_WO_HdqCsd_Vsd: 3377 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_ OR_Vice_Versa;3612 pThis->pfnEncoder = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa; 3378 3613 pThis->iRegOp = 2; 3379 3614 pThis->iRmOp = 0; … … 5025 5260 #if 0 5026 5261 /* (for debugging) */ 5027 if (bMode == BS3_MODE_RM)5262 if (bMode != BS3_MODE_PP32) 5028 5263 return BS3TESTDOMODE_SKIPPED; 5029 5264 #endif -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66921 r66932 63 63 BS3CG1OP_HdqCss, 64 64 BS3CG1OP_HdqCsd, 65 BS3CG1OP_HdqCq, 65 66 BS3CG1OP_Nq, 66 67 BS3CG1OP_Pq_WO, … … 152 153 BS3CG1ENC_VEX_MODRM_Vss_WO_HdqCss_Uss, 153 154 BS3CG1ENC_VEX_MODRM_Vsd_WO_HdqCsd_Usd, 155 BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_UqHi, 156 BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_Mq, 154 157 BS3CG1ENC_VEX_MODRM_VssZx_WO_Md, 155 158 BS3CG1ENC_VEX_MODRM_VsdZx_WO_Mq, … … 230 233 BS3CG1XCPTTYPE_4UA, 231 234 BS3CG1XCPTTYPE_5, 235 BS3CG1XCPTTYPE_5LZ, 232 236 BS3CG1XCPTTYPE_6, 233 237 BS3CG1XCPTTYPE_7, 238 BS3CG1XCPTTYPE_7LZ, 234 239 BS3CG1XCPTTYPE_8, 235 240 BS3CG1XCPTTYPE_11,
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