Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py	(revision 66990)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py	(revision 66991)
@@ -247,4 +247,6 @@
     'Mq':           ( 'IDX_UseModRM',       'rm',     '%Mq',  'Mq',      ),
     'Mq_WO':        ( 'IDX_UseModRM',       'rm',     '%Mq',  'Mq',      ),
+    'Mps_WO':       ( 'IDX_UseModRM',       'rm',     '%Mps', 'Mps',     ),
+    'Mpd_WO':       ( 'IDX_UseModRM',       'rm',     '%Mpd', 'Mpd',     ),
     'M_RO':         ( 'IDX_UseModRM',       'rm',     '%M',   'M',       ),
     'M_RW':         ( 'IDX_UseModRM',       'rm',     '%M',   'M',       ),
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h	(revision 66990)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h	(revision 66991)
@@ -2505,8 +2505,17 @@
 
 
-/** Opcode      0x0f 0x2b - vmovntps Mps, Vps */
+/**
+ * @opcode      0x2b
+ * @opcodesub   !11 mr/reg
+ * @oppfx       none
+ * @opcpuid     sse
+ * @opgroup     og_sse1_cachect
+ * @opxcpttype  1
+ * @optest      op1=1 op2=2 -> op1=2
+ * @optest      op1=0 op2=-42 -> op1=-42
+ */
 FNIEMOP_DEF(iemOp_movntps_Mps_Vps)
 {
-    IEMOP_MNEMONIC(movntps_mr_r, "movntps Mps,Vps");
+    IEMOP_MNEMONIC2(MR_MEM, MOVNTPS, movntps, Mps_WO, Vps, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
@@ -2536,8 +2545,17 @@
 }
 
-/** Opcode 0x66 0x0f 0x2b - movntpd Mpd, Vpd */
+/**
+ * @opcode      0x2b
+ * @opcodesub   !11 mr/reg
+ * @oppfx       0x66
+ * @opcpuid     sse2
+ * @opgroup     og_sse2_cachect
+ * @opxcpttype  1
+ * @optest      op1=1 op2=2 -> op1=2
+ * @optest      op1=0 op2=-42 -> op1=-42
+ */
 FNIEMOP_DEF(iemOp_movntpd_Mpd_Vpd)
 {
-    IEMOP_MNEMONIC(movntpd_mr_r, "movntpd Mdq,Vpd");
+    IEMOP_MNEMONIC2(MR_MEM, MOVNTPD, movntpd, Mpd_WO, Vpd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
Index: trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
===================================================================
--- trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c	(revision 66990)
+++ trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c	(revision 66991)
@@ -84,4 +84,13 @@
 #endif
 
+/**
+ * Checks if this is a 64-bit test target or not.
+ * Helps avoid ifdefs or code bloat.
+ */
+#if ARCH_BITS == 64
+# define BS3CG1_IS_64BIT_TARGET(a_pThis)    BS3_MODE_IS_64BIT_CODE((a_pThis)->bMode)
+#else
+# define BS3CG1_IS_64BIT_TARGET(a_pThis)    (false)
+#endif
 
 
@@ -1327,7 +1336,9 @@
         *(uint32_t *)&pThis->abCurInstr[off] = BS3_FP_OFF(pThis->pbDataPg) + X86_PAGE_SIZE - cbOp - cbMissalign;
 
+#if ARCH_BITS == 64
         /* In 64-bit mode we always have a rip relative encoding regardless of fAddrOverride. */
-        if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+        if (BS3CG1_IS_64BIT_TARGET(pThis))
             *(uint32_t *)&pThis->abCurInstr[off] -= BS3_FP_OFF(&pThis->pbCodePg[X86_PAGE_SIZE]);
+#endif
         off += 4;
     }
@@ -1503,5 +1514,5 @@
                                        pThis->enmEncoding == BS3CG1ENC_MODRM_Gv_Ev ? BS3CG1OPLOC_MEM : BS3CG1OPLOC_MEM_WO);
     }
-    else if (iEncoding == 6 && BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+    else if (iEncoding == 6 && BS3CG1_IS_64BIT_TARGET(pThis))
     {
         cbOp = 8;
@@ -2037,4 +2048,34 @@
     else
         return 0;
+    pThis->cbCurInstr = off;
+    return iEncoding + 1;
+}
+
+
+static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething(PBS3CG1STATE pThis, unsigned iEncoding)
+{
+    unsigned off;
+    switch (iEncoding)
+    {
+        case 0:
+            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 0);
+            break;
+        case 1:
+            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 1 /*cbMissalign*/ );
+            if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
+                pThis->bAlignmentXcpt = X86_XCPT_GP;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0;
+            break;
+        case 2:
+            off = Bs3Cg1InsertReqPrefix(pThis, 0);
+            pThis->abCurInstr[off++] = REX__R__;
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2+8 /*iReg*/, 0);
+            break;
+        default:
+            return 0;
+    }
     pThis->cbCurInstr = off;
     return iEncoding + 1;
@@ -2118,5 +2159,5 @@
         }
     }
-    else if (iEncoding == 2 && BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+    else if (iEncoding == 2 && BS3CG1_IS_64BIT_TARGET(pThis))
     {
         off = Bs3Cg1InsertReqPrefix(pThis, 0);
@@ -2487,5 +2528,5 @@
 #if ARCH_BITS == 64
     /* 64-bit mode registers */
-    else if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+    else if (BS3CG1_IS_64BIT_TARGET(pThis))
     {
         if (iEncoding == 24)
@@ -2541,19 +2582,16 @@
             pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + 7;
             pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0;
             break;
         case 2:
 #if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2);
-                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11;
-                pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + 15;
-                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
-                break;
-            }
+            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2);
+            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11;
+            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + 15;
+            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
+            break;
 #endif
-            /* fall thru */
         case 3:
             off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
@@ -2585,5 +2623,5 @@
             pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1);
             pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2;
-            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);
+            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7);
             pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1;
             break;
@@ -2593,5 +2631,5 @@
             pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1);
             pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2;
-            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);
+            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7);
             pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1;
             break;
@@ -2629,19 +2667,16 @@
             pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1;
             pThis->fInvalidEncoding = true;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0;
             break;
         case 2:
 #if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2);
-                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11;
-                pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + 15;
-                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
-                break;
-            }
+            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2);
+            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11;
+            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + 15;
+            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
+            break;
 #endif
-            /* fall thru */
         case 3:
             off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
@@ -2674,5 +2709,5 @@
             pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1);
             pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2;
-            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);
+            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7);
             pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1;
             break;
@@ -2682,5 +2717,5 @@
             pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1);
             pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2;
-            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);
+            pThis->aOperands[1            ].idxField = pThis->aOperands[1            ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7);
             pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1;
             break;
@@ -2712,16 +2747,13 @@
             off = Bs3Cg1InsertOpcodes(pThis, off);
             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7, 0);
-            break;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0;
+            break;
+#if ARCH_BITS == 64
         case 2:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 0 /*~R*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0);
-                break;
-            }
+            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 0 /*~R*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0);
+            break;
 #endif
-            /* fall thru */
         case 3:
             iEncoding = 3;
@@ -2745,40 +2777,24 @@
             off = Bs3Cg1InsertOpcodes(pThis, off);
             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0);
-            break;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 3 : 0;
+            break;
+#if ARCH_BITS == 64
         case 7:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0);
-                break;
-            }
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0);
+            break;
+        case 8:
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0);
+            break;
+        case 9:
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0);
+            break;
 #endif
-            /* fall thru */
-        case 8:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0);
-                break;
-            }
-#endif
-            /* fall thru */
-        case 9:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0);
-                break;
-            }
-#endif
-            /* fall thru */
         case 10:
-            iEncoding = 10;
             off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
             off = Bs3Cg1InsertOpcodes(pThis, off);
@@ -2820,6 +2836,5 @@
             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7, 0);
             pThis->fInvalidEncoding = true;
-            if (!BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-                iEncoding += 2;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 2 : 0;
             break;
 #if ARCH_BITS == 64
@@ -2857,6 +2872,5 @@
             off = Bs3Cg1InsertOpcodes(pThis, off);
             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0);
-            if (!BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-                iEncoding += 3;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 3 : 0;
             break;
 #if ARCH_BITS == 64
@@ -2918,19 +2932,15 @@
             pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
             pThis->fInvalidEncoding = true;
-            break;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0;
+            break;
+#if ARCH_BITS == 64
         case 2:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0x1 /*~V*/, 0 /*L*/, 0 /*~R*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0);
-                pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 14;
-                break;
-            }
+            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0x1 /*~V*/, 0 /*L*/, 0 /*~R*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0);
+            pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 14;
+            break;
 #endif
-            /* fall thru */
         case 3:
-            iEncoding = 3;
             off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V*/, 0 /*L*/, 1 /*~R*/);
             off = Bs3Cg1InsertOpcodes(pThis, off);
@@ -2956,47 +2966,31 @@
             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0);
             pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
-            break;
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 3 : 0;
+            break;
+#if ARCH_BITS == 64
         case 7:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0);
-                pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
-                break;
-            }
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0);
+            pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
+            break;
+        case 8:
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0);
+            pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
+            break;
+        case 9:
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0);
+            pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
+            break;
 #endif
-            /* fall thru */
-        case 8:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0);
-                pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
-                break;
-            }
-#endif
-            /* fall thru */
-        case 9:
-#if ARCH_BITS == 64
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0);
-                pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;
-                break;
-            }
-#endif
-            /* fall thru */
         case 10:
-            iEncoding = 10;
             off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
             off = Bs3Cg1InsertOpcodes(pThis, off);
             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0);
-            pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + (BS3_MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);
+            pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7);
             pThis->fInvalidEncoding = true;
             break;
@@ -3086,5 +3080,5 @@
     }
 #if ARCH_BITS == 64
-    else if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+    else if (BS3CG1_IS_64BIT_TARGET(pThis))
     {
         if (iEncoding == 8)
@@ -3307,30 +3301,24 @@
             pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 4;
             pThis->fInvalidEncoding = true;
-            break;
-
+            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 2 : 0;
+            break;
+
+#if ARCH_BITS == 64
         /* 64-bit mode registers */
         case 34:
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 4);
-                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 4;
-                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11;
-                break;
-            }
-            /* fall thru */
+            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 4);
+            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 4;
+            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11;
+            break;
         case 35:
-            if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))
-            {
-                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 0 /*W*/);
-                off = Bs3Cg1InsertOpcodes(pThis, off);
-                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 4);
-                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 12;
-                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 9;
-                break;
-            }
-            /* fall thru */
-
+            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 0 /*W*/);
+            off = Bs3Cg1InsertOpcodes(pThis, off);
+            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 4);
+            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 12;
+            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 9;
+            break;
+#endif
         default:
             return 0;
@@ -3751,4 +3739,16 @@
             break;
 
+        case BS3CG1ENC_MODRM_Mps_WO_Vps:
+        case BS3CG1ENC_MODRM_Mpd_WO_Vpd:
+            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething;
+            pThis->iRmOp             = 0;
+            pThis->iRegOp            = 1;
+            pThis->aOperands[0].cbOp = 16;
+            pThis->aOperands[1].cbOp = 16;
+            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_MEM_WO;
+            pThis->aOperands[1].enmLocation  = BS3CG1OPLOC_CTX;
+            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
+            break;
+
         case BS3CG1ENC_FIXED:
             /* nothing to do here */
@@ -4090,5 +4090,5 @@
 {
     if (   (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT)
-        && BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+        && BS3CG1_IS_64BIT_TARGET(pThis))
         return false;
 
@@ -4142,5 +4142,5 @@
 
     if (   (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT)
-        && BS3_MODE_IS_64BIT_CODE(pThis->bMode))
+        && BS3CG1_IS_64BIT_TARGET(pThis))
         return false;
 
@@ -4280,5 +4280,5 @@
             CASE_PRED(BS3CG1PRED_RING_0_THRU_2, pThis->uCpl <= 2);
             CASE_PRED(BS3CG1PRED_RING_1_THRU_3, pThis->uCpl >= 1);
-            CASE_PRED(BS3CG1PRED_CODE_64BIT, BS3_MODE_IS_64BIT_CODE(pThis->bMode));
+            CASE_PRED(BS3CG1PRED_CODE_64BIT, BS3CG1_IS_64BIT_TARGET(pThis));
             CASE_PRED(BS3CG1PRED_CODE_32BIT, BS3_MODE_IS_32BIT_CODE(pThis->bMode));
             CASE_PRED(BS3CG1PRED_CODE_16BIT, BS3_MODE_IS_16BIT_CODE(pThis->bMode));
@@ -5466,5 +5466,5 @@
             && pThis->bCpuVendor != BS3CPUVENDOR_INTEL
             && (   (pThis->fFlags & (BS3CG1INSTR_F_UNUSED | BS3CG1INSTR_F_INVALID))
-                || (BS3_MODE_IS_64BIT_CODE(pThis->bMode) && (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT))
+                || (BS3CG1_IS_64BIT_TARGET(pThis) && (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT))
                 || fOuterInvalidInstr ) )
             pThis->enmEncoding = Bs3Cg1CalcNoneIntelInvalidEncoding(pThis->enmEncoding);
Index: trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
===================================================================
--- trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h	(revision 66990)
+++ trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h	(revision 66991)
@@ -105,4 +105,6 @@
     BS3CG1OP_Mq,
     BS3CG1OP_Mq_WO,
+    BS3CG1OP_Mps_WO,
+    BS3CG1OP_Mpd_WO,
 
     BS3CG1OP_END
@@ -150,4 +152,6 @@
     BS3CG1ENC_MODRM_Mq_WO_Vq,
     BS3CG1ENC_MODRM_Mq_WO_VqHi,
+    BS3CG1ENC_MODRM_Mps_WO_Vps,
+    BS3CG1ENC_MODRM_Mpd_WO_Vpd,
 
     BS3CG1ENC_VEX_MODRM_Vps_WO_Wps,
