Changeset 67005 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- May 22, 2017 10:59:07 AM (8 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r67004 r67005 1718 1718 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 1719 1719 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6; 1720 break; 1720 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 1721 break; 1722 #if ARCH_BITS == 64 1721 1723 case 2: 1724 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1725 pThis->abCurInstr[off++] = REX__RBX; 1726 off = Bs3Cg1InsertOpcodes(pThis, off); 1727 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2); 1728 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2 + 8; 1729 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6; /* no +8*/ 1730 break; 1731 #endif 1732 case 3: 1722 1733 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem; 1723 1734 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1724 1735 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/); 1725 1736 break; 1726 case 3:1737 case 4: 1727 1738 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1728 1739 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/); 1729 break; 1740 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 1741 break; 1742 #if ARCH_BITS == 64 1743 case 5: 1744 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1745 pThis->abCurInstr[off++] = REX__RBX; 1746 off = Bs3Cg1InsertOpcodes(pThis, off); 1747 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 0 /*cbMisalign*/); 1748 break; 1749 #endif 1730 1750 1731 1751 default: … … 1763 1783 break; 1764 1784 case 2: 1785 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1786 pThis->abCurInstr[off++] = REX_WRBX; 1787 off = Bs3Cg1InsertOpcodes(pThis, off); 1788 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2); 1789 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2 + 8; 1790 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6; /* no +8*/ 1791 break; 1792 case 3: 1765 1793 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem; 1766 1794 off = Bs3Cg1InsertReqPrefix(pThis, 0); … … 1769 1797 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/); 1770 1798 break; 1771 case 3:1799 case 4: 1772 1800 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1773 1801 pThis->abCurInstr[off++] = REX_W___; 1774 1802 off = Bs3Cg1InsertOpcodes(pThis, off); 1775 1803 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/); 1804 break; 1805 case 5: 1806 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1807 pThis->abCurInstr[off++] = REX_WRBX; 1808 off = Bs3Cg1InsertOpcodes(pThis, off); 1809 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 0 /*cbMisalign*/); 1776 1810 break; 1777 1811 … … 1805 1839 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 1806 1840 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6; 1807 break; 1841 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 1842 break; 1843 #if ARCH_BITS == 64 1808 1844 case 2: 1845 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1846 pThis->abCurInstr[off++] = REX__RBX; 1847 off = Bs3Cg1InsertOpcodes(pThis, off); 1848 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2); 1849 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2 + 8; 1850 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6 + 8; 1851 break; 1852 #endif 1853 case 3: 1809 1854 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem; 1810 1855 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1811 1856 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/); 1812 1857 break; 1813 case 3:1858 case 4: 1814 1859 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1815 1860 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/); 1816 break; 1861 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 1862 break; 1863 #if ARCH_BITS == 64 1864 case 5: 1865 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1866 pThis->abCurInstr[off++] = REX__RBX; 1867 off = Bs3Cg1InsertOpcodes(pThis, off); 1868 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7+8 /*iReg*/, 0 /*cbMisalign*/); 1869 break; 1870 #endif 1817 1871 1818 1872 default: … … 1851 1905 break; 1852 1906 case 2: 1907 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1908 pThis->abCurInstr[off++] = REX_WRBX; 1909 off = Bs3Cg1InsertOpcodes(pThis, off); 1910 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2); 1911 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2 + 8; 1912 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6 + 8; 1913 break; 1914 case 4: 1853 1915 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem; 1854 1916 off = Bs3Cg1InsertReqPrefix(pThis, 0); … … 1857 1919 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/); 1858 1920 break; 1859 case 3:1921 case 5: 1860 1922 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1861 1923 pThis->abCurInstr[off++] = REX_W___; 1862 1924 off = Bs3Cg1InsertOpcodes(pThis, off); 1863 1925 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/); 1926 break; 1927 case 6: 1928 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1929 pThis->abCurInstr[off++] = REX_WRBX; 1930 off = Bs3Cg1InsertOpcodes(pThis, off); 1931 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7+8 /*iReg*/, 0 /*cbMisalign*/); 1864 1932 break; 1865 1933
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