VirtualBox

Changeset 67029 in vbox for trunk/src/VBox


Ignore:
Timestamp:
May 23, 2017 9:42:53 AM (8 years ago)
Author:
vboxsync
Message:

IEM: Implemented movq Vq,Wq (VEX.F3.0F 7e).

Location:
trunk/src/VBox
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r67028 r67029  
    1160511605         IEM_MC_INT_CLEAR_ZMM_256_UP(pXStateTmp, iYRegDstTmp); \
    1160611606    } while (0)
     11607#define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) \
     11608    do { PX86XSAVEAREA   pXStateTmp     = IEM_GET_CTX(pVCpu)->CTX_SUFF(pXState); \
     11609         uintptr_t const iYRegDstTmp    = (a_iYRegDst); \
     11610         uintptr_t const iYRegSrcTmp    = (a_iYRegSrc); \
     11611         pXStateTmp->x87.aXMM[iYRegDstTmp].au64[0]       = pXStateTmp->x87.aXMM[iYRegSrcTmp].au64[0]; \
     11612         pXStateTmp->x87.aXMM[iYRegDstTmp].au64[1]       = 0; \
     11613         pXStateTmp->u.YmmHi.aYmmHi[iYRegDstTmp].au64[0] = 0; \
     11614         pXStateTmp->u.YmmHi.aYmmHi[iYRegDstTmp].au64[1] = 0; \
     11615         IEM_MC_INT_CLEAR_ZMM_256_UP(pXStateTmp, iYRegDstTmp); \
     11616    } while (0)
    1160711617
    1160811618#define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) \

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h

    r67015 r67029  
    46014601/**
    46024602 * @opcode      0x7e
    4603  * @opcodesub   !11 mr/reg
    46044603 * @oppfx       0xf3
    46054604 * @opcpuid     sse2
    46064605 * @opgroup     og_sse2_pcksclr_datamove
    46074606 * @opxcpttype  5
     4607 * @note        Exception type isn't really 5, but close enough...
    46084608 * @optest      op1=1 op2=2 -> op1=2
    46094609 * @optest      op1=0 op2=-42 -> op1=-42
     4610 * @oponly
    46104611 */
    46114612FNIEMOP_DEF(iemOp_movq_Vq_Wq)

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap1.cpp.h

    r67016 r67029  
    28392839}
    28402840
    2841 /** Opcode VEX.F3.0F 0x7e - vmovq Vq, Wq */
    2842 FNIEMOP_STUB(iemOp_vmovq_Vq_Wq);
     2841/**
     2842 * @opcode      0x7e
     2843 * @oppfx       0xf3
     2844 * @opcpuid     avx
     2845 * @opgroup     og_avx_pcksclr_datamove
     2846 * @opxcpttype  5
     2847 * @note        Exception type isn't really 5, but close enough...
     2848 * @optest      op1=1 op2=2 -> op1=2
     2849 * @optest      op1=0 op2=-42 -> op1=-42
     2850 * @oponly
     2851 */
     2852FNIEMOP_DEF(iemOp_vmovq_Vq_Wq)
     2853{
     2854    IEMOP_MNEMONIC2(VEX_RM, VMOVQ, vmovq, Vq_WO, Wq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
     2855    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     2856    if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     2857    {
     2858        /*
     2859         * Register, register.
     2860         */
     2861        IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV();
     2862        IEM_MC_BEGIN(0, 0);
     2863
     2864        IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
     2865        IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE();
     2866
     2867        IEM_MC_COPY_YREG_U64_ZX_VLMAX(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg,
     2868                                      (bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB);
     2869        IEM_MC_ADVANCE_RIP();
     2870        IEM_MC_END();
     2871    }
     2872    else
     2873    {
     2874        /*
     2875         * Memory, register.
     2876         */
     2877        IEM_MC_BEGIN(0, 2);
     2878        IEM_MC_LOCAL(uint64_t,                  uSrc);
     2879        IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     2880
     2881        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
     2882        IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV();
     2883        IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
     2884        IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE();
     2885
     2886        IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
     2887        IEM_MC_STORE_YREG_U64_ZX_VLMAX(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, uSrc);
     2888
     2889        IEM_MC_ADVANCE_RIP();
     2890        IEM_MC_END();
     2891    }
     2892    return VINF_SUCCESS;
     2893
     2894}
    28432895/*  Opcode VEX.F2.0F 0x7e - invalid */
    28442896
    … …  
    29302982 * @optest      op1=1 op2=2   -> op1=2
    29312983 * @optest      op1=0 op2=-42 -> op1=-42
    2932  * @oponly
    29332984 */
    29342985FNIEMOP_DEF(iemOp_vmovdqu_Wx_Vx)

  • trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

    r66977 r67029  
    539539#define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc)    do { (void)fAvxWrite; } while (0)
    540540#define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc)    do { (void)fAvxWrite; } while (0)
     541#define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc)     do { (void)fAvxWrite; } while (0)
    541542#define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx)      do { (void)fAvxWrite; (void)fAvxRead; } while (0)
    542543#define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx)      do { (void)fAvxWrite; (void)fAvxRead; } while (0)

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

    r67015 r67029  
    36823682/**
    36833683 * Wip = VEX.W ignored.
     3684 * L0 = VEX.L must be zero.
     3685 */
     3686static unsigned BS3_NEAR_CODE
     3687Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip_L0_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding)
     3688{
     3689    unsigned off;
     3690    switch (iEncoding)
     3691    {
     3692        /* 128-bit wide stuff goes first, then we'll update the operand widths afterwards. */
     3693        case 0:
     3694            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
     3695            off = Bs3Cg1InsertOpcodes(pThis, off);
     3696            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     3697            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
     3698            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
     3699            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
     3700            break;
     3701
     3702        case 1:
     3703            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     3704            off = Bs3Cg1InsertOpcodes(pThis, off);
     3705            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5);
     3706            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 5;
     3707            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 4;
     3708            break;
     3709        case 2:
     3710            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored*/);
     3711            off = Bs3Cg1InsertOpcodes(pThis, off);
     3712            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 5, 4);
     3713            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 4;
     3714            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 5;
     3715            break;
     3716        case 3:
     3717            pThis->aOperands[pThis->iRmOp].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
     3718            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
     3719            off = Bs3Cg1InsertOpcodes(pThis, off);
     3720            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 0);
     3721            break;
     3722        case 4:
     3723            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     3724            off = Bs3Cg1InsertOpcodes(pThis, off);
     3725            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 0);
     3726            break;
     3727        case 5:
     3728            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored */);
     3729            off = Bs3Cg1InsertOpcodes(pThis, off);
     3730            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 0);
     3731            break;
     3732        case 6:
     3733            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
     3734            off = Bs3Cg1InsertOpcodes(pThis, off);
     3735            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/);
     3736            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
     3737                pThis->bAlignmentXcpt = X86_XCPT_GP;
     3738            break;
     3739        case 7:
     3740            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     3741            off = Bs3Cg1InsertOpcodes(pThis, off);
     3742            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/);
     3743            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
     3744                pThis->bAlignmentXcpt = X86_XCPT_GP;
     3745            break;
     3746        /* 128-bit invalid encodings: */
     3747        case 8:
     3748            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V*/, 0 /*L*/, 1 /*~R*/); /* Bad V value */
     3749            off = Bs3Cg1InsertOpcodes(pThis, off);
     3750            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     3751            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
     3752            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
     3753            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
     3754            pThis->fInvalidEncoding = true;
     3755            break;
     3756        case 9:
     3757            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     3758            off = Bs3Cg1InsertOpcodes(pThis, off);
     3759            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 4, 5);
     3760            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 5;
     3761            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 4;
     3762            pThis->fInvalidEncoding = true;
     3763            iEncoding = 20-1;
     3764            break;
     3765
     3766        default:
     3767            return 0;
     3768    }
     3769
     3770    pThis->cbCurInstr = off;
     3771    return iEncoding + 1;
     3772}
     3773
     3774
     3775/**
     3776 * Wip = VEX.W ignored.
    36843777 */
    36853778static unsigned BS3_NEAR_CODE
    … …  
    46134706            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI;
    46144707            pThis->aOperands[2].idxFieldBase = BS3CG1DST_INVALID;
     4708            break;
     4709
     4710        case BS3CG1ENC_VEX_MODRM_Vq_WO_Wq:
     4711            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip_L0_OR_ViceVersa;
     4712            pThis->iRegOp            = 0;
     4713            pThis->iRmOp             = 1;
     4714            pThis->aOperands[0].cbOp = 8;
     4715            pThis->aOperands[1].cbOp = 8;
     4716            pThis->aOperands[0].enmLocation     = BS3CG1OPLOC_CTX_ZX_VLMAX;
     4717            pThis->aOperands[1].enmLocation     = BS3CG1OPLOC_CTX;
     4718            pThis->aOperands[1].enmLocationReg  = BS3CG1OPLOC_CTX;
     4719            pThis->aOperands[1].enmLocationMem  = BS3CG1OPLOC_MEM;
     4720            pThis->aOperands[0].idxFieldBase    = BS3CG1DST_XMM0_LO;
     4721            pThis->aOperands[1].idxFieldBase    = BS3CG1DST_XMM0_LO;
    46154722            break;
    46164723

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

    r67015 r67029  
    186186    BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_UqHi,
    187187    BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_Mq,
     188    BS3CG1ENC_VEX_MODRM_Vq_WO_Wq,
    188189    BS3CG1ENC_VEX_MODRM_VssZx_WO_Md,
    189190    BS3CG1ENC_VEX_MODRM_VsdZx_WO_Mq,
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