Changeset 67040 in vbox for trunk/src/VBox

Timestamp:

May 23, 2017 11:51:12 AM (8 years ago)

Author:

vboxsync

Message:

IEM: Implemented movntdqa Vdq,Mdq (0x66 0x0f 0x38 0x2a mod!=3).

Location:

trunk/src/VBox

Files:

• VMM/Makefile.kmk (modified) (1 diff)
• VMM/VMMAll/IEMAll.cpp (modified) (1 diff)
• VMM/VMMAll/IEMAllInstructionsPython.py (modified) (2 diffs)
• VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h (modified) (2 diffs)
• VMM/testcase/tstIEMCheckMc.cpp (modified) (1 diff)
• ValidationKit/bootsectors/bs3-cpu-generated-1-data.py (modified) (1 diff)
• ValidationKit/bootsectors/bs3-cpu-generated-1-template.c (modified) (8 diffs)
• ValidationKit/bootsectors/bs3-cpu-generated-1.h (modified) (3 diffs)

trunk/src/VBox/VMM/Makefile.kmk

@@ -355 +355 @@
                 $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsOneByte.cpp.h \
                 $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h \
-                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsVexMap1.cpp.h
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsThree0f38.cpp.h \
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsThree0f3a.cpp.h \
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsVexMap1.cpp.h \
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsVexMap2.cpp.h \
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructionsVexMap3.cpp.h \
+                $(PATH_SUB_CURRENT)/VMMAll/IEMAllInstructions3DNow.cpp.h
         $(QUIET)$(call MSG_GENERATE,VBoxVMM,$@,VMMAll/IEMAllInstructions*.cpp.h)
         $(QUIET)$(RM) -f -- "[email protected]" "[email protected]" "[email protected]"

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -11229 +11229 @@
             return iemRaiseDeviceNotAvailable(pVCpu); \
     } while (0)
+#define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT() \
+    do { \
+        if (   (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_EM) \
+            || !(IEM_GET_CTX(pVCpu)->cr4 & X86_CR4_OSFXSR) \
+            || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse41) \
+            return iemRaiseUndefinedOpcode(pVCpu); \
+        if (IEM_GET_CTX(pVCpu)->cr0 & X86_CR0_TS) \
+            return iemRaiseDeviceNotAvailable(pVCpu); \
+    } while (0)
 #define IEM_MC_MAYBE_RAISE_SSE3_RELATED_XCPT() \
     do { \

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py

@@ -253 +253 @@
     'Md_RO':        ( 'IDX_UseModRM',       'rm',     '%Md',  'Md',      ),
     'Md_WO':        ( 'IDX_UseModRM',       'rm',     '%Md',  'Md',      ),
+    'Mdq':          ( 'IDX_UseModRM',       'rm',     '%Mdq', 'Mdq',     ),
     'Mdq_WO':       ( 'IDX_UseModRM',       'rm',     '%Mdq', 'Mdq',     ),
     'Mq':           ( 'IDX_UseModRM',       'rm',     '%Mq',  'Mq',      ),
@@ -454 +455 @@
     'cx16':         'X86_CPUID_FEATURE_ECX_CX16',
     'pcid':         'X86_CPUID_FEATURE_ECX_PCID',
-    'sse41':        'X86_CPUID_FEATURE_ECX_SSE4_1',
-    'sse42':        'X86_CPUID_FEATURE_ECX_SSE4_2',
+    'sse4.1':       'X86_CPUID_FEATURE_ECX_SSE4_1',
+    'sse4.2':       'X86_CPUID_FEATURE_ECX_SSE4_2',
     'movbe':        'X86_CPUID_FEATURE_ECX_MOVBE',
     'popcnt':       'X86_CPUID_FEATURE_ECX_POPCNT',

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h

@@ -144 +144 @@
 /** Opcode 0x66 0x0f 0x38 0x29. */
 FNIEMOP_STUB(iemOp_pcmpeqq_Vx_Wx);
-/** Opcode 0x66 0x0f 0x38 0x2a. */
-FNIEMOP_STUB(iemOp_movntdqa_Vx_Mx);
+
+/**
+ * @opcode      0x2a
+ * @opcodesub   !11 mr/reg
+ * @oppfx       0x66
+ * @opcpuid     sse4.1
+ * @opgroup     og_sse41_cachect
+ * @opxcpttype  1
+ * @optest      op1=-1 op2=2  -> op1=2
+ * @optest      op1=0 op2=-42 -> op1=-42
+ * @oponly
+ */
+FNIEMOP_DEF(iemOp_movntdqa_Vdq_Mdq)
+{
+    IEMOP_MNEMONIC2(RM_MEM, MOVNTDQA, movntdqa, Vdq_WO, Mdq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
+    if ((bRm & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT))
+    {
+        /* Register, memory. */
+        IEM_MC_BEGIN(0, 2);
+        IEM_MC_LOCAL(RTUINT128U,                uSrc);
+        IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
+
+        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT();
+        IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE();
+
+        IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
+        IEM_MC_STORE_XREG_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, uSrc);
+
+        IEM_MC_ADVANCE_RIP();
+        IEM_MC_END();
+        return VINF_SUCCESS;
+    }
+
+    /**
+     * @opdone
+     * @opmnemonic  ud660f382areg
+     * @opcode      0x2a
+     * @opcodesub   11 mr/reg
+     * @oppfx       0x66
+     * @opunused    immediate
+     * @opcpuid     sse
+     * @optest      ->
+    * @oponly
+     */
+    return IEMOP_RAISE_INVALID_OPCODE();
+}
+
 /** Opcode 0x66 0x0f 0x38 0x2b. */
 FNIEMOP_STUB(iemOp_packusdw_Vx_Wx);
@@ -546 +594 @@
     /* 0x28 */  iemOp_InvalidNeedRM,        iemOp_pmuldq_Vx_Wx,         iemOp_InvalidNeedRM,        iemOp_InvalidNeedRM,
     /* 0x29 */  iemOp_InvalidNeedRM,        iemOp_pcmpeqq_Vx_Wx,        iemOp_InvalidNeedRM,        iemOp_InvalidNeedRM,
-    /* 0x2a */  iemOp_InvalidNeedRM,        iemOp_movntdqa_Vx_Mx,       iemOp_InvalidNeedRM,        iemOp_InvalidNeedRM,
+    /* 0x2a */  iemOp_InvalidNeedRM,        iemOp_movntdqa_Vdq_Mdq,     iemOp_InvalidNeedRM,        iemOp_InvalidNeedRM,
     /* 0x2b */  iemOp_InvalidNeedRM,        iemOp_packusdw_Vx_Wx,       iemOp_InvalidNeedRM,        iemOp_InvalidNeedRM,
     /* 0x2c */  IEMOP_X4(iemOp_InvalidNeedRM),

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -356 +356 @@
 #define IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT()          do {} while (0)
 #define IEM_MC_MAYBE_RAISE_SSE3_RELATED_XCPT()          do {} while (0)
+#define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT()         do {} while (0)
 #define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT()           do {} while (0)
 #define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO()              do {} while (0)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py

@@ -352 +352 @@
         assert len(oInstr.asCpuIds) in [0, 1], str(oInstr);
         if oInstr.asCpuIds:
-            self.sCpu += oInstr.asCpuIds[0].upper();
+            self.sCpu += oInstr.asCpuIds[0].upper().replace('.', '_');
         elif oInstr.sMinCpu:
             self.sCpu += 'GE_' + oInstr.sMinCpu;

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

@@ -2411 +2411 @@
 
 
-static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething(PBS3CG1STATE pThis, unsigned iEncoding)
+static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding)
 {
     unsigned off;
@@ -4188 +4188 @@
         case BS3CG1ENC_MODRM_VqHi_WO_Mq:
             return Bs3Cg1EncodeNext_MODRM_VqHi_WO_Mq(pThis, iEncoding);
-        case BS3CG1ENC_MODRM_Vdq_WO_Wdq:
-            return Bs3Cg1EncodeNext_MODRM_Vdq_WO_Wdq(pThis, iEncoding);
         case BS3CG1ENC_MODRM_Vpd_WO_Wpd:
         case BS3CG1ENC_MODRM_Vps_WO_Wps:
@@ -4408 +4406 @@
             break;
 
+        case BS3CG1ENC_MODRM_Vdq_WO_Mdq:
+            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething_OR_ViceVersa;
+            pThis->iRegOp            = 0;
+            pThis->iRmOp             = 1;
+            pThis->aOperands[0].cbOp = 16;
+            pThis->aOperands[1].cbOp = 16;
+            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX;
+            pThis->aOperands[1].enmLocation  = BS3CG1OPLOC_MEM;
+            pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
+            break;
+
         case BS3CG1ENC_MODRM_Vdq_WO_Wdq:
+            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_Vdq_WO_Wdq;
             pThis->iRmOp             = 1;
             pThis->iRegOp            = 0;
@@ -4566 +4576 @@
 
         case BS3CG1ENC_MODRM_Mdq_WO_Vdq:
-            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething;
+            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething_OR_ViceVersa;
             pThis->iRmOp             = 0;
             pThis->iRegOp            = 1;
@@ -4599 +4609 @@
         case BS3CG1ENC_MODRM_Mps_WO_Vps:
         case BS3CG1ENC_MODRM_Mpd_WO_Vpd:
-            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething;
+            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething_OR_ViceVersa;
             pThis->iRmOp             = 0;
             pThis->iRegOp            = 1;
@@ -5079 +5089 @@
         case BS3CG1CPU_SSE2:
         case BS3CG1CPU_SSE3:
+        case BS3CG1CPU_SSE4_1:
         case BS3CG1CPU_AVX:
         case BS3CG1CPU_AVX2:
@@ -5158 +5169 @@
         case BS3CG1CPU_SSE2:
         case BS3CG1CPU_SSE3:
+        case BS3CG1CPU_SSE4_1:
         case BS3CG1CPU_AVX:
             if (g_uBs3CpuDetected & BS3CPU_F_CPUID)
@@ -5174 +5186 @@
                     case BS3CG1CPU_SSE3:
                         if (fEcx & X86_CPUID_FEATURE_ECX_SSE3)
+                            return Bs3Cg3SetupSseAndAvx(pThis);
+                        return false;
+                    case BS3CG1CPU_SSE4_1:
+                        if (fEcx & X86_CPUID_FEATURE_ECX_SSE4_1)
                             return Bs3Cg3SetupSseAndAvx(pThis);
                         return false;

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

@@ -117 +117 @@
     BS3CG1OP_Md_RO,
     BS3CG1OP_Md_WO,
+    BS3CG1OP_Mdq,
     BS3CG1OP_Mdq_WO,
     BS3CG1OP_Mq,
@@ -165 +166 @@
     BS3CG1ENC_MODRM_VqHi_WO_Mq,
     BS3CG1ENC_MODRM_VqZx_WO_Eq_WNZ,
+    BS3CG1ENC_MODRM_Vdq_WO_Mdq,
     BS3CG1ENC_MODRM_Vdq_WO_Wdq,
     BS3CG1ENC_MODRM_Vpd_WO_Wpd,
@@ -262 +264 @@
     BS3CG1CPU_SSE2,
     BS3CG1CPU_SSE3,
+    BS3CG1CPU_SSE4_1,
     BS3CG1CPU_AVX,
     BS3CG1CPU_AVX2,