Changeset 67529 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Jun 21, 2017 8:29:25 AM (7 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r67157 r67529 114 114 #include <VBox/vmm/mm.h> 115 115 #include <VBox/vmm/em.h> 116 #include <VBox/vmm/iem.h> 116 117 #include <VBox/vmm/selm.h> 117 118 #include <VBox/vmm/dbgf.h> … … 173 174 static DECLCALLBACK(void) cpumR3InfoAll(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs); 174 175 static DECLCALLBACK(void) cpumR3InfoGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs); 176 static DECLCALLBACK(void) cpumR3InfoGuestHwvirt(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs); 175 177 static DECLCALLBACK(void) cpumR3InfoGuestInstr(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs); 176 178 static DECLCALLBACK(void) cpumR3InfoHyper(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs); … … 981 983 DBGFR3InfoRegisterInternalEx(pVM, "cpumguest", "Displays the guest cpu state.", 982 984 &cpumR3InfoGuest, DBGFINFO_FLAGS_ALL_EMTS); 985 DBGFR3InfoRegisterInternalEx(pVM, "cpumguesthwvirt", "Displays the guest hwvirt. cpu state.", 986 &cpumR3InfoGuestHwvirt, DBGFINFO_FLAGS_ALL_EMTS); 983 987 DBGFR3InfoRegisterInternalEx(pVM, "cpumhyper", "Displays the hypervisor cpu state.", 984 988 &cpumR3InfoHyper, DBGFINFO_FLAGS_ALL_EMTS); … … 2097 2101 cpumR3InfoGuest(pVM, pHlp, pszArgs); 2098 2102 cpumR3InfoGuestInstr(pVM, pHlp, pszArgs); 2103 cpumR3InfoGuestHwvirt(pVM, pHlp, pszArgs); 2099 2104 cpumR3InfoHyper(pVM, pHlp, pszArgs); 2100 2105 cpumR3InfoHost(pVM, pHlp, pszArgs); … … 2148 2153 * @param pVM The cross context VM structure. 2149 2154 * @param pHlp The info helper functions. 2150 * @param pszArgs Arguments , ignored.2155 * @param pszArgs Arguments. 2151 2156 */ 2152 2157 static DECLCALLBACK(void) cpumR3InfoGuest(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs) … … 2166 2171 } 2167 2172 2173 2174 /** 2175 * Display the guest's hardware-virtualization cpu state. 2176 * 2177 * @param pVM The cross context VM structure. 2178 * @param pHlp The info helper functions. 2179 * @param pszArgs Arguments, ignored. 2180 */ 2181 static DECLCALLBACK(void) cpumR3InfoGuestHwvirt(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs) 2182 { 2183 RT_NOREF(pszArgs); 2184 2185 PVMCPU pVCpu = VMMGetCpu(pVM); 2186 if (!pVCpu) 2187 pVCpu = &pVM->aCpus[0]; 2188 2189 /* 2190 * Figure out what to dump. 2191 * 2192 * In the future we may need to dump everything whether or not we're actively in nested-guest mode 2193 * or not, hence the reason why we use a mask to determine what needs dumping. Currently, we only 2194 * dump hwvirt. state when the guest CPU is executing a nested-guest. 2195 */ 2196 /** @todo perhaps make this configurable through pszArgs, depending on how much 2197 * noise we wish to accept when nested hwvirt. isn't used. */ 2198 #define CPUMHWVIRTDUMP_NONE (0) 2199 #define CPUMHWVIRTDUMP_SVM RT_BIT(0) 2200 #define CPUMHWVIRTDUMP_VMX RT_BIT(1) 2201 #define CPUMHWVIRTDUMP_COMMON RT_BIT(2) 2202 #define CPUMHWVIRTDUMP_LAST CPUMHWVIRTDUMP_VMX 2203 #define CPUMHWVIRTDUMP_ALL (CPUMHWVIRTDUMP_COMMON | CPUMHWVIRTDUMP_VMX | CPUMHWVIRTDUMP_SVM) 2204 2205 PCPUMCTX pCtx = &pVCpu->cpum.s.Guest; 2206 static const char *const s_aHwvirtModes[] = { "No/inactive", "SVM", "VMX", "Common" }; 2207 uint8_t const idxHwvirtState = CPUMIsGuestInSvmNestedHwVirtMode(pCtx) ? CPUMHWVIRTDUMP_SVM 2208 : CPUMIsGuestInVmxNestedHwVirtMode(pCtx) ? CPUMHWVIRTDUMP_VMX : CPUMHWVIRTDUMP_NONE; 2209 AssertCompile(CPUMHWVIRTDUMP_LAST <= RT_ELEMENTS(s_aHwvirtModes)); 2210 Assert(idxHwvirtState < RT_ELEMENTS(s_aHwvirtModes)); 2211 const char *pcszHwvirtMode = s_aHwvirtModes[idxHwvirtState]; 2212 uint32_t const fDumpState = idxHwvirtState; /* | CPUMHWVIRTDUMP_ALL */ 2213 2214 /* 2215 * Dump it. 2216 */ 2217 pHlp->pfnPrintf(pHlp, "VCPU[%u] hardware virtualization state:\n", pVCpu->idCpu); 2218 2219 if (fDumpState & CPUMHWVIRTDUMP_COMMON) 2220 pHlp->pfnPrintf(pHlp, "fLocalForcedActions = %#RX32\n", pCtx->hwvirt.fLocalForcedActions); 2221 pHlp->pfnPrintf(pHlp, "%s hwvirt state%s\n", pcszHwvirtMode, fDumpState ? ":" : ""); 2222 if (fDumpState & CPUMHWVIRTDUMP_SVM) 2223 { 2224 pHlp->pfnPrintf(pHlp, " uMsrHSavePa = %#RX64\n", pCtx->hwvirt.svm.uMsrHSavePa); 2225 pHlp->pfnPrintf(pHlp, " GCPhysVmcb = %#RGp\n", pCtx->hwvirt.svm.GCPhysVmcb); 2226 pHlp->pfnPrintf(pHlp, " VmcbCtrl:\n"); 2227 HMR3InfoSvmVmcbCtrl(pHlp, &pCtx->hwvirt.svm.VmcbCtrl, " " /* pszPrefix */); 2228 pHlp->pfnPrintf(pHlp, " HostState:\n"); 2229 pHlp->pfnPrintf(pHlp, " uEferMsr = %#RX64\n", pCtx->hwvirt.svm.HostState.uEferMsr); 2230 pHlp->pfnPrintf(pHlp, " uCr0 = %#RX64\n", pCtx->hwvirt.svm.HostState.uCr0); 2231 pHlp->pfnPrintf(pHlp, " uCr4 = %#RX64\n", pCtx->hwvirt.svm.HostState.uCr4); 2232 pHlp->pfnPrintf(pHlp, " uCr3 = %#RX64\n", pCtx->hwvirt.svm.HostState.uCr3); 2233 pHlp->pfnPrintf(pHlp, " uRip = %#RX64\n", pCtx->hwvirt.svm.HostState.uRip); 2234 pHlp->pfnPrintf(pHlp, " uRsp = %#RX64\n", pCtx->hwvirt.svm.HostState.uRsp); 2235 pHlp->pfnPrintf(pHlp, " uRax = %#RX64\n", pCtx->hwvirt.svm.HostState.uRax); 2236 pHlp->pfnPrintf(pHlp, " rflags = %#RX64\n", pCtx->hwvirt.svm.HostState.rflags.u64); 2237 PCPUMSELREG pSel = &pCtx->hwvirt.svm.HostState.es; 2238 pHlp->pfnPrintf(pHlp, " es = {%04x base=%016RX64 limit=%08x flags=%08x}\n", 2239 pSel->Sel, pSel->u64Base, pSel->u32Limit, pSel->fFlags); 2240 pSel = &pCtx->hwvirt.svm.HostState.cs; 2241 pHlp->pfnPrintf(pHlp, " cs = {%04x base=%016RX64 limit=%08x flags=%08x}\n", 2242 pSel->Sel, pSel->u64Base, pSel->u32Limit, pSel->fFlags); 2243 pSel = &pCtx->hwvirt.svm.HostState.ss; 2244 pHlp->pfnPrintf(pHlp, " ss = {%04x base=%016RX64 limit=%08x flags=%08x}\n", 2245 pSel->Sel, pSel->u64Base, pSel->u32Limit, pSel->fFlags); 2246 pSel = &pCtx->hwvirt.svm.HostState.ds; 2247 pHlp->pfnPrintf(pHlp, " ds = {%04x base=%016RX64 limit=%08x flags=%08x}\n", 2248 pSel->Sel, pSel->u64Base, pSel->u32Limit, pSel->fFlags); 2249 pHlp->pfnPrintf(pHlp, " gdtr = %016RX64:%04x\n", pCtx->hwvirt.svm.HostState.gdtr.pGdt, 2250 pCtx->hwvirt.svm.HostState.gdtr.cbGdt); 2251 pHlp->pfnPrintf(pHlp, " idtr = %016RX64:%04x\n", pCtx->hwvirt.svm.HostState.idtr.pIdt, 2252 pCtx->hwvirt.svm.HostState.idtr.cbIdt); 2253 pHlp->pfnPrintf(pHlp, " fGif = %u\n", pCtx->hwvirt.svm.fGif); 2254 pHlp->pfnPrintf(pHlp, " cPauseFilter = %RU16\n", pCtx->hwvirt.svm.cPauseFilter); 2255 pHlp->pfnPrintf(pHlp, " cPauseFilterThreshold = %RU32\n", pCtx->hwvirt.svm.cPauseFilterThreshold); 2256 pHlp->pfnPrintf(pHlp, " fInterceptEvents = %u\n", pCtx->hwvirt.svm.fInterceptEvents); 2257 pHlp->pfnPrintf(pHlp, " pvMsrBitmapR3 = %p\n", pCtx->hwvirt.svm.pvMsrBitmapR3); 2258 pHlp->pfnPrintf(pHlp, " pvMsrBitmapR0 = %RKv\n", pCtx->hwvirt.svm.pvMsrBitmapR0); 2259 pHlp->pfnPrintf(pHlp, " pvIoBitmapR3 = %p\n", pCtx->hwvirt.svm.pvIoBitmapR3); 2260 pHlp->pfnPrintf(pHlp, " pvIoBitmapR0 = %RKv\n", pCtx->hwvirt.svm.pvIoBitmapR0); 2261 } 2262 2263 /** @todo Intel. */ 2264 #if 0 2265 if (fDumpState & CPUMHWVIRTDUMP_VMX) 2266 { 2267 } 2268 #endif 2269 2270 #undef CPUMHWVIRTDUMP_NONE 2271 #undef CPUMHWVIRTDUMP_COMMON 2272 #undef CPUMHWVIRTDUMP_SVM 2273 #undef CPUMHWVIRTDUMP_VMX 2274 #undef CPUMHWVIRTDUMP_LAST 2275 #undef CPUMHWVIRTDUMP_ALL 2276 } 2168 2277 2169 2278 /** -
trunk/src/VBox/VMM/VMMR3/EM.cpp
r67204 r67529 1960 1960 { 1961 1961 bool fIntrEnabled; 1962 #ifdef VBOX_WITH_RAW_MODE 1963 fIntrEnabled = PATMAreInterruptsEnabled(pVM); 1964 #else 1965 fIntrEnabled = true; 1966 #endif 1967 /** @todo Can we centralize this under CPUMCanInjectInterrupt()? */ 1962 1968 PCPUMCTX pCtx = pVCpu->em.s.pCtx; 1963 #ifdef VBOX_WITH_RAW_MODE 1964 fIntrEnabled = PATMAreInterruptsEnabled(pVM); RT_NOREF(pCtx); 1965 #elif defined(VBOX_WITH_NESTED_HWVIRT) 1966 if (CPUMIsGuestInSvmNestedHwVirtMode(pCtx)) 1967 fIntrEnabled = HMSvmNstGstCanTakePhysInterrupt(pVCpu, pCtx); 1968 else 1969 fIntrEnabled = pCtx->eflags.Bits.u1IF; 1969 #ifdef VBOX_WITH_NESTED_HWVIRT 1970 fIntrEnabled &= pCtx->hwvirt.svm.fGif; 1971 if (fIntrEnabled) 1972 { 1973 if (CPUMIsGuestInSvmNestedHwVirtMode(pCtx)) 1974 fIntrEnabled = CPUMCanSvmNstGstTakePhysIntr(pCtx); 1975 else 1976 fIntrEnabled = pCtx->eflags.Bits.u1IF; 1977 } 1970 1978 #else 1971 1979 fIntrEnabled = pCtx->eflags.Bits.u1IF; … … 1980 1988 if (CPUMIsGuestSvmCtrlInterceptSet(pCtx, SVM_CTRL_INTERCEPT_INTR)) 1981 1989 { 1982 VBOXSTRICTRC rcStrict = HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_INTR, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */);1990 VBOXSTRICTRC rcStrict = IEMExecSvmVmexit(pVCpu, SVM_EXIT_INTR, 0, 0); 1983 1991 if (rcStrict == VINF_SVM_VMEXIT) 1984 1992 rc2 = VINF_EM_RESCHEDULE; … … 1997 2005 /** @todo this really isn't nice, should properly handle this */ 1998 2006 rc2 = TRPMR3InjectEvent(pVM, pVCpu, TRPM_HARDWARE_INT); 1999 if (pVM->em.s.fIemExecutesAll && (rc2 == VINF_EM_RESCHEDULE_REM || rc2 == VINF_EM_RESCHEDULE_HM || rc2 == VINF_EM_RESCHEDULE_RAW)) 2007 if (pVM->em.s.fIemExecutesAll && ( rc2 == VINF_EM_RESCHEDULE_REM 2008 || rc2 == VINF_EM_RESCHEDULE_HM 2009 || rc2 == VINF_EM_RESCHEDULE_RAW)) 2000 2010 rc2 = VINF_EM_RESCHEDULE; 2001 2011 #ifdef VBOX_STRICT … … 2013 2023 * Check nested-guest virtual interrupts. 2014 2024 */ 2015 if ( HMSvmNstGstCanTakeVirtInterrupt(pVCpu,pCtx))2025 if (CPUMCanSvmNstGstTakeVirtIntr(pCtx)) 2016 2026 { 2017 2027 if (CPUMIsGuestSvmCtrlInterceptSet(pCtx, SVM_CTRL_INTERCEPT_VINTR)) 2018 2028 { 2019 VBOXSTRICTRC rcStrict = HMSvmNstGstVmExit(pVCpu, pCtx, SVM_EXIT_VINTR, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */);2029 VBOXSTRICTRC rcStrict = IEMExecSvmVmexit(pVCpu, SVM_EXIT_VINTR, 0, 0); 2020 2030 if (rcStrict == VINF_SVM_VMEXIT) 2021 2031 rc2 = VINF_EM_RESCHEDULE; … … 2034 2044 */ 2035 2045 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST); 2036 uint8_t uNstGstVector = HMSvmNstGstGetInterrupt(pCtx);2046 uint8_t uNstGstVector = CPUMGetSvmNstGstInterrupt(pCtx); 2037 2047 TRPMAssertTrap(pVCpu, uNstGstVector, TRPM_HARDWARE_INT); 2048 Log(("EM: Asserting nested-guest virt. hardware intr: %#x\n", uNstGstVector)); 2038 2049 /** @todo reschedule to HM/REM later, when the HMR0 nested-guest execution is 2039 2050 * done. For now just reschedule to IEM. */ -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r66684 r67529 47 47 #include <VBox/vmm/dbgf.h> 48 48 #include <VBox/vmm/iom.h> 49 #include <VBox/vmm/iem.h> 49 50 #include <VBox/vmm/patm.h> 50 51 #include <VBox/vmm/csam.h> … … 2682 2683 Assert(HMIsEnabled(pVM)); 2683 2684 2685 #if defined(VBOX_WITH_NESTED_HWVIRT) && defined(VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM) 2686 if (CPUMIsGuestInNestedHwVirtMode(pCtx)) 2687 { 2688 Log(("HMR3CanExecuteGuest: In nested-guest mode - returning false")); 2689 return false; 2690 } 2691 #endif 2692 2684 2693 /* If we're still executing the IO code, then return false. */ 2685 2694 if ( RT_UNLIKELY(pVCpu->hm.s.EmulateIoBlock.fEnabled) … … 3593 3602 } 3594 3603 3604 3605 /** 3606 * Displays SVM VMCB controls. 3607 * 3608 * @param pHlp The info helper functions. 3609 * @param pVmcbCtrl Pointer to a SVM VMCB controls area. 3610 * @param pszPrefix Caller specified string prefix. 3611 */ 3612 VMMR3_INT_DECL(void) HMR3InfoSvmVmcbCtrl(PCDBGFINFOHLP pHlp, PCSVMVMCBCTRL pVmcbCtrl, const char *pszPrefix) 3613 { 3614 AssertReturnVoid(pHlp); 3615 AssertReturnVoid(pVmcbCtrl); 3616 3617 pHlp->pfnPrintf(pHlp, "%su16InterceptRdCRx = %#RX16\n", pszPrefix, pVmcbCtrl->u16InterceptRdCRx); 3618 pHlp->pfnPrintf(pHlp, "%su16InterceptWrCRx = %#RX16\n", pszPrefix, pVmcbCtrl->u16InterceptWrCRx); 3619 pHlp->pfnPrintf(pHlp, "%su16InterceptRdDRx = %#RX16\n", pszPrefix, pVmcbCtrl->u16InterceptRdDRx); 3620 pHlp->pfnPrintf(pHlp, "%su16InterceptWrDRx = %#RX16\n", pszPrefix, pVmcbCtrl->u16InterceptWrDRx); 3621 pHlp->pfnPrintf(pHlp, "%su32InterceptXcpt = %#RX32\n", pszPrefix, pVmcbCtrl->u32InterceptXcpt); 3622 pHlp->pfnPrintf(pHlp, "%su64InterceptCtrl = %#RX64\n", pszPrefix, pVmcbCtrl->u64InterceptCtrl); 3623 pHlp->pfnPrintf(pHlp, "%su16PauseFilterThreshold = %#RX16\n", pszPrefix, pVmcbCtrl->u16PauseFilterThreshold); 3624 pHlp->pfnPrintf(pHlp, "%su16PauseFilterCount = %#RX16\n", pszPrefix, pVmcbCtrl->u16PauseFilterCount); 3625 pHlp->pfnPrintf(pHlp, "%su64IOPMPhysAddr = %#RX64\n", pszPrefix, pVmcbCtrl->u64IOPMPhysAddr); 3626 pHlp->pfnPrintf(pHlp, "%su64MSRPMPhysAddr = %#RX64\n", pszPrefix, pVmcbCtrl->u64MSRPMPhysAddr); 3627 pHlp->pfnPrintf(pHlp, "%su64TSCOffset = %#RX64\n", pszPrefix, pVmcbCtrl->u64TSCOffset); 3628 pHlp->pfnPrintf(pHlp, "%sTLBCtrl\n", pszPrefix); 3629 pHlp->pfnPrintf(pHlp, "%s u32ASID = %#RX32\n", pszPrefix, pVmcbCtrl->TLBCtrl.n.u32ASID); 3630 pHlp->pfnPrintf(pHlp, "%s u8TLBFlush = %u\n", pszPrefix, pVmcbCtrl->TLBCtrl.n.u8TLBFlush); 3631 pHlp->pfnPrintf(pHlp, "%sIntCtrl\n", pszPrefix); 3632 pHlp->pfnPrintf(pHlp, "%s u8VTPR = %#RX8 (%u)\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u8VTPR, pVmcbCtrl->IntCtrl.n.u8VTPR); 3633 pHlp->pfnPrintf(pHlp, "%s u1VIrqPending = %RTbool\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u1VIrqPending); 3634 pHlp->pfnPrintf(pHlp, "%s u4VIntrPrio = %#RX8\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u4VIntrPrio); 3635 pHlp->pfnPrintf(pHlp, "%s u1IgnoreTPR = %RTbool\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u1IgnoreTPR); 3636 pHlp->pfnPrintf(pHlp, "%s u1VIntrMasking = %RTbool\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u1VIntrMasking); 3637 pHlp->pfnPrintf(pHlp, "%s u1AvicEnable = %RTbool\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u1AvicEnable); 3638 pHlp->pfnPrintf(pHlp, "%s u8VIntrVector = %#RX8\n", pszPrefix, pVmcbCtrl->IntCtrl.n.u8VIntrVector); 3639 pHlp->pfnPrintf(pHlp, "%su64IntShadow = %#RX64\n", pszPrefix, pVmcbCtrl->u64IntShadow); 3640 pHlp->pfnPrintf(pHlp, "%su64ExitCode = %#RX64\n", pszPrefix, pVmcbCtrl->u64ExitCode); 3641 pHlp->pfnPrintf(pHlp, "%su64ExitInfo1 = %#RX64\n", pszPrefix, pVmcbCtrl->u64ExitInfo1); 3642 pHlp->pfnPrintf(pHlp, "%su64ExitInfo2 = %#RX64\n", pszPrefix, pVmcbCtrl->u64ExitInfo2); 3643 pHlp->pfnPrintf(pHlp, "%sExitIntInfo\n", pszPrefix); 3644 pHlp->pfnPrintf(pHlp, "%s u8Vector = %#RX8 (%u)\n", pszPrefix, pVmcbCtrl->ExitIntInfo.n.u8Vector, pVmcbCtrl->ExitIntInfo.n.u8Vector); 3645 pHlp->pfnPrintf(pHlp, "%s u3Type = %u\n", pszPrefix, pVmcbCtrl->ExitIntInfo.n.u3Type); 3646 pHlp->pfnPrintf(pHlp, "%s u1ErrorCodeValid = %RTbool\n", pszPrefix, pVmcbCtrl->ExitIntInfo.n.u1ErrorCodeValid); 3647 pHlp->pfnPrintf(pHlp, "%s u1Valid = %RTbool\n", pszPrefix, pVmcbCtrl->ExitIntInfo.n.u1Valid); 3648 pHlp->pfnPrintf(pHlp, "%s u32ErrorCode = %#RX32\n", pszPrefix, pVmcbCtrl->ExitIntInfo.n.u32ErrorCode); 3649 pHlp->pfnPrintf(pHlp, "%sNestedPaging\n", pszPrefix); 3650 pHlp->pfnPrintf(pHlp, "%s u1NestedPaging = %RTbool\n", pszPrefix, pVmcbCtrl->NestedPaging.n.u1NestedPaging); 3651 pHlp->pfnPrintf(pHlp, "%sAvicBar\n", pszPrefix); 3652 pHlp->pfnPrintf(pHlp, "%s u40Addr = %#RX64\n", pszPrefix, pVmcbCtrl->AvicBar.n.u40Addr); 3653 pHlp->pfnPrintf(pHlp, "%sEventInject\n", pszPrefix); 3654 pHlp->pfnPrintf(pHlp, "%s EventInject\n", pszPrefix); 3655 pHlp->pfnPrintf(pHlp, "%s u8Vector = %#RX32 (%u)\n", pszPrefix, pVmcbCtrl->EventInject.n.u8Vector, pVmcbCtrl->EventInject.n.u8Vector); 3656 pHlp->pfnPrintf(pHlp, "%s u3Type = %u\n", pszPrefix, pVmcbCtrl->EventInject.n.u3Type); 3657 pHlp->pfnPrintf(pHlp, "%s u1ErrorCodeValid = %RTbool\n", pszPrefix, pVmcbCtrl->EventInject.n.u1ErrorCodeValid); 3658 pHlp->pfnPrintf(pHlp, "%s u1Valid = %RTbool\n", pszPrefix, pVmcbCtrl->EventInject.n.u1Valid); 3659 pHlp->pfnPrintf(pHlp, "%s u32ErrorCode = %#RX32\n", pszPrefix, pVmcbCtrl->EventInject.n.u32ErrorCode); 3660 pHlp->pfnPrintf(pHlp, "%su64NestedPagingCR3 = %#RX64\n", pszPrefix, pVmcbCtrl->u64NestedPagingCR3); 3661 pHlp->pfnPrintf(pHlp, "%su64LBRVirt = %#RX64\n", pszPrefix, pVmcbCtrl->u64LBRVirt); 3662 pHlp->pfnPrintf(pHlp, "%su64VmcbCleanBits = %#RX64\n", pszPrefix, pVmcbCtrl->u64VmcbCleanBits); 3663 pHlp->pfnPrintf(pHlp, "%su64NextRIP = %#RX64\n", pszPrefix, pVmcbCtrl->u64NextRIP); 3664 pHlp->pfnPrintf(pHlp, "%scbInstrFetched = %u\n", pszPrefix, pVmcbCtrl->cbInstrFetched); 3665 pHlp->pfnPrintf(pHlp, "%sabInstr = %.*Rhxs\n", pszPrefix, sizeof(pVmcbCtrl->abInstr), pVmcbCtrl->abInstr); 3666 pHlp->pfnPrintf(pHlp, "%sAvicBackingPagePtr\n", pszPrefix); 3667 pHlp->pfnPrintf(pHlp, "%s u40Addr = %#RX64\n", pszPrefix, pVmcbCtrl->AvicBackingPagePtr.n.u40Addr); 3668 pHlp->pfnPrintf(pHlp, "%sAvicLogicalTablePtr\n", pszPrefix); 3669 pHlp->pfnPrintf(pHlp, "%s u40Addr = %#RX64\n", pszPrefix, pVmcbCtrl->AvicLogicalTablePtr.n.u40Addr); 3670 pHlp->pfnPrintf(pHlp, "%sAvicPhysicalTablePtr\n", pszPrefix); 3671 pHlp->pfnPrintf(pHlp, "%s u8LastGuestCoreId = %u\n", pszPrefix, pVmcbCtrl->AvicPhysicalTablePtr.n.u8LastGuestCoreId); 3672 pHlp->pfnPrintf(pHlp, "%s u40Addr = %#RX64\n", pszPrefix, pVmcbCtrl->AvicPhysicalTablePtr.n.u40Addr); 3673 } 3674 -
trunk/src/VBox/VMM/VMMR3/VM.cpp
r66096 r67529 2309 2309 DBGFR3InfoEx(pVM->pUVM, pVCpu->idCpu, "cpumguest", "verbose", DBGFR3InfoLogRelHlp()); 2310 2310 RTLogRelPrintf("***\n"); 2311 DBGFR3InfoEx(pVM->pUVM, pVCpu->idCpu, "cpumguesthwvirt", "verbose", DBGFR3InfoLogRelHlp()); 2312 RTLogRelPrintf("***\n"); 2311 2313 DBGFR3InfoEx(pVM->pUVM, pVCpu->idCpu, "mode", NULL, DBGFR3InfoLogRelHlp()); 2312 2314 RTLogRelPrintf("***\n"); … … 2341 2343 RTLogRelPrintf("****************** Guest state at power off for VCpu %u ******************\n", pVCpu->idCpu); 2342 2344 DBGFR3InfoEx(pVM->pUVM, pVCpu->idCpu, "cpumguest", "verbose", DBGFR3InfoLogRelHlp()); 2345 RTLogRelPrintf("***\n"); 2346 DBGFR3InfoEx(pVM->pUVM, pVCpu->idCpu, "cpumguesthwvirt", "verbose", DBGFR3InfoLogRelHlp()); 2343 2347 RTLogRelPrintf("***\n"); 2344 2348 DBGFR3InfoEx(pVM->pUVM, pVCpu->idCpu, "mode", NULL, DBGFR3InfoLogRelHlp()); -
trunk/src/VBox/VMM/VMMR3/VMMGuruMeditation.cpp
r65650 r67529 654 654 DBGFR3Info(pVM->pUVM, "cpumguest", NULL, pHlp); 655 655 DBGFR3Info(pVM->pUVM, "cpumguestinstr", NULL, pHlp); 656 DBGFR3Info(pVM->pUVM, "cpumguesthwvirt", NULL, pHlp); 656 657 break; 657 658 } … … 675 676 } const aInfo[] = 676 677 { 677 { "mappings", NULL }, 678 { "hma", NULL }, 679 { "cpumguest", "verbose" }, 680 { "cpumguestinstr", "verbose" }, 681 { "cpumhyper", "verbose" }, 682 { "cpumhost", "verbose" }, 683 { "mode", "all" }, 684 { "cpuid", "verbose" }, 685 { "handlers", "phys virt hyper stats" }, 686 { "timers", NULL }, 687 { "activetimers", NULL }, 678 { "mappings", NULL }, 679 { "hma", NULL }, 680 { "cpumguest", "verbose" }, 681 { "cpumguesthwvirt", "verbose" }, 682 { "cpumguestinstr", "verbose" }, 683 { "cpumhyper", "verbose" }, 684 { "cpumhost", "verbose" }, 685 { "mode", "all" }, 686 { "cpuid", "verbose" }, 687 { "handlers", "phys virt hyper stats" }, 688 { "timers", NULL }, 689 { "activetimers", NULL }, 688 690 }; 689 691 for (unsigned i = 0; i < RT_ELEMENTS(aInfo); i++) … … 702 704 DBGFR3InfoMulti(pVM, 703 705 "*", 704 "mappings|hma|cpum|cpumguest|cpumguest instr|cpumhyper|cpumhost|mode|cpuid"706 "mappings|hma|cpum|cpumguest|cpumguesthwvirt|cpumguestinstr|cpumhyper|cpumhost|mode|cpuid" 705 707 "|pgmpd|pgmcr3|timers|activetimers|handlers|help", 706 708 "!!\n"
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