VirtualBox

Changeset 6855 in vbox


Ignore:
Timestamp:
Feb 7, 2008 7:27:06 PM (17 years ago)
Author:
vboxsync
Message:

Moved pgmGuestROMWriteHandler from PGMAllHandler.cpp to PGMAllPhys.cpp where it belongs.

Location:
trunk/src/VBox/VMM/VMMAll
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

    r6854 r6855  
    993993}
    994994
    995 #ifndef IN_RING3
    996 
    997 /**
    998  * \#PF Handler callback for Guest ROM range write access.
    999  * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
    1000  *
    1001  * @returns VBox status code (appropritate for trap handling and GC return).
    1002  * @param   pVM         VM Handle.
    1003  * @param   uErrorCode  CPU Error code.
    1004  * @param   pRegFrame   Trap register frame.
    1005  * @param   pvFault     The fault address (cr2).
    1006  * @param   GCPhysFault The GC physical address corresponding to pvFault.
    1007  * @param   pvUser      User argument. Pointer to the ROM range structure.
    1008  */
    1009 PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
    1010 {
    1011     int rc;
    1012 #ifdef VBOX_WITH_NEW_PHYS_CODE
    1013     PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
    1014     uint32_t iPage = GCPhysFault - pRom->GCPhys;
    1015     Assert(iPage < (pRom->cb >> PAGE_SHIFT));
    1016     switch (pRom->aPages[iPage].enmProt)
    1017     {
    1018         case PGMROMPROT_READ_ROM_WRITE_IGNORE:
    1019         case PGMROMPROT_READ_RAM_WRITE_IGNORE:
    1020         {
    1021 #endif
    1022             /*
    1023              * If it's a simple instruction which doesn't change the cpu state
    1024              * we will simply skip it. Otherwise we'll have to defer it to REM.
    1025              */
    1026             uint32_t cbOp;
    1027             DISCPUSTATE Cpu;
    1028             rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
    1029             if (     RT_SUCCESS(rc)
    1030                 &&   Cpu.mode == CPUMODE_32BIT
    1031                 &&  !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
    1032             {
    1033                 switch (Cpu.opcode)
    1034                 {
    1035                     /** @todo Find other instructions we can safely skip, possibly
    1036                      * adding this kind of detection to DIS or EM. */
    1037                     case OP_MOV:
    1038                         pRegFrame->eip += cbOp;
    1039                         STAM_COUNTER_INC(&pVM->pgm.s.StatGCGuestROMWriteHandled);
    1040                         return VINF_SUCCESS;
    1041                 }
    1042             }
    1043             else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
    1044                 return rc;
    1045 #ifdef VBOX_WITH_NEW_PHYS_CODE
    1046             break;
    1047         }
    1048 
    1049         case PGMROMPROT_READ_RAM_WRITE_RAM:
    1050             rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
    1051             AssertRC(rc);
    1052         case PGMROMPROT_READ_ROM_WRITE_RAM:
    1053             /* Handle it in ring-3 because it's *way* easier there. */
    1054             break;
    1055 
    1056         default:
    1057             AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
    1058                                    pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
    1059                                   VERR_INTERNAL_ERROR);
    1060     }
    1061 #endif
    1062 
    1063     STAM_COUNTER_INC(&pVM->pgm.s.StatGCGuestROMWriteUnhandled);
    1064     return VINF_EM_RAW_EMULATE_INSTR;
    1065 }
    1066 
    1067 #endif /* IN_RING3 */
  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r6854 r6855  
    3535#include <VBox/vmm.h>
    3636#include <VBox/iom.h>
     37#include <VBox/em.h>
    3738#include <VBox/rem.h>
    3839#include "PGMInternal.h"
     
    4950
    5051
     52
     53#ifndef IN_RING3
     54
     55/**
     56 * \#PF Handler callback for Guest ROM range write access.
     57 * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
     58 *
     59 * @returns VBox status code (appropritate for trap handling and GC return).
     60 * @param   pVM         VM Handle.
     61 * @param   uErrorCode  CPU Error code.
     62 * @param   pRegFrame   Trap register frame.
     63 * @param   pvFault     The fault address (cr2).
     64 * @param   GCPhysFault The GC physical address corresponding to pvFault.
     65 * @param   pvUser      User argument. Pointer to the ROM range structure.
     66 */
     67PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
     68{
     69    int rc;
     70#ifdef VBOX_WITH_NEW_PHYS_CODE
     71    PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
     72    uint32_t iPage = GCPhysFault - pRom->GCPhys;
     73    Assert(iPage < (pRom->cb >> PAGE_SHIFT));
     74    switch (pRom->aPages[iPage].enmProt)
     75    {
     76        case PGMROMPROT_READ_ROM_WRITE_IGNORE:
     77        case PGMROMPROT_READ_RAM_WRITE_IGNORE:
     78        {
     79#endif
     80            /*
     81             * If it's a simple instruction which doesn't change the cpu state
     82             * we will simply skip it. Otherwise we'll have to defer it to REM.
     83             */
     84            uint32_t cbOp;
     85            DISCPUSTATE Cpu;
     86            rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
     87            if (     RT_SUCCESS(rc)
     88                &&   Cpu.mode == CPUMODE_32BIT
     89                &&  !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
     90            {
     91                switch (Cpu.opcode)
     92                {
     93                    /** @todo Find other instructions we can safely skip, possibly
     94                     * adding this kind of detection to DIS or EM. */
     95                    case OP_MOV:
     96                        pRegFrame->eip += cbOp;
     97                        STAM_COUNTER_INC(&pVM->pgm.s.StatGCGuestROMWriteHandled);
     98                        return VINF_SUCCESS;
     99                }
     100            }
     101            else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
     102                return rc;
     103#ifdef VBOX_WITH_NEW_PHYS_CODE
     104            break;
     105        }
     106
     107        case PGMROMPROT_READ_RAM_WRITE_RAM:
     108            rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
     109            AssertRC(rc);
     110        case PGMROMPROT_READ_ROM_WRITE_RAM:
     111            /* Handle it in ring-3 because it's *way* easier there. */
     112            break;
     113
     114        default:
     115            AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
     116                                   pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
     117                                  VERR_INTERNAL_ERROR);
     118    }
     119#endif
     120
     121    STAM_COUNTER_INC(&pVM->pgm.s.StatGCGuestROMWriteUnhandled);
     122    return VINF_EM_RAW_EMULATE_INSTR;
     123}
     124
     125#endif /* IN_RING3 */
    51126
    52127/**
     
    22682343/// @todo PGMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
    22692344
     2345
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