Changeset 69409 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Oct 27, 2017 4:14:12 AM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

118738

Message:

VMM/IEM: Nested Hw.virt: VMRUN fixes.

File:

• trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h (modified) (8 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h

@@ -72 +72 @@
      */
     int rc = PGMChangeMode(pVCpu, pCtx->cr0 | X86_CR0_PE, pCtx->cr4, pCtx->msrEFER);
+#ifdef IN_RING3
+    Assert(rc != VINF_PGM_CHANGE_MODE);
+#endif
     AssertRCReturn(rc, rc);
 
@@ -239 +242 @@
              * Reload the guest's "host state".
              */
-            CPUMSvmVmExitRestoreHostState(pCtx);
+            CPUMSvmVmExitRestoreHostState(pVCpu, pCtx);
 
             /*
@@ -291 +294 @@
     LogFlow(("iemSvmVmrun\n"));
 
+#ifdef IN_RING0
+    /*
+     * Until PGM can handle switching the guest paging mode in ring-0,
+     * there's no point in trying to emulate VMRUN in ring-0 as we have
+     * to go back to ring-3 anyway, see @bugref{7243#c48}.
+     */
+    return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
+#endif
+
     /*
      * Cache the physical address of the VMCB for #VMEXIT exceptions.
@@ -451 +463 @@
         /*
          * Continue validating guest-state and controls.
-         */
-        /* EFER, CR0 and CR4. */
+         *
+         * We pass CR0 as 0 to CPUMQueryValidatedGuestEfer below to skip the illegal
+         * EFER.LME bit transition check. We pass the nested-guest's EFER as both the
+         * old and new EFER value to not have any guest EFER bits influence the new
+         * nested-guest EFER.
+         */
         uint64_t uValidEfer;
-        rc = CPUMQueryValidatedGuestEfer(pVM, pVmcbNstGst->u64CR0, pVmcbNstGst->u64EFER, pVmcbNstGst->u64EFER, &uValidEfer);
+        rc = CPUMQueryValidatedGuestEfer(pVM, 0 /* CR0 */, pVmcbNstGst->u64EFER, pVmcbNstGst->u64EFER, &uValidEfer);
         if (RT_FAILURE(rc))
         {
@@ -460 +476 @@
             return iemSvmVmexit(pVCpu, pCtx, SVM_EXIT_INVALID, 0 /* uExitInfo1 */, 0 /* uExitInfo2 */);
         }
+
+        /* Validate paging and CPU mode bits. */
         bool const fSvm                     = RT_BOOL(uValidEfer & MSR_K6_EFER_SVME);
         bool const fLongModeSupported       = RT_BOOL(pVM->cpum.ro.GuestFeatures.fLongMode);
@@ -546 +564 @@
         pCtx->rsp        = pVmcbNstGst->u64RSP;
         pCtx->rip        = pVmcbNstGst->u64RIP;
-        pCtx->msrEFER    = uValidEfer;
+        CPUMSetGuestMsrEferNoCheck(pVCpu, pCtx->msrEFER, uValidEfer);
 
         /* Mask DR6, DR7 bits mandatory set/clear bits. */
@@ -569 +587 @@
         { /* likely */ }
         else if (RT_SUCCESS(rcStrict))
+        {
+            LogFlow(("iemSvmVmrun: iemSvmWorldSwitch returned %Rrc, setting passup status\n", VBOXSTRICTRC_VAL(rcStrict)));
             rcStrict = iemSetPassUpStatus(pVCpu, rcStrict);
+        }
         else
         {
@@ -634 +655 @@
                      pCtx->cs.Sel, pCtx->rip, pCtx->cr0, pCtx->cr3, pCtx->cr4, pCtx->msrEFER, pCtx->rflags.u64));
 
+        LogFlow(("iemSvmVmrun: returns %d\n", VBOXSTRICTRC_VAL(rcStrict)));
         return rcStrict;
     }