- Timestamp:
- Nov 10, 2017 6:42:55 PM (7 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core2_X6800_2_93GHz.h
r69586 r69653 25 25 * CPUID leaves for Intel(R) Core(TM)2 CPU X6800 @ 2.93GHz. 26 26 */ 27 static CPUMCPUIDLEAF const g_aCpuIdLeaves_Intel_Core2_X6800_2_93GHz[] = 27 static CPUMCPUIDLEAF const g_aCpuIdLeaves_Intel_Core2_X6800_2_93GHz[] = 28 28 { 29 29 { 0x00000000, 0x00000000, 0x00000000, 0x0000000a, 0x756e6547, 0x6c65746e, 0x49656e69, 0 }, … … 58 58 * MSR ranges for Intel(R) Core(TM)2 CPU X6800 @ 2.93GHz. 59 59 */ 60 static CPUMMSRRANGE const g_aMsrRanges_Intel_Core2_X6800_2_93GHz[] = 60 static CPUMMSRRANGE const g_aMsrRanges_Intel_Core2_X6800_2_93GHz[] = 61 61 { 62 62 MFX(0x00000000, "IA32_P5_MC_ADDR", Ia32P5McAddr, Ia32P5McAddr, 0, UINT64_C(0xfffffffffffbffff), 0), /* value=0x1398780 */ … … 232 232 * Database entry for Intel(R) Core(TM)2 CPU X6800 @ 2.93GHz. 233 233 */ 234 static CPUMDBENTRY const g_Entry_Intel_Core2_X6800_2_93GHz = 234 static CPUMDBENTRY const g_Entry_Intel_Core2_X6800_2_93GHz = 235 235 { 236 236 /*.pszName = */ "Intel Core2 X6800 2.93GHz", -
trunk/src/VBox/VMM/tools/MsrLinux.cpp
r69584 r69653 33 33 #define MSR_DEV_NAME "/dev/cpu/0/msr" 34 34 35 35 36 /********************************************************************************************************************************* 36 37 * Structures and Typedefs * 37 38 *********************************************************************************************************************************/ 39 38 40 39 41 /********************************************************************************************************************************* -
trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp
r69585 r69653 41 41 42 42 #include "VBoxCpuReport.h" 43 43 44 44 45 /********************************************************************************************************************************* … … 2551 2552 return VBCPUREPBADNESS_BOND_VILLAIN; 2552 2553 2553 /* 2554 * The TSC is tricky -- writing it isn't a problem, but if we put back the original 2555 * value, we'll throw it out of whack. If we're on an SMP OS that uses the TSC for timing, 2554 /* 2555 * The TSC is tricky -- writing it isn't a problem, but if we put back the original 2556 * value, we'll throw it out of whack. If we're on an SMP OS that uses the TSC for timing, 2556 2557 * we'll likely kill it, especially if we can't do the modification very quickly. 2557 2558 */ … … 2561 2562 break; 2562 2563 2563 /* 2564 * The following MSRs are not safe to modify in a typical OS if we can't do it atomically, 2565 * i.e. read/modify/restore without allowing any other code to execute. Everything related 2564 /* 2565 * The following MSRs are not safe to modify in a typical OS if we can't do it atomically, 2566 * i.e. read/modify/restore without allowing any other code to execute. Everything related 2566 2567 * to syscalls will blow up in our face if we go back to userland with modified MSRs. 2567 */ 2568 */ 2568 2569 // case 0x0000001b: /* IA32_APIC_BASE */ 2569 2570 case 0xc0000081: /* MSR_K6_STAR */ -
trunk/src/VBox/VMM/tools/VBoxCpuReport.h
r69584 r69653 28 28 extern int PlatformMsrProberInit(VBMSRFNS *fnsMsr, bool *pfAtomicMsrMod); 29 29 30
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