Changeset 69801 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- Nov 22, 2017 8:39:16 AM (7 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r69787 r69801 4621 4621 Assert(pSvmTransient->u64ExitCode <= SVM_EXIT_MAX); 4622 4622 4623 #define HM_SVM_RET_VMEXIT_NESTED(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \ 4624 do \ 4625 { \ 4626 return VBOXSTRICTRC_TODO(IEMExecSvmVmexit(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2)); \ 4627 } while (0) \ 4623 #define HM_SVM_VMEXIT_NESTED(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \ 4624 VBOXSTRICTRC_TODO(IEMExecSvmVmexit(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2)) 4625 #define HM_SVM_IS_CTRL_INTERCEPT_SET(a_pCtx, a_Intercept) CPUMIsGuestSvmCtrlInterceptSet(a_pCtx, (a_Intercept)) 4626 #define HM_SVM_IS_XCPT_INTERCEPT_SET(a_pCtx, a_Xcpt) CPUMIsGuestSvmXcptInterceptSet(a_pCtx, (a_Xcpt)) 4627 #define HM_SVM_IS_READ_CR_INTERCEPT_SET(a_pCtx, a_uCr) CPUMIsGuestSvmReadCRxInterceptSet(a_pCtx, (a_uCr)) 4628 #define HM_SVM_IS_READ_DR_INTERCEPT_SET(a_pCtx, a_uDr) CPUMIsGuestSvmReadDRxInterceptSet(a_pCtx, (a_uDr)) 4629 #define HM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pCtx, a_uCr) CPUMIsGuestSvmWriteCRxInterceptSet(a_pCtx, (a_uCr)) 4630 #define HM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pCtx, a_uDr) CPUMIsGuestSvmWriteDRxInterceptSet(a_pCtx, (a_uDr)) 4628 4631 4629 4632 /* … … 4633 4636 PSVMVMCB pVmcbNstGst = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); 4634 4637 PSVMVMCBCTRL pVmcbNstGstCtrl = &pVmcbNstGst->ctrl; 4635 PSVMNESTEDVMCBCACHE pVmcbNstGstCache = &pVCpu->hm.s.svm.NstGstVmcbCache;4636 4638 uint64_t const uExitCode = pVmcbNstGstCtrl->u64ExitCode; 4637 4639 uint64_t const uExitInfo1 = pVmcbNstGstCtrl->u64ExitInfo1; … … 4643 4645 case SVM_EXIT_CPUID: 4644 4646 { 4645 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_CPUID)4646 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4647 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_CPUID)) 4648 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4647 4649 return hmR0SvmExitCpuid(pVCpu, pCtx, pSvmTransient); 4648 4650 } … … 4650 4652 case SVM_EXIT_RDTSC: 4651 4653 { 4652 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_RDTSC)4653 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4654 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_RDTSC)) 4655 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4654 4656 return hmR0SvmExitRdtsc(pVCpu, pCtx, pSvmTransient); 4655 4657 } … … 4657 4659 case SVM_EXIT_RDTSCP: 4658 4660 { 4659 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_RDTSCP)4660 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4661 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_RDTSCP)) 4662 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4661 4663 return hmR0SvmExitRdtscp(pVCpu, pCtx, pSvmTransient); 4662 4664 } … … 4665 4667 case SVM_EXIT_MONITOR: 4666 4668 { 4667 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_MONITOR)4668 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4669 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_MONITOR)) 4670 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4669 4671 return hmR0SvmExitMonitor(pVCpu, pCtx, pSvmTransient); 4670 4672 } … … 4672 4674 case SVM_EXIT_MWAIT: 4673 4675 { 4674 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_MWAIT)4675 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4676 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_MWAIT)) 4677 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4676 4678 return hmR0SvmExitMwait(pVCpu, pCtx, pSvmTransient); 4677 4679 } … … 4679 4681 case SVM_EXIT_HLT: 4680 4682 { 4681 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_HLT)4682 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4683 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_HLT)) 4684 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4683 4685 return hmR0SvmExitHlt(pVCpu, pCtx, pSvmTransient); 4684 4686 } … … 4686 4688 case SVM_EXIT_MSR: 4687 4689 { 4688 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_MSR_PROT)4690 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_MSR_PROT)) 4689 4691 { 4690 4692 uint32_t const idMsr = pCtx->ecx; … … 4701 4703 || (fInterceptRead && pVmcbNstGstCtrl->u64ExitInfo1 == SVM_EXIT1_MSR_READ)) 4702 4704 { 4703 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4705 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4704 4706 } 4705 4707 } … … 4711 4713 */ 4712 4714 Assert(rc == VERR_OUT_OF_RANGE); 4713 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4715 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4714 4716 } 4715 4717 } … … 4722 4724 * Figure out if the IO port access is intercepted by the nested-guest. 4723 4725 */ 4724 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_IOIO_PROT)4726 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_IOIO_PROT)) 4725 4727 { 4726 4728 void *pvIoBitmap = pCtx->hwvirt.svm.CTX_SUFF(pvIoBitmap); … … 4729 4731 bool const fIntercept = hmR0SvmIsIoInterceptActive(pvIoBitmap, &IoExitInfo); 4730 4732 if (fIntercept) 4731 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4733 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4732 4734 } 4733 4735 return hmR0SvmExitIOInstr(pVCpu, pCtx, pSvmTransient); … … 4743 4745 4744 4746 /* If the nested-guest is intercepting #PFs, cause a #PF #VMEXIT. */ 4745 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_PF))4746 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, u32ErrCode, uFaultAddress);4747 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_PF)) 4748 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, u32ErrCode, uFaultAddress); 4747 4749 4748 4750 /* If the nested-guest is not intercepting #PFs, forward the #PF to the nested-guest. */ … … 4755 4757 case SVM_EXIT_EXCEPTION_7: /* X86_XCPT_NM */ 4756 4758 { 4757 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_NM))4758 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4759 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_NM)) 4760 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4759 4761 hmR0SvmSetPendingXcptNM(pVCpu); 4760 4762 return VINF_SUCCESS; … … 4763 4765 case SVM_EXIT_EXCEPTION_6: /* X86_XCPT_UD */ 4764 4766 { 4765 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_UD))4766 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4767 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_UD)) 4768 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4767 4769 hmR0SvmSetPendingXcptUD(pVCpu); 4768 4770 return VINF_SUCCESS; … … 4771 4773 case SVM_EXIT_EXCEPTION_16: /* X86_XCPT_MF */ 4772 4774 { 4773 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_MF))4774 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4775 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_MF)) 4776 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4775 4777 hmR0SvmSetPendingXcptMF(pVCpu); 4776 4778 return VINF_SUCCESS; … … 4779 4781 case SVM_EXIT_EXCEPTION_1: /* X86_XCPT_DB */ 4780 4782 { 4781 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_DB))4782 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4783 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_DB)) 4784 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4783 4785 return hmR0SvmNestedExitXcptDB(pVCpu, pCtx, pSvmTransient); 4784 4786 } … … 4786 4788 case SVM_EXIT_EXCEPTION_17: /* X86_XCPT_AC */ 4787 4789 { 4788 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_AC))4789 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4790 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_AC)) 4791 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4790 4792 return hmR0SvmExitXcptAC(pVCpu, pCtx, pSvmTransient); 4791 4793 } … … 4793 4795 case SVM_EXIT_EXCEPTION_3: /* X86_XCPT_BP */ 4794 4796 { 4795 if ( pVmcbNstGstCache->u32InterceptXcpt & RT_BIT(X86_XCPT_BP))4796 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4797 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, X86_XCPT_BP)) 4798 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4797 4799 return hmR0SvmNestedExitXcptBP(pVCpu, pCtx, pSvmTransient); 4798 4800 } … … 4802 4804 case SVM_EXIT_READ_CR4: 4803 4805 { 4804 if ( pVmcbNstGstCache->u16InterceptRdCRx & (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_READ_CR0)))4805 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4806 if (HM_SVM_IS_READ_CR_INTERCEPT_SET(pCtx, (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_READ_CR0)))) 4807 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4806 4808 return hmR0SvmExitReadCRx(pVCpu, pCtx, pSvmTransient); 4807 4809 } … … 4813 4815 { 4814 4816 Log4(("hmR0SvmHandleExitNested: Write CRx: u16InterceptWrCRx=%#x u64ExitCode=%#RX64 %#x\n", 4815 pVmcbNstGstC ache->u16InterceptWrCRx, pSvmTransient->u64ExitCode,4817 pVmcbNstGstCtrl->u16InterceptWrCRx, pSvmTransient->u64ExitCode, 4816 4818 (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_WRITE_CR0)))); 4817 if (pVmcbNstGstCache->u16InterceptWrCRx & (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_WRITE_CR0))) 4818 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4819 4820 if (HM_SVM_IS_WRITE_CR_INTERCEPT_SET(pCtx, (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_WRITE_CR0)))) 4821 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4819 4822 return hmR0SvmExitWriteCRx(pVCpu, pCtx, pSvmTransient); 4820 4823 } … … 4822 4825 case SVM_EXIT_PAUSE: 4823 4826 { 4824 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_PAUSE)4825 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4827 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_PAUSE)) 4828 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4826 4829 return hmR0SvmExitPause(pVCpu, pCtx, pSvmTransient); 4827 4830 } … … 4829 4832 case SVM_EXIT_VINTR: 4830 4833 { 4831 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_VINTR)4832 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4834 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_VINTR)) 4835 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4833 4836 return hmR0SvmExitUnexpected(pVCpu, pCtx, pSvmTransient); 4834 4837 } … … 4842 4845 case SVM_EXIT_FERR_FREEZE: 4843 4846 { 4844 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_FERR_FREEZE)4845 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4847 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_FERR_FREEZE)) 4848 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4846 4849 return hmR0SvmExitIntr(pVCpu, pCtx, pSvmTransient); 4847 4850 } … … 4849 4852 case SVM_EXIT_NMI: 4850 4853 { 4851 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_NMI)4852 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4854 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_NMI)) 4855 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4853 4856 return hmR0SvmExitIntr(pVCpu, pCtx, pSvmTransient); 4854 4857 } … … 4856 4859 case SVM_EXIT_INVLPG: 4857 4860 { 4858 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_INVLPG)4859 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4861 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_INVLPG)) 4862 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4860 4863 return hmR0SvmExitInvlpg(pVCpu, pCtx, pSvmTransient); 4861 4864 } … … 4863 4866 case SVM_EXIT_WBINVD: 4864 4867 { 4865 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_WBINVD)4866 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4868 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_WBINVD)) 4869 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4867 4870 return hmR0SvmExitWbinvd(pVCpu, pCtx, pSvmTransient); 4868 4871 } … … 4870 4873 case SVM_EXIT_INVD: 4871 4874 { 4872 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_INVD)4873 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4875 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_INVD)) 4876 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4874 4877 return hmR0SvmExitInvd(pVCpu, pCtx, pSvmTransient); 4875 4878 } … … 4877 4880 case SVM_EXIT_RDPMC: 4878 4881 { 4879 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_RDPMC)4880 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4882 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_RDPMC)) 4883 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4881 4884 return hmR0SvmExitRdpmc(pVCpu, pCtx, pSvmTransient); 4882 4885 } … … 4891 4894 case SVM_EXIT_READ_DR14: case SVM_EXIT_READ_DR15: 4892 4895 { 4893 if ( pVmcbNstGstCache->u16InterceptRdDRx & (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_READ_DR0)))4894 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4896 if (HM_SVM_IS_READ_DR_INTERCEPT_SET(pCtx, (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_READ_DR0)))) 4897 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4895 4898 return hmR0SvmExitReadDRx(pVCpu, pCtx, pSvmTransient); 4896 4899 } … … 4901 4904 case SVM_EXIT_WRITE_DR14: case SVM_EXIT_WRITE_DR15: 4902 4905 { 4903 if ( pVmcbNstGstCache->u16InterceptWrDRx & (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_WRITE_DR0)))4904 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4906 if (HM_SVM_IS_WRITE_DR_INTERCEPT_SET(pCtx, (1U << (uint16_t)(pSvmTransient->u64ExitCode - SVM_EXIT_WRITE_DR0)))) 4907 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4905 4908 return hmR0SvmExitWriteDRx(pVCpu, pCtx, pSvmTransient); 4906 4909 } … … 4919 4922 case SVM_EXIT_EXCEPTION_30: case SVM_EXIT_EXCEPTION_31: 4920 4923 { 4921 if ( pVmcbNstGstCache->u32InterceptXcpt & (1U <<(uint32_t)(pSvmTransient->u64ExitCode - SVM_EXIT_EXCEPTION_0)))4922 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4924 if (HM_SVM_IS_XCPT_INTERCEPT_SET(pCtx, (uint32_t)(pSvmTransient->u64ExitCode - SVM_EXIT_EXCEPTION_0))) 4925 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4923 4926 /** @todo Write hmR0SvmExitXcptGeneric! */ 4924 4927 return VERR_NOT_IMPLEMENTED; … … 4927 4930 case SVM_EXIT_XSETBV: 4928 4931 { 4929 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_XSETBV)4930 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4932 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_XSETBV)) 4933 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4931 4934 return hmR0SvmExitXsetbv(pVCpu, pCtx, pSvmTransient); 4932 4935 } … … 4934 4937 case SVM_EXIT_TASK_SWITCH: 4935 4938 { 4936 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_TASK_SWITCH)4937 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4939 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_TASK_SWITCH)) 4940 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4938 4941 return hmR0SvmExitTaskSwitch(pVCpu, pCtx, pSvmTransient); 4939 4942 } … … 4941 4944 case SVM_EXIT_IRET: 4942 4945 { 4943 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_IRET)4944 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4946 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_IRET)) 4947 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4945 4948 return hmR0SvmNestedExitIret(pVCpu, pCtx, pSvmTransient); 4946 4949 } … … 4948 4951 case SVM_EXIT_SHUTDOWN: 4949 4952 { 4950 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_SHUTDOWN)4951 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4953 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_SHUTDOWN)) 4954 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4952 4955 return hmR0SvmExitShutdown(pVCpu, pCtx, pSvmTransient); 4953 4956 } … … 4955 4958 case SVM_EXIT_SMI: 4956 4959 { 4957 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_SMI)4958 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4960 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_SMI)) 4961 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4959 4962 return hmR0SvmExitUnexpected(pVCpu, pCtx, pSvmTransient); 4960 4963 } … … 4962 4965 case SVM_EXIT_INIT: 4963 4966 { 4964 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_INIT)4965 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4967 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_INIT)) 4968 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4966 4969 return hmR0SvmExitUnexpected(pVCpu, pCtx, pSvmTransient); 4967 4970 } … … 4969 4972 case SVM_EXIT_VMMCALL: 4970 4973 { 4971 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_VMMCALL)4972 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4974 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_VMMCALL)) 4975 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4973 4976 return hmR0SvmExitVmmCall(pVCpu, pCtx, pSvmTransient); 4974 4977 } … … 4976 4979 case SVM_EXIT_CLGI: 4977 4980 { 4978 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_CLGI)4979 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4981 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_CLGI)) 4982 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4980 4983 return hmR0SvmExitClgi(pVCpu, pCtx, pSvmTransient); 4981 4984 } … … 4983 4986 case SVM_EXIT_STGI: 4984 4987 { 4985 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_STGI)4986 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4988 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_STGI)) 4989 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4987 4990 return hmR0SvmExitStgi(pVCpu, pCtx, pSvmTransient); 4988 4991 } … … 4990 4993 case SVM_EXIT_VMLOAD: 4991 4994 { 4992 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_VMLOAD)4993 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);4995 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_VMLOAD)) 4996 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4994 4997 return hmR0SvmExitVmload(pVCpu, pCtx, pSvmTransient); 4995 4998 } … … 4997 5000 case SVM_EXIT_VMSAVE: 4998 5001 { 4999 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_VMSAVE)5000 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);5002 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_VMSAVE)) 5003 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 5001 5004 return hmR0SvmExitVmsave(pVCpu, pCtx, pSvmTransient); 5002 5005 } … … 5004 5007 case SVM_EXIT_INVLPGA: 5005 5008 { 5006 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_INVLPGA)5007 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);5009 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_INVLPGA)) 5010 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 5008 5011 return hmR0SvmExitInvlpga(pVCpu, pCtx, pSvmTransient); 5009 5012 } … … 5011 5014 case SVM_EXIT_VMRUN: 5012 5015 { 5013 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_VMRUN)5014 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);5016 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_VMRUN)) 5017 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 5015 5018 return hmR0SvmExitVmrun(pVCpu, pCtx, pSvmTransient); 5016 5019 } … … 5018 5021 case SVM_EXIT_RSM: 5019 5022 { 5020 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_RSM)5021 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);5023 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_RSM)) 5024 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 5022 5025 hmR0SvmSetPendingXcptUD(pVCpu); 5023 5026 return VINF_SUCCESS; … … 5026 5029 case SVM_EXIT_SKINIT: 5027 5030 { 5028 if ( pVmcbNstGstCache->u64InterceptCtrl & SVM_CTRL_INTERCEPT_SKINIT)5029 HM_SVM_RET_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);5031 if (HM_SVM_IS_CTRL_INTERCEPT_SET(pCtx, SVM_CTRL_INTERCEPT_SKINIT)) 5032 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 5030 5033 hmR0SvmSetPendingXcptUD(pVCpu); 5031 5034 return VINF_SUCCESS; … … 5050 5053 /* not reached */ 5051 5054 5052 #undef HM_SVM_RET_VMEXIT_NESTED 5055 #undef HM_SVM_VMEXIT_NESTED 5056 #undef HM_SVM_IS_CTRL_INTERCEPT_SET 5057 #undef HM_SVM_IS_XCPT_INTERCEPT_SET 5058 #undef HM_SVM_IS_READ_CR_INTERCEPT_SET 5059 #undef HM_SVM_IS_READ_DR_INTERCEPT_SET 5060 #undef HM_SVM_IS_WRITE_CR_INTERCEPT_SET 5061 #undef HM_SVM_IS_WRITE_DR_INTERCEPT_SET 5053 5062 } 5054 5063 #endif
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