Changeset 70116 in vbox
- Timestamp:
- Dec 13, 2017 4:34:06 PM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 119665
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r70056 r70116 134 134 /** 135 135 * Mandatory/unconditional guest control intercepts. 136 * 137 * SMIs can and do happen in normal operation. We need not intercept them 138 * while executing the guest or nested-guest. 136 139 */ 137 140 #define HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS ( SVM_CTRL_INTERCEPT_INTR \ 138 141 | SVM_CTRL_INTERCEPT_NMI \ 139 | SVM_CTRL_INTERCEPT_SMI \140 142 | SVM_CTRL_INTERCEPT_INIT \ 141 143 | SVM_CTRL_INTERCEPT_RDPMC \ … … 159 161 | SVM_CTRL_INTERCEPT_MWAIT \ 160 162 | SVM_CTRL_INTERCEPT_XSETBV) 161 162 /**163 * Mandatory/unconditional nested-guest control intercepts.164 *165 * SMIs can and do happen in normal operation. We need to intercept them while166 * executing the nested-guest and make sure the host handles them.167 */168 #define HMSVM_MANDATORY_NESTED_GUEST_CTRL_INTERCEPTS ( HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS \169 | SVM_CTRL_INTERCEPT_SMI)170 163 171 164 /** @name VMCB Clean Bits. … … 1885 1878 pVmcbNstGst->ctrl.u32InterceptXcpt |= pVmcb->ctrl.u32InterceptXcpt; 1886 1879 pVmcbNstGst->ctrl.u64InterceptCtrl |= pVmcb->ctrl.u64InterceptCtrl 1887 | HMSVM_MANDATORY_ NESTED_GUEST_CTRL_INTERCEPTS;1880 | HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS; 1888 1881 1889 1882 /* … … 1895 1888 * need to be intercepted (they are included in HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS). 1896 1889 */ 1897 Assert( (pVmcbNstGst->ctrl.u64InterceptCtrl & HMSVM_MANDATORY_ NESTED_GUEST_CTRL_INTERCEPTS)1898 == HMSVM_MANDATORY_ NESTED_GUEST_CTRL_INTERCEPTS);1890 Assert( (pVmcbNstGst->ctrl.u64InterceptCtrl & HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS) 1891 == HMSVM_MANDATORY_GUEST_CTRL_INTERCEPTS); 1899 1892 pVmcbNstGst->ctrl.u64InterceptCtrl &= ~SVM_CTRL_INTERCEPT_VMMCALL; 1900 1893 … … 4973 4966 case SVM_EXIT_SMI: 4974 4967 { 4975 /* We shouldn't direct physical interrupts, NMIs, SMIs to the nested-guest. */ 4968 /* 4969 * We shouldn't direct physical interrupts, NMIs, SMIs to the nested-guest. 4970 * 4971 * Although we don't intercept SMIs, the nested-guest might. Therefore, we 4972 * might get an SMI #VMEXIT here so simply ignore rather than causing a 4973 * corresponding nested-guest #VMEXIT. 4974 */ 4976 4975 return hmR0SvmExitIntr(pVCpu, pCtx, pSvmTransient); 4977 4976 } … … 4979 4978 case SVM_EXIT_FERR_FREEZE: 4980 4979 { 4981 if (HMIsGuestSvmCtrlInterceptSet(pVCpu, pCtx, SVM_CTRL_INTERCEPT_ VINTR))4980 if (HMIsGuestSvmCtrlInterceptSet(pVCpu, pCtx, SVM_CTRL_INTERCEPT_FERR_FREEZE)) 4982 4981 return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2); 4983 4982 return hmR0SvmExitIntr(pVCpu, pCtx, pSvmTransient); … … 5150 5149 } 5151 5150 5152 case SVM_EXIT_INIT: 5153 case SVM_EXIT_NPF: /* We don't yet support nested-paging for nested-guests, so this should never happen. */5151 case SVM_EXIT_INIT: /* We shouldn't get INIT signals while executing a nested-guest. */ 5152 case SVM_EXIT_NPF: /* We don't yet support nested-paging for nested-guests, so this should never happen. */ 5154 5153 { 5155 5154 return hmR0SvmExitUnexpected(pVCpu, pCtx, pSvmTransient); … … 5995 5994 * AMD Phenom 9850 Quad-Core on Windows 64-bit host). 5996 5995 */ 5997 Log4(("hmR0SvmExitIntr: CS:RIP=%04x:%RX64 EFL=%#x CR0=%#RX32 CR3=%#RX32 CR4=%#RX32\n", pCtx->cs.Sel, pCtx->rip,5998 pCtx->eflags.u, pCtx->cr0, pCtx->cr3, pCtx->cr4));5999 Log4(("eax=%08x ebx=%08x ecx=%08x edx=%08x esi=%08x edi=%08x\n"6000 "eip=%08x esp=%08x ebp=%08x\n"6001 "cs=%04x ss=%04x ds=%04x es=%04x fs=%04x gs=%04x efl=%08x\n",6002 pCtx->eax, pCtx->ebx, pCtx->ecx, pCtx->edx, pCtx->esi, pCtx->edi,6003 pCtx->eip, pCtx->esp, pCtx->ebp,6004 pCtx->cs.Sel, pCtx->ss.Sel, pCtx->ds.Sel, pCtx->es.Sel, pCtx->fs.Sel, pCtx->gs.Sel, pCtx->eflags.u32));6005 5996 return VINF_EM_RAW_INTERRUPT; 6006 5997 }
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