VirtualBox

Changeset 70238 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Dec 20, 2017 11:55:05 AM (7 years ago)
Author:
vboxsync
Message:

Main/Console+BusAssignmentManager: Move from manual PCI bridge creation to automatic bridge creation on demand (also fix bridge structure to make sure that the correct instantiation order is used). Coding style whitespace fixes.

Location:
trunk/src/VBox/Main/src-client
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Main/src-client/BusAssignmentManager.cpp

    r69500 r70238  
    3333struct DeviceAssignmentRule
    3434{
    35     const char* pszName;
     35    const char *pszName;
    3636    int         iBus;
    3737    int         iDevice;
     
    4242struct DeviceAliasRule
    4343{
    44     const char* pszDevName;
    45     const char* pszDevAlias;
     44    const char *pszDevName;
     45    const char *pszDevAlias;
    4646};
    4747
     
    133133    {"ich9pcibridge", 0, 24, 0,  10},
    134134    {"ich9pcibridge", 0, 25, 0,  10},
    135     {"ich9pcibridge", 1, 24, 0,   9},
    136     {"ich9pcibridge", 1, 25, 0,   9},
    137     {"ich9pcibridge", 2, 24, 0,   8},
    138     {"ich9pcibridge", 2, 25, 0,   8},
    139     {"ich9pcibridge", 3, 24, 0,   7},
    140     {"ich9pcibridge", 3, 25, 0,   7},
    141     {"ich9pcibridge", 4, 24, 0,   6},
    142     {"ich9pcibridge", 4, 25, 0,   6},
    143     {"ich9pcibridge", 5, 24, 0,   5},
    144     {"ich9pcibridge", 5, 25, 0,   5},
     135    {"ich9pcibridge", 2, 24, 0,   9}, /* Bridges must be instantiated depth */
     136    {"ich9pcibridge", 2, 25, 0,   9}, /* first (assumption in PDM and other */
     137    {"ich9pcibridge", 4, 24, 0,   8}, /* places), so make sure that nested */
     138    {"ich9pcibridge", 4, 25, 0,   8}, /* bridges are added to the last bridge */
     139    {"ich9pcibridge", 6, 24, 0,   7}, /* only, avoiding the need to re-sort */
     140    {"ich9pcibridge", 6, 25, 0,   7}, /* everything before starting the VM. */
     141    {"ich9pcibridge", 8, 24, 0,   6},
     142    {"ich9pcibridge", 8, 25, 0,   6},
     143    {"ich9pcibridge", 10, 24, 0,  5},
     144    {"ich9pcibridge", 10, 25, 0,  5},
    145145
    146146    /* Storage controllers */
     
    236236        PCIBusAddress HostAddress;
    237237
    238         PCIDeviceRecord(const char* pszName, PCIBusAddress aHostAddress)
     238        PCIDeviceRecord(const char *pszName, PCIBusAddress aHostAddress)
    239239        {
    240240            RTStrCopy(this->szDevName, sizeof(szDevName), pszName);
     
    242242        }
    243243
    244         PCIDeviceRecord(const char* pszName)
     244        PCIDeviceRecord(const char *pszName)
    245245        {
    246246            RTStrCopy(this->szDevName, sizeof(szDevName), pszName);
     
    265265    volatile int32_t cRefCnt;
    266266    ChipsetType_T    mChipsetType;
     267    const char *     mpszBridgeName;
    267268    PCIMap           mPCIMap;
    268269    ReversePCIMap    mReversePCIMap;
    269270
    270271    State()
    271         : cRefCnt(1), mChipsetType(ChipsetType_Null)
     272        : cRefCnt(1), mChipsetType(ChipsetType_Null), mpszBridgeName("unknownbridge")
    272273    {}
    273274    ~State()
     
    276277    HRESULT init(ChipsetType_T chipsetType);
    277278
    278     HRESULT record(const char* pszName, PCIBusAddress& GuestAddress, PCIBusAddress HostAddress);
    279     HRESULT autoAssign(const char* pszName, PCIBusAddress& Address);
     279    HRESULT record(const char *pszName, PCIBusAddress& GuestAddress, PCIBusAddress HostAddress);
     280    HRESULT autoAssign(const char *pszName, PCIBusAddress& Address);
    280281    bool    checkAvailable(PCIBusAddress& Address);
    281     bool    findPCIAddress(const char* pszDevName, int iInstance, PCIBusAddress& Address);
    282 
    283     const char* findAlias(const char* pszName);
    284     void addMatchingRules(const char* pszName, PCIRulesList& aList);
     282    bool    findPCIAddress(const char *pszDevName, int iInstance, PCIBusAddress& Address);
     283
     284    const char *findAlias(const char *pszName);
     285    void addMatchingRules(const char *pszName, PCIRulesList& aList);
    285286    void listAttachedPCIDevices(std::vector<PCIDeviceInfo> &aAttached);
    286287};
     
    289290{
    290291    mChipsetType = chipsetType;
     292    switch (chipsetType)
     293    {
     294        case ChipsetType_PIIX3:
     295            mpszBridgeName = "pcibridge";
     296            break;
     297        case ChipsetType_ICH9:
     298            mpszBridgeName = "ich9pcibridge";
     299            break;
     300        default:
     301            mpszBridgeName = "unknownbridge";
     302            AssertFailed();
     303            break;
     304    }
    291305    return S_OK;
    292306}
    293307
    294 HRESULT BusAssignmentManager::State::record(const char* pszName, PCIBusAddress& Address, PCIBusAddress HostAddress)
     308HRESULT BusAssignmentManager::State::record(const char *pszName, PCIBusAddress& Address, PCIBusAddress HostAddress)
    295309{
    296310    PCIDeviceRecord devRec(pszName, HostAddress);
     
    312326}
    313327
    314 bool    BusAssignmentManager::State::findPCIAddress(const char* pszDevName, int iInstance, PCIBusAddress& Address)
     328bool    BusAssignmentManager::State::findPCIAddress(const char *pszDevName, int iInstance, PCIBusAddress& Address)
    315329{
    316330    PCIDeviceRecord devRec(pszDevName);
     
    327341}
    328342
    329 void BusAssignmentManager::State::addMatchingRules(const char* pszName, PCIRulesList& aList)
     343void BusAssignmentManager::State::addMatchingRules(const char *pszName, PCIRulesList& aList)
    330344{
    331345    size_t iRuleset, iRule;
    332     const DeviceAssignmentRule* aArrays[2] = {aGenericRules, NULL};
     346    const DeviceAssignmentRule *aArrays[2] = {aGenericRules, NULL};
    333347
    334348    switch (mChipsetType)
     
    341355            break;
    342356        default:
    343             Assert(false);
     357            AssertFailed();
    344358            break;
    345359    }
     
    358372}
    359373
    360 const char* BusAssignmentManager::State::findAlias(const char* pszDev)
     374const char *BusAssignmentManager::State::findAlias(const char *pszDev)
    361375{
    362376    for (size_t iAlias = 0; iAlias < RT_ELEMENTS(aDeviceAliases); iAlias++)
     
    368382}
    369383
    370 static bool  RuleComparator(const DeviceAssignmentRule* r1, const DeviceAssignmentRule* r2)
     384static bool  RuleComparator(const DeviceAssignmentRule *r1, const DeviceAssignmentRule *r2)
    371385{
    372386    return (r1->iPriority > r2->iPriority);
    373387}
    374388
    375 HRESULT BusAssignmentManager::State::autoAssign(const char* pszName, PCIBusAddress& Address)
     389HRESULT BusAssignmentManager::State::autoAssign(const char *pszName, PCIBusAddress& Address)
    376390{
    377391    PCIRulesList matchingRules;
    378392
    379393    addMatchingRules(pszName,  matchingRules);
    380     const char* pszAlias = findAlias(pszName);
     394    const char *pszAlias = findAlias(pszName);
    381395    if (pszAlias)
    382396        addMatchingRules(pszAlias, matchingRules);
     
    388402    for (size_t iRule = 0; iRule < matchingRules.size(); iRule++)
    389403    {
    390         const DeviceAssignmentRule* rule = matchingRules[iRule];
     404        const DeviceAssignmentRule *rule = matchingRules[iRule];
    391405
    392406        Address.miBus = rule->iBus;
     
    397411            return S_OK;
    398412    }
    399     AssertMsgFailed(("All possible candidate positions for %s exhausted\n", pszName));
     413    AssertLogRelMsgFailed(("BusAssignmentManager: All possible candidate positions for %s exhausted\n", pszName));
    400414
    401415    return E_INVALIDARG;
     
    440454}
    441455
    442 BusAssignmentManager* BusAssignmentManager::createInstance(ChipsetType_T chipsetType)
    443 {
    444     BusAssignmentManager* pInstance = new BusAssignmentManager();
     456BusAssignmentManager *BusAssignmentManager::createInstance(ChipsetType_T chipsetType)
     457{
     458    BusAssignmentManager *pInstance = new BusAssignmentManager();
    445459    pInstance->pState->init(chipsetType);
    446460    Assert(pInstance);
     
    458472}
    459473
    460 DECLINLINE(HRESULT) InsertConfigInteger(PCFGMNODE pCfg,  const char* pszName, uint64_t u64)
     474DECLINLINE(HRESULT) InsertConfigInteger(PCFGMNODE pCfg,  const char *pszName, uint64_t u64)
    461475{
    462476    int vrc = CFGMR3InsertInteger(pCfg, pszName, u64);
     
    467481}
    468482
    469 HRESULT BusAssignmentManager::assignPCIDeviceImpl(const char* pszDevName,
     483DECLINLINE(HRESULT) InsertConfigNode(PCFGMNODE pNode, const char *pcszName, PCFGMNODE *ppChild)
     484{
     485    int vrc = CFGMR3InsertNode(pNode, pcszName, ppChild);
     486    if (RT_FAILURE(vrc))
     487        return E_INVALIDARG;
     488
     489    return S_OK;
     490}
     491
     492
     493HRESULT BusAssignmentManager::assignPCIDeviceImpl(const char *pszDevName,
    470494                                                  PCFGMNODE pCfg,
    471495                                                  PCIBusAddress& GuestAddress,
     
    509533        return rc;
    510534
     535    /* Check if the bus is still unknown, i.e. the bridge to it is missing */
     536    if (   GuestAddress.miBus > 0
     537        && !hasPCIDevice(pState->mpszBridgeName, GuestAddress.miBus - 1))
     538    {
     539        PCFGMNODE pDevices = CFGMR3GetParent(CFGMR3GetParent(pCfg));
     540        AssertLogRelMsgReturn(pDevices, ("BusAssignmentManager: cannot find base device configuration\n"), E_UNEXPECTED);
     541        PCFGMNODE pBridges = CFGMR3GetChild(pDevices, "ich9pcibridge");
     542        AssertLogRelMsgReturn(pBridges, ("BusAssignmentManager: cannot find bridge configuration base\n"), E_UNEXPECTED);
     543
     544        /* Device should be on a not yet existing bus, add it automatically */
     545        for (int iBridge = 0; iBridge <= GuestAddress.miBus - 1; iBridge++)
     546        {
     547            if (!hasPCIDevice(pState->mpszBridgeName, iBridge))
     548            {
     549                PCIBusAddress BridgeGuestAddress;
     550                rc = pState->autoAssign(pState->mpszBridgeName, BridgeGuestAddress);
     551                if (FAILED(rc))
     552                    return rc;
     553                if (BridgeGuestAddress.miBus > iBridge)
     554                    AssertLogRelMsgFailedReturn(("BusAssignmentManager: cannot create bridge for bus %i because the possible parent bus positions are exhausted\n", iBridge + 1), E_UNEXPECTED);
     555
     556                PCFGMNODE pInst;
     557                InsertConfigNode(pBridges, Utf8StrFmt("%d", iBridge).c_str(), &pInst);
     558                InsertConfigInteger(pInst, "Trusted", 1);
     559                rc = assignPCIDevice(pState->mpszBridgeName, pInst);
     560                if (FAILED(rc))
     561                    return rc;
     562            }
     563        }
     564    }
     565
    511566    return S_OK;
    512567}
    513568
    514569
    515 bool BusAssignmentManager::findPCIAddress(const char* pszDevName, int iInstance, PCIBusAddress& Address)
     570bool BusAssignmentManager::findPCIAddress(const char *pszDevName, int iInstance, PCIBusAddress& Address)
    516571{
    517572    return pState->findPCIAddress(pszDevName, iInstance, Address);
  • trunk/src/VBox/Main/src-client/ConsoleImpl2.cpp

    r70221 r70238  
    558558# endif
    559559
    560     PCFGMNODE pBridges = CFGMR3GetChild(pDevices, "ich9pcibridge");
    561     Assert(pBridges);
    562 
    563     /* Find required bridges, and add missing ones */
    564     for (size_t iDev = 0; iDev < assignments.size(); iDev++)
    565     {
    566         ComPtr<IPCIDeviceAttachment> assignment = assignments[iDev];
    567         LONG guest = 0;
    568         PCIBusAddress GuestPCIAddress;
    569 
    570         hrc = assignment->COMGETTER(GuestAddress)(&guest);   H();
    571         GuestPCIAddress.fromLong(guest);
    572         Assert(GuestPCIAddress.valid());
    573 
    574         if (GuestPCIAddress.miBus > 0)
    575         {
    576             int iBridgesMissed = 0;
    577             int iBase = GuestPCIAddress.miBus - 1;
    578 
    579             while (!pBusMgr->hasPCIDevice("ich9pcibridge", iBase) && iBase > 0)
    580             {
    581                 iBridgesMissed++; iBase--;
    582             }
    583             iBase++;
    584 
    585             for (int iBridge = 0; iBridge < iBridgesMissed; iBridge++)
    586             {
    587                 InsertConfigNode(pBridges, Utf8StrFmt("%d", iBase + iBridge).c_str(), &pInst);
    588                 InsertConfigInteger(pInst, "Trusted",              1);
    589                 hrc = pBusMgr->assignPCIDevice("ich9pcibridge", pInst);
    590             }
    591         }
    592     }
    593 
    594560    /* Now actually add devices */
    595561    PCFGMNODE pPCIDevs = NULL;
     
    14551421        {
    14561422            default:
    1457                 Assert(false);
     1423                AssertFailed();
    14581424                RT_FALL_THRU();
    14591425            case ChipsetType_PIIX3:
     1426                /* Create the base for adding bridges on demand */
     1427                InsertConfigNode(pDevices, "pcibridge", NULL);
     1428
    14601429                InsertConfigNode(pDevices, "pci", &pDev);
    14611430                uHbcPCIAddress = (0x0 << 16) | 0;
     
    14631432                break;
    14641433            case ChipsetType_ICH9:
     1434                /* Create the base for adding bridges on demand */
     1435                InsertConfigNode(pDevices, "ich9pcibridge", NULL);
     1436
    14651437                InsertConfigNode(pDevices, "ich9pci", &pDev);
    14661438                uHbcPCIAddress = (0x1e << 16) | 0;
     
    14781450            InsertConfigInteger(pCfg,  "McfgLength", cbMcfgLength);
    14791451
    1480 
    1481             /* And register 2 bridges */
    1482             InsertConfigNode(pDevices, "ich9pcibridge", &pDev);
    1483             InsertConfigNode(pDev,     "0", &pInst);
    1484             InsertConfigInteger(pInst, "Trusted",              1); /* boolean */
    1485             hrc = pBusMgr->assignPCIDevice("ich9pcibridge", pInst);                         H();
    1486 
    1487             InsertConfigNode(pDev,     "1", &pInst);
    1488             InsertConfigInteger(pInst, "Trusted",              1); /* boolean */
    1489             hrc = pBusMgr->assignPCIDevice("ich9pcibridge", pInst);                         H();
    1490 
    14911452#ifdef VBOX_WITH_PCI_PASSTHROUGH
    14921453            /* Add PCI passthrough devices */
    1493             hrc = i_attachRawPCIDevices(pUVM, pBusMgr, pDevices);                             H();
     1454            hrc = i_attachRawPCIDevices(pUVM, pBusMgr, pDevices);                           H();
    14941455#endif
    14951456        }
     
    23762337                    hrc = ctrls[i]->COMGETTER(PortCount)(&cPorts);                          H();
    23772338                    InsertConfigInteger(pCfg, "NamespacesMax", cPorts);
    2378 
    2379                     /* For ICH9 we need to create a new PCI bridge if there is more than one NVMe instance. */
    2380                     if (   ulInstance > 0
    2381                         && chipsetType == ChipsetType_ICH9
    2382                         && !pBusMgr->hasPCIDevice("ich9pcibridge", 2))
    2383                     {
    2384                         PCFGMNODE pBridges = CFGMR3GetChild(pDevices, "ich9pcibridge");
    2385                         Assert(pBridges);
    2386 
    2387                         InsertConfigNode(pBridges, "2", &pInst);
    2388                         InsertConfigInteger(pInst, "Trusted",              1);
    2389                         hrc = pBusMgr->assignPCIDevice("ich9pcibridge", pInst);
    2390                     }
    23912339
    23922340                    /* Attach the status driver */
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