Changeset 70352 in vbox for trunk/src/VBox/VMM/VMMR0

Timestamp:

Dec 27, 2017 7:56:22 AM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

119952

Message:

VMM/HM,CPUM: SVM VMCB layout adjustments.

File:

• trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (21 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -798 +798 @@
     bool const fUsePauseFilter       = fPauseFilter && pVM->hm.s.svm.cPauseFilter && pVM->hm.s.svm.cPauseFilterThresholdTicks;
 
+    bool const fLbrVirt              = RT_BOOL(pVM->hm.s.svm.u32Features & X86_CPUID_SVM_FEATURE_EDX_LBR_VIRT);
+    bool const fUseLbrVirt           = fLbrVirt; /** @todo CFGM etc. */
+
     for (VMCPUID i = 0; i < pVM->cCpus; i++)
     {
@@ -858 +861 @@
         pVmcb->ctrl.u64MSRPMPhysAddr = pVCpu->hm.s.svm.HCPhysMsrBitmap;
 
-        /* No LBR virtualization. */
-        Assert(pVmcb->ctrl.u1LbrVirt == 0);
+        /* LBR virtualization. */
+        if (fUseLbrVirt)
+        {
+            pVmcb->ctrl.LbrVirt.n.u1LbrVirt = fUseLbrVirt;
+            pVmcb->guest.u64DBGCTL = MSR_IA32_DEBUGCTL_LBR;
+        }
+        else
+            Assert(pVmcb->ctrl.LbrVirt.n.u1LbrVirt == 0);
 
         /* Initially all VMCB clean bits MBZ indicating that everything should be loaded from the VMCB in memory. */
@@ -875 +884 @@
 
         /* Setup Nested Paging. This doesn't change throughout the execution time of the VM. */
-        pVmcb->ctrl.u1NestedPaging = pVM->hm.s.fNestedPaging;
+        pVmcb->ctrl.NestedPaging.n.u1NestedPaging = pVM->hm.s.fNestedPaging;
 
         /* Without Nested Paging, we need additionally intercepts. */
@@ -2108 +2117 @@
                ("fContextUseFlags=%#RX32\n", HMCPU_CF_VALUE(pVCpu)));
 
-    Log4(("hmR0SvmLoadGuestState: CS:RIP=%04x:%RX64 EFL=%#x CR0=%#RX32 CR3=%#RX32 CR4=%#RX32\n", pCtx->cs.Sel, pCtx->rip,
-          pCtx->eflags.u, pCtx->cr0, pCtx->cr3, pCtx->cr4));
+    Log4(("hmR0SvmLoadGuestState: CS:RIP=%04x:%RX64 EFL=%#x CR0=%#RX32 CR3=%#RX32 CR4=%#RX32 ESP=%#RX32 EBP=%#RX32\n",
+          pCtx->cs.Sel, pCtx->rip, pCtx->eflags.u, pCtx->cr0, pCtx->cr3, pCtx->cr4, pCtx->esp, pCtx->ebp));
+    Log4(("hmR0SvmLoadGuestState: SS={%04x base=%016RX64 limit=%08x flags=%08x}\n", pCtx->ss.Sel, pCtx->ss.u64Base,
+          pCtx->ss.u32Limit, pCtx->ss.Attr.u));
     STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatLoadGuestState, x);
     return rc;
@@ -2152 +2163 @@
         pNstGstVmcbCache->u64CR4            = pVmcbNstGstState->u64CR4;
         pNstGstVmcbCache->u64EFER           = pVmcbNstGstState->u64EFER;
+        pNstGstVmcbCache->u64DBGCTL         = pVmcbNstGstState->u64DBGCTL;
         pNstGstVmcbCache->u64IOPMPhysAddr   = pVmcbNstGstCtrl->u64IOPMPhysAddr;
         pNstGstVmcbCache->u64MSRPMPhysAddr  = pVmcbNstGstCtrl->u64MSRPMPhysAddr;
@@ -2158 +2170 @@
         pNstGstVmcbCache->fVIntrMasking     = pVmcbNstGstCtrl->IntCtrl.n.u1VIntrMasking;
         pNstGstVmcbCache->TLBCtrl           = pVmcbNstGstCtrl->TLBCtrl;
-        pNstGstVmcbCache->u1NestedPaging    = pVmcbNstGstCtrl->u1NestedPaging;
+        pNstGstVmcbCache->u1NestedPaging    = pVmcbNstGstCtrl->NestedPaging.n.u1NestedPaging;
+        pNstGstVmcbCache->u1LbrVirt         = pVmcbNstGstCtrl->LbrVirt.n.u1LbrVirt;
         pCtx->hwvirt.svm.fHMCachedVmcb      = true;
         Log4(("hmR0SvmVmRunCacheVmcb: Cached VMCB fields\n"));
@@ -2202 +2215 @@
          * end of Trap0eHandler in PGMAllBth.h).
          */
-        pVmcbNstGstCtrl->u1NestedPaging = pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging;
+        pVmcbNstGstCtrl->NestedPaging.n.u1NestedPaging = pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging;
+
+        /* For now copy the LBR info. from outer guest VMCB. */
+        /** @todo fix this later. */
+        PCSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb;
+        pVmcbNstGstCtrl->LbrVirt.n.u1LbrVirt = pVmcb->ctrl.LbrVirt.n.u1LbrVirt;
+        pVmcbNstGst->guest.u64DBGCTL = pVmcb->guest.u64DBGCTL;
     }
     else
@@ -2208 +2227 @@
         Assert(pVmcbNstGstCtrl->u64IOPMPhysAddr == g_HCPhysIOBitmap);
         Assert(pVmcbNstGstCtrl->u64MSRPMPhysAddr = g_HCPhysNstGstMsrBitmap);
-        Assert(RT_BOOL(pVmcbNstGstCtrl->u1NestedPaging) == pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging);
+        Assert(RT_BOOL(pVmcbNstGstCtrl->NestedPaging.n.u1NestedPaging) == pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging);
     }
 }
@@ -2269 +2288 @@
           "ESP=%#RX32 EBP=%#RX32 rc=%d\n", pCtx->cs.Sel, pCtx->rip, pCtx->eflags.u, pCtx->cr0, pCtx->cr3,
           pVmcbNstGst->guest.u64CR3, pCtx->cr4, pCtx->esp, pCtx->ebp, rc));
+    Log4(("hmR0SvmLoadGuestStateNested: SS={%04x base=%016RX64 limit=%08x flags=%08x}\n", pCtx->ss.Sel, pCtx->ss.u64Base,
+          pCtx->ss.u32Limit, pCtx->ss.Attr.u));
     STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatLoadGuestState, x);
 
@@ -2345 +2366 @@
      * Guest interrupt shadow.
      */
-    if (pVmcb->ctrl.u1IntShadow)
+    if (pVmcb->ctrl.IntShadow.n.u1IntShadow)
         EMSetInhibitInterruptsPC(pVCpu, pMixedCtx->rip);
     else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
@@ -2417 +2438 @@
      */
     Assert(!(pVmcb->guest.u8CPL & ~0x3));
-    pMixedCtx->ss.Attr.n.u2Dpl = pVmcb->guest.u8CPL & 0x3;
+    uint8_t const uCpl = pVmcb->guest.u8CPL;
+    if (pMixedCtx->ss.Attr.n.u2Dpl != uCpl)
+    {
+        Log4(("hmR0SvmSaveGuestState: CPL differs. SS.DPL=%u, CPL=%u, overwriting SS.DPL!\n", pMixedCtx->ss.Attr.n.u2Dpl, uCpl));
+        pMixedCtx->ss.Attr.n.u2Dpl = pVmcb->guest.u8CPL & 0x3;
+    }
 
     /*
@@ -2463 +2489 @@
      * This is done as the very last step of syncing the guest state, as PGMUpdateCR3() may cause longjmp's to ring-3.
      */
-    if (   pVmcb->ctrl.u1NestedPaging
+    if (   pVmcb->ctrl.NestedPaging.n.u1NestedPaging
         && pMixedCtx->cr3 != pVmcb->guest.u64CR3)
     {
@@ -2470 +2496 @@
     }
 
-    Log4(("hmR0SvmSaveGuestState: CS:RIP=%04x:%RX64 EFL=%#x CR0=%#RX32 CR3=%#RX32 CR4=%#RX32\n", pMixedCtx->cs.Sel,
-          pMixedCtx->rip, pMixedCtx->eflags.u, pMixedCtx->cr0, pMixedCtx->cr3, pMixedCtx->cr4));
+    if (CPUMIsGuestInSvmNestedHwVirtMode(pMixedCtx))
+    {
+        Log4(("hmR0SvmSaveGuestState: CS:RIP=%04x:%RX64 EFL=%#x CR0=%#RX32 CR3=%#RX32 CR4=%#RX32 ESP=%#RX32 EBP=%#RX32\n",
+              pMixedCtx->cs.Sel, pMixedCtx->rip, pMixedCtx->eflags.u, pMixedCtx->cr0, pMixedCtx->cr3, pMixedCtx->cr4,
+              pMixedCtx->esp, pMixedCtx->ebp));
+        Log4(("hmR0SvmSaveGuestState: SS={%04x base=%016RX64 limit=%08x flags=%08x}\n", pMixedCtx->ss.Sel, pMixedCtx->ss.u64Base,
+              pMixedCtx->ss.u32Limit, pMixedCtx->ss.Attr.u));
+        Log4(("hmR0SvmSaveGuestState: DBGCTL BR_FROM=%#RX64 BR_TO=%#RX64 XcptFrom=%#RX64 XcptTo=%#RX64\n",
+              pVmcb->guest.u64BR_FROM, pVmcb->guest.u64BR_TO,pVmcb->guest.u64LASTEXCPFROM, pVmcb->guest.u64LASTEXCPTO));
+    }
 }
 
@@ -3493 +3527 @@
      * the nested-guest but execution later continues here with an interrupt shadow active.
      */
-    pVmcb->ctrl.u1IntShadow = fIntShadow;
+    pVmcb->ctrl.IntShadow.n.u1IntShadow = fIntShadow;
 }
 
@@ -3545 +3579 @@
         Log4(("ctrl.IntCtrl.u24Reserved          %#x\n",      pVmcb->ctrl.IntCtrl.n.u24Reserved));
 
-        Log4(("ctrl.u1IntShadow                  %#x\n",      pVmcb->ctrl.u1IntShadow));
-        Log4(("ctrl.u1GuestIntMask               %#x\n",      pVmcb->ctrl.u1GuestIntMask));
+        Log4(("ctrl.IntShadow.u1IntShadow        %#x\n",      pVmcb->ctrl.IntShadow.n.u1IntShadow));
+        Log4(("ctrl.IntShadow.u1GuestIntMask     %#x\n",      pVmcb->ctrl.IntShadow.n.u1GuestIntMask));
         Log4(("ctrl.u64ExitCode                  %#RX64\n",   pVmcb->ctrl.u64ExitCode));
         Log4(("ctrl.u64ExitInfo1                 %#RX64\n",   pVmcb->ctrl.u64ExitInfo1));
@@ -3556 +3590 @@
         Log4(("ctrl.ExitIntInfo.u1Valid          %#x\n",      pVmcb->ctrl.ExitIntInfo.n.u1Valid));
         Log4(("ctrl.ExitIntInfo.u32ErrorCode     %#x\n",      pVmcb->ctrl.ExitIntInfo.n.u32ErrorCode));
-        Log4(("ctrl.u1NestedPaging               %#x\n",      pVmcb->ctrl.u1NestedPaging));
-        Log4(("ctrl.u1Sev                        %#x\n",      pVmcb->ctrl.u1Sev));
-        Log4(("ctrl.u1SevEs                      %#x\n",      pVmcb->ctrl.u1SevEs));
+        Log4(("ctrl.NestedPaging.u1NestedPaging  %#x\n",      pVmcb->ctrl.NestedPaging.n.u1NestedPaging));
+        Log4(("ctrl.NestedPaging.u1Sev           %#x\n",      pVmcb->ctrl.NestedPaging.n.u1Sev));
+        Log4(("ctrl.NestedPaging.u1SevEs         %#x\n",      pVmcb->ctrl.NestedPaging.n.u1SevEs));
         Log4(("ctrl.EventInject.u8Vector         %#x\n",      pVmcb->ctrl.EventInject.n.u8Vector));
         Log4(("ctrl.EventInject.u3Type           %#x\n",      pVmcb->ctrl.EventInject.n.u3Type));
@@ -3568 +3602 @@
         Log4(("ctrl.u64NestedPagingCR3           %#RX64\n",   pVmcb->ctrl.u64NestedPagingCR3));
 
-        Log4(("ctrl.u1Lbrvirt                    %#x\n",      pVmcb->ctrl.u1LbrVirt));
-        Log4(("ctrl.u1VirtVmsaveVmload           %#x\n",      pVmcb->ctrl.u1VirtVmsaveVmload));
+        Log4(("ctrl.LbrVirt.u1LbrVirt            %#x\n",      pVmcb->ctrl.LbrVirt.n.u1LbrVirt));
+        Log4(("ctrl.LbrVirt.u1VirtVmsaveVmload   %#x\n",      pVmcb->ctrl.LbrVirt.n.u1VirtVmsaveVmload));
 
         Log4(("guest.CS.u16Sel                   %RTsel\n",   pVmcb->guest.CS.u16Sel));
@@ -4862 +4896 @@
         case SVM_EXIT_IOIO:
         {
-            /*
-             * Figure out if the IO port access is intercepted by the nested-guest.
-             */
             if (HMIsGuestSvmCtrlInterceptSet(pVCpu, pCtx, SVM_CTRL_INTERCEPT_IOIO_PROT))
             {
@@ -5070 +5101 @@
                     if (HMIsGuestSvmXcptInterceptSet(pVCpu, pCtx, uVector))
                         return HM_SVM_VMEXIT_NESTED(pVCpu, uExitCode, uExitInfo1, uExitInfo2);
+#if 0
+                    /* Debugging DOS6 triple-fault nested-VM. */
+                    unsigned    cbInstr;
+                    DISCPUSTATE Dis;
+                    int rc = EMInterpretDisasCurrent(pVCpu->CTX_SUFF(pVM), pVCpu, &Dis, &cbInstr);
+                    if (RT_SUCCESS(rc))
+                    {
+                        RT_NOREF(cbInstr);
+                        if (   Dis.pCurInstr->uOpcode == OP_IRET
+                            && uVector == X86_XCPT_GP)
+                        {
+                            Log4(("#GP on IRET detected!\n"));
+                            return VERR_IEM_INSTR_NOT_IMPLEMENTED;
+                        }
+                    }
+                    else
+                        Log4(("hmR0SvmExitXcptGeneric: failed to disassemble instr. rc=%Rrc\n", rc));
+#endif
                     return hmR0SvmExitXcptGeneric(pVCpu, pCtx, pSvmTransient);
                 }
@@ -5407 +5456 @@
 
                         case X86_XCPT_GP:
+                        {
                             Event.n.u1ErrorCodeValid    = 1;
                             Event.n.u32ErrorCode        = pVmcb->ctrl.u64ExitInfo1;
                             STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestGP);
                             break;
+                        }
 
                         default:
@@ -7589 +7640 @@
     Assert(pSvmTransient->u64ExitCode == pVmcb->ctrl.u64ExitCode);
     Assert(uVector <= X86_XCPT_LAST);
+    Log4(("hmR0SvmExitXcptGeneric: uVector=%#x uErrCode=%u\n", uVector, uErrCode));
 
     SVMEVENT Event;