Changeset 70612 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Jan 17, 2018 6:12:23 PM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 120334
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
r70606 r70612 1735 1735 pFeatures->fMovCmpXchg16b = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_CX16); 1736 1736 pFeatures->fClFlush = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_CLFSH); 1737 pFeatures->fPcid = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_PCID); 1737 1738 1738 1739 /* Structured extended features. */ … … 1740 1741 if (pSxfLeaf0) 1741 1742 { 1743 pFeatures->fFsGsBase = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE); 1742 1744 pFeatures->fAvx2 = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_AVX2); 1743 1745 pFeatures->fAvx512Foundation = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_AVX512F); 1744 1746 pFeatures->fClFlushOpt = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_CLFLUSHOPT); 1747 pFeatures->fInvpcid = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_INVPCID); 1745 1748 1746 1749 pFeatures->fIbpb = RT_BOOL(pSxfLeaf0->uEdx & X86_CPUID_STEXT_FEATURE_EDX_IBRS_IBPB); … … 2339 2342 CPUMISAEXTCFG enmRdSeed; 2340 2343 CPUMISAEXTCFG enmCLFlushOpt; 2344 CPUMISAEXTCFG enmFsGsBase; 2345 CPUMISAEXTCFG enmPcid; 2346 CPUMISAEXTCFG enmInvpcid; 2341 2347 2342 2348 CPUMISAEXTCFG enmAbm; … … 2673 2679 //| X86_CPUID_FEATURE_ECX_TPRUPDATE 2674 2680 //| X86_CPUID_FEATURE_ECX_PDCM - not implemented yet. 2675 //| X86_CPUID_FEATURE_ECX_PCID - not implemented yet.2681 | (pConfig->enmPcid ? X86_CPUID_FEATURE_ECX_PCID : 0) 2676 2682 //| X86_CPUID_FEATURE_ECX_DCA - not implemented yet. 2677 2683 | (pConfig->enmSse41 ? X86_CPUID_FEATURE_ECX_SSE4_1 : 0) … … 2690 2696 ; 2691 2697 2698 /* Mask out the PCID unless FSGSBASE is exposed due to a bug in Windows 10 SMP guests, see @bugref{9089#c15}. */ 2699 if ( !pVM->cpum.s.GuestFeatures.fFsGsBase 2700 && (pStdFeatureLeaf->uEcx & X86_CPUID_FEATURE_ECX_PCID)) 2701 { 2702 pStdFeatureLeaf->uEcx &= ~X86_CPUID_FEATURE_ECX_PCID; 2703 LogRel(("CPUM: Disabled PCID without FSGSBASE to workaround buggy guests\n")); 2704 } 2705 2692 2706 if (pCpum->u8PortableCpuIdLevel > 0) 2693 2707 { 2694 2708 PORTABLE_CLEAR_BITS_WHEN(1, pStdFeatureLeaf->uEax, ProcessorType, (UINT32_C(3) << 12), (UINT32_C(2) << 12)); 2695 2709 PORTABLE_DISABLE_FEATURE_BIT( 1, pStdFeatureLeaf->uEcx, SSSE3, X86_CPUID_FEATURE_ECX_SSSE3); 2710 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pStdFeatureLeaf->uEcx, PCID, X86_CPUID_FEATURE_ECX_PCID, pConfig->enmPcid); 2696 2711 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pStdFeatureLeaf->uEcx, SSE4_1, X86_CPUID_FEATURE_ECX_SSE4_1, pConfig->enmSse41); 2697 2712 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pStdFeatureLeaf->uEcx, SSE4_2, X86_CPUID_FEATURE_ECX_SSE4_2, pConfig->enmSse42); … … 3095 3110 pCurLeaf->uEax = 0; /* Max ECX input is 0. */ 3096 3111 pCurLeaf->uEbx &= 0 3097 //| X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE RT_BIT(0)3112 | (pConfig->enmFsGsBase ? X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE : 0) 3098 3113 //| X86_CPUID_STEXT_FEATURE_EBX_TSC_ADJUST RT_BIT(1) 3099 3114 //| X86_CPUID_STEXT_FEATURE_EBX_SGX RT_BIT(2) … … 3105 3120 //| X86_CPUID_STEXT_FEATURE_EBX_BMI2 RT_BIT(8) 3106 3121 //| X86_CPUID_STEXT_FEATURE_EBX_ERMS RT_BIT(9) 3107 //| X86_CPUID_STEXT_FEATURE_EBX_INVPCID RT_BIT(10)3122 | (pConfig->enmInvpcid ? X86_CPUID_STEXT_FEATURE_EBX_INVPCID : 0) 3108 3123 //| X86_CPUID_STEXT_FEATURE_EBX_RTM RT_BIT(11) 3109 3124 //| X86_CPUID_STEXT_FEATURE_EBX_PQM RT_BIT(12) … … 3135 3150 if (pCpum->u8PortableCpuIdLevel > 0) 3136 3151 { 3137 PORTABLE_DISABLE_FEATURE_BIT ( 1, pCurLeaf->uEbx, FSGSBASE, X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE);3152 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pCurLeaf->uEbx, FSGSBASE, X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE, pConfig->enmFsGsBase); 3138 3153 PORTABLE_DISABLE_FEATURE_BIT( 1, pCurLeaf->uEbx, SGX, X86_CPUID_STEXT_FEATURE_EBX_SGX); 3139 3154 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pCurLeaf->uEbx, AVX2, X86_CPUID_STEXT_FEATURE_EBX_AVX2, pConfig->enmAvx2); 3140 3155 PORTABLE_DISABLE_FEATURE_BIT( 1, pCurLeaf->uEbx, SMEP, X86_CPUID_STEXT_FEATURE_EBX_SMEP); 3141 3156 PORTABLE_DISABLE_FEATURE_BIT( 1, pCurLeaf->uEbx, BMI2, X86_CPUID_STEXT_FEATURE_EBX_BMI2); 3142 PORTABLE_DISABLE_FEATURE_BIT ( 1, pCurLeaf->uEbx, INVPCID, X86_CPUID_STEXT_FEATURE_EBX_INVPCID);3157 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pCurLeaf->uEbx, INVPCID, X86_CPUID_STEXT_FEATURE_EBX_INVPCID, pConfig->enmInvpcid); 3143 3158 PORTABLE_DISABLE_FEATURE_BIT( 1, pCurLeaf->uEbx, AVX512F, X86_CPUID_STEXT_FEATURE_EBX_AVX512F); 3144 3159 PORTABLE_DISABLE_FEATURE_BIT_CFG(1, pCurLeaf->uEbx, RDSEED, X86_CPUID_STEXT_FEATURE_EBX_RDSEED, pConfig->enmRdSeed); … … 3153 3168 3154 3169 /* Force standard feature bits. */ 3170 if (pConfig->enmFsGsBase == CPUMISAEXTCFG_ENABLED_ALWAYS) 3171 pCurLeaf->uEbx |= X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE; 3155 3172 if (pConfig->enmAvx2 == CPUMISAEXTCFG_ENABLED_ALWAYS) 3156 3173 pCurLeaf->uEbx |= X86_CPUID_STEXT_FEATURE_EBX_AVX2; … … 3159 3176 if (pConfig->enmCLFlushOpt == CPUMISAEXTCFG_ENABLED_ALWAYS) 3160 3177 pCurLeaf->uEbx |= X86_CPUID_STEXT_FEATURE_EBX_CLFLUSHOPT; 3178 if (pConfig->enmInvpcid == CPUMISAEXTCFG_ENABLED_ALWAYS) 3179 pCurLeaf->uEbx |= X86_CPUID_STEXT_FEATURE_EBX_INVPCID; 3161 3180 break; 3162 3181 } … … 3925 3944 "|RDSEED" 3926 3945 "|CLFLUSHOPT" 3946 "|FSGSBASE" 3947 "|PCID" 3948 "|INVPCID" 3927 3949 "|ABM" 3928 3950 "|SSE4A" … … 4060 4082 */ 4061 4083 rc = cpumR3CpuIdReadIsaExtCfg(pVM, pIsaExts, "CLFLUSHOPT", &pConfig->enmCLFlushOpt, fNestedPagingAndFullGuestExec); 4084 AssertLogRelRCReturn(rc, rc); 4085 4086 /** @cfgm{/CPUM/IsaExts/FSGSBASE, isaextcfg, true} 4087 * Whether to expose the read/write FSGSBASE instructions to the guest. 4088 */ 4089 rc = cpumR3CpuIdReadIsaExtCfg(pVM, pIsaExts, "FSGSBASE", &pConfig->enmFsGsBase, true); 4090 AssertLogRelRCReturn(rc, rc); 4091 4092 /** @cfgm{/CPUM/IsaExts/PCID, isaextcfg, true} 4093 * Whether to expose the PCID feature to the guest. 4094 */ 4095 rc = cpumR3CpuIdReadIsaExtCfg(pVM, pIsaExts, "PCID", &pConfig->enmPcid, true); 4096 AssertLogRelRCReturn(rc, rc); 4097 4098 /** @cfgm{/CPUM/IsaExts/INVPCID, isaextcfg, true} 4099 * Whether to expose the INVPCID instruction to the guest. 4100 */ 4101 rc = cpumR3CpuIdReadIsaExtCfg(pVM, pIsaExts, "INVPCID", &pConfig->enmInvpcid, true); 4062 4102 AssertLogRelRCReturn(rc, rc); 4063 4103 … … 5197 5237 CPUID_RAW_FEATURE_IGN(Std, uEcx, X86_CPUID_FEATURE_ECX_PDCM); 5198 5238 CPUID_RAW_FEATURE_RET(Std, uEcx, RT_BIT_32(16) /*reserved*/); 5199 CPUID_RAW_FEATURE_ IGN(Std, uEcx, X86_CPUID_FEATURE_ECX_PCID);5239 CPUID_RAW_FEATURE_RET(Std, uEcx, X86_CPUID_FEATURE_ECX_PCID); 5200 5240 CPUID_RAW_FEATURE_IGN(Std, uEcx, X86_CPUID_FEATURE_ECX_DCA); 5201 5241 CPUID_RAW_FEATURE_RET(Std, uEcx, X86_CPUID_FEATURE_ECX_SSE4_1);
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