Changeset 7072 in vbox for trunk/src/VBox
- Timestamp:
- Feb 21, 2008 2:06:23 PM (17 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Additions/WINNT/VBoxService/VBoxClipboard.cpp
r5999 r7072 149 149 pParm->type = VMMDevHGCMParmType_LinAddr; 150 150 pParm->u.Pointer.size = cb; 151 pParm->u.Pointer.u.linearAddr = ( VBOXGCPTR)pv;151 pParm->u.Pointer.u.linearAddr = (RTGCPTR)pv; 152 152 } 153 153 -
trunk/src/VBox/Additions/common/VBoxGuestLib/VBoxCalls.c
r5999 r7072 125 125 data.mappings.type = VMMDevHGCMParmType_LinAddr; 126 126 data.mappings.u.Pointer.size = sizeof (SHFLMAPPING) * *pcMappings; 127 data.mappings.u.Pointer.u.linearAddr = ( VBOXGCPTR)&paMappings[0];127 data.mappings.u.Pointer.u.linearAddr = (RTGCPTR)&paMappings[0]; 128 128 129 129 /* Log(("VBOXSF: in ifs difference %d\n", … … 162 162 data.name.type = VMMDevHGCMParmType_LinAddr; 163 163 data.name.u.Pointer.size = size; 164 data.name.u.Pointer.u.linearAddr = ( VBOXGCPTR)pString;164 data.name.u.Pointer.u.linearAddr = (RTGCPTR)pString; 165 165 166 166 rc = VbglHGCMCall (pClient->handle, &data.callInfo, sizeof (data)); … … 188 188 data.path.type = VMMDevHGCMParmType_LinAddr; 189 189 data.path.u.Pointer.size = ShflStringSizeOfBuffer (szFolderName); 190 data.path.u.Pointer.u.linearAddr = ( VBOXGCPTR)szFolderName;190 data.path.u.Pointer.u.linearAddr = (RTGCPTR)szFolderName; 191 191 192 192 data.root.type = VMMDevHGCMParmType_32bit; … … 223 223 data.path.type = VMMDevHGCMParmType_LinAddr; 224 224 data.path.u.Pointer.size = ShflStringSizeOfBuffer (szFolderName); 225 data.path.u.Pointer.u.linearAddr = ( VBOXGCPTR)szFolderName;225 data.path.u.Pointer.u.linearAddr = (RTGCPTR)szFolderName; 226 226 227 227 data.root.type = VMMDevHGCMParmType_32bit; … … 280 280 data.path.type = VMMDevHGCMParmType_LinAddr; 281 281 data.path.u.Pointer.size = ShflStringSizeOfBuffer (pParsedPath); 282 data.path.u.Pointer.u.linearAddr = ( VBOXGCPTR)pParsedPath;282 data.path.u.Pointer.u.linearAddr = (RTGCPTR)pParsedPath; 283 283 284 284 data.parms.type = VMMDevHGCMParmType_LinAddr; 285 285 data.parms.u.Pointer.size = sizeof (SHFLCREATEPARMS); 286 data.parms.u.Pointer.u.linearAddr = ( VBOXGCPTR)pCreateParms;286 data.parms.u.Pointer.u.linearAddr = (RTGCPTR)pCreateParms; 287 287 288 288 rc = VbglHGCMCall (pClient->handle, &data.callInfo, sizeof (data)); … … 339 339 data.path.type = VMMDevHGCMParmType_LinAddr_In; 340 340 data.path.u.Pointer.size = ShflStringSizeOfBuffer (pParsedPath); 341 data.path.u.Pointer.u.linearAddr = ( VBOXGCPTR)pParsedPath;341 data.path.u.Pointer.u.linearAddr = (RTGCPTR)pParsedPath; 342 342 343 343 data.flags.type = VMMDevHGCMParmType_32bit; … … 371 371 data.src.type = VMMDevHGCMParmType_LinAddr_In; 372 372 data.src.u.Pointer.size = ShflStringSizeOfBuffer (pSrcPath); 373 data.src.u.Pointer.u.linearAddr = ( VBOXGCPTR)pSrcPath;373 data.src.u.Pointer.u.linearAddr = (RTGCPTR)pSrcPath; 374 374 375 375 data.dest.type = VMMDevHGCMParmType_LinAddr_In; 376 376 data.dest.u.Pointer.size = ShflStringSizeOfBuffer (pDestPath); 377 data.dest.u.Pointer.u.linearAddr = ( VBOXGCPTR)pDestPath;377 data.dest.u.Pointer.u.linearAddr = (RTGCPTR)pDestPath; 378 378 379 379 data.flags.type = VMMDevHGCMParmType_32bit; … … 412 412 data.buffer.type = (fLocked) ? VMMDevHGCMParmType_LinAddr_Locked_Out : VMMDevHGCMParmType_LinAddr_Out; 413 413 data.buffer.u.Pointer.size = *pcbBuffer; 414 data.buffer.u.Pointer.u.linearAddr = ( VBOXGCPTR)pBuffer;414 data.buffer.u.Pointer.u.linearAddr = (RTGCPTR)pBuffer; 415 415 416 416 rc = VbglHGCMCall (pClient->handle, &data.callInfo, sizeof (data)); … … 447 447 data.buffer.type = (fLocked) ? VMMDevHGCMParmType_LinAddr_Locked_In : VMMDevHGCMParmType_LinAddr_In; 448 448 data.buffer.u.Pointer.size = *pcbBuffer; 449 data.buffer.u.Pointer.u.linearAddr = ( VBOXGCPTR)pBuffer;449 data.buffer.u.Pointer.u.linearAddr = (RTGCPTR)pBuffer; 450 450 451 451 rc = VbglHGCMCall (pClient->handle, &data.callInfo, sizeof (data)); … … 517 517 data.path.u.Pointer.size = 518 518 (ParsedPath) ? ShflStringSizeOfBuffer(ParsedPath) : 0; 519 data.path.u.Pointer.u.linearAddr = ( VBOXGCPTR) ParsedPath;519 data.path.u.Pointer.u.linearAddr = (RTGCPTR) ParsedPath; 520 520 521 521 data.buffer.type = VMMDevHGCMParmType_LinAddr_Out; 522 522 data.buffer.u.Pointer.size = *pcbBuffer; 523 data.buffer.u.Pointer.u.linearAddr = ( VBOXGCPTR)pBuffer;523 data.buffer.u.Pointer.u.linearAddr = (RTGCPTR)pBuffer; 524 524 525 525 data.resumePoint.type = VMMDevHGCMParmType_32bit; … … 562 562 data.info.type = VMMDevHGCMParmType_LinAddr; 563 563 data.info.u.Pointer.size = *pcbBuffer; 564 data.info.u.Pointer.u.linearAddr = ( VBOXGCPTR)pBuffer;564 data.info.u.Pointer.u.linearAddr = (RTGCPTR)pBuffer; 565 565 566 566 rc = VbglHGCMCall (pClient->handle, &data.callInfo, sizeof (data)); -
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r7045 r7072 109 109 uint32_t pci_irq_levels[4][PCI_IRQ_WORDS]; 110 110 /** The base address for PCI assigned MMIO addresses. */ 111 RTGCPHYS 111 RTGCPHYS32 pci_mem_base; 112 112 /** The next I/O port address which the PCI BIOS will use. */ 113 113 uint32_t pci_bios_io_addr; 114 114 /** The next MMIO address which the PCI BIOS will use. */ 115 115 uint32_t pci_bios_mem_addr; 116 uint32_t u32Padding; /**< Alignment padding. */117 118 116 /** I/O APIC usage flag */ 119 117 bool fUseIoApic; … … 288 286 #else /* less strict check */ 289 287 AssertMsg(VBOX_SUCCESS(rc) || rc == VERR_IOM_MMIO_RANGE_NOT_FOUND, ("rc=%Vrc d=%s\n", rc, d->name)); NOREF(rc); 290 #endif 288 #endif 291 289 } 292 290 } … … 774 772 { 775 773 case 0x0101: 776 if (vendor_id == 0x8086 && 774 if (vendor_id == 0x8086 && 777 775 (device_id == 0x7010 || device_id == 0x7111)) { 778 776 /* PIIX3 or PIIX4 IDE */ … … 1085 1083 if (pData->devices[i]) 1086 1084 { 1087 LogRel(("New device in slot %#x, %s (vendor=%#06x device=%#06x)\n", i, pData->devices[i]->name, 1085 LogRel(("New device in slot %#x, %s (vendor=%#06x device=%#06x)\n", i, pData->devices[i]->name, 1088 1086 PCIDevGetVendorId(pData->devices[i]), PCIDevGetDeviceId(pData->devices[i]))); 1089 1087 if (SSMR3HandleGetAfter(pSSMHandle) != SSMAFTER_DEBUG_IT) … … 1102 1100 if (!pDev) 1103 1101 { 1104 LogRel(("Device in slot %#x has been removed! vendor=%#06x device=%#06x\n", i, 1102 LogRel(("Device in slot %#x has been removed! vendor=%#06x device=%#06x\n", i, 1105 1103 PCIDevGetVendorId(&DevTmp), PCIDevGetDeviceId(&DevTmp))); 1106 1104 if (SSMR3HandleGetAfter(pSSMHandle) != SSMAFTER_DEBUG_IT) … … 1120 1118 /* commit the loaded device config. */ 1121 1119 memcpy(pDev->config, DevTmp.config, sizeof(pDev->config)); 1122 if (DevTmp.Int.s.iIrq >= PCI_DEVICES_MAX) 1120 if (DevTmp.Int.s.iIrq >= PCI_DEVICES_MAX) 1123 1121 { 1124 1122 LogRel(("Device %s: Too many devices %d (max=%d)\n", pDev->name, DevTmp.Int.s.iIrq, PCI_DEVICES_MAX)); … … 1328 1326 1329 1327 1330 /** 1328 /** 1331 1329 * @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksHC 1332 1330 */ 1333 static DECLCALLBACK(void) pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld, 1331 static DECLCALLBACK(void) pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld, 1334 1332 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld) 1335 1333 { -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r7057 r7072 242 242 VGA_STATE_COMMON 243 243 #ifdef VBOX 244 /** end-of-common-state-marker + alignment.*/244 /** end-of-common-state-marker */ 245 245 uint32_t u32Marker; 246 246 /** The physical address the VRAM was assigned. */ 247 RTGCPHYS 247 RTGCPHYS32 GCPhysVRAM; 248 248 /** Pointer to GC vram mapping. */ 249 249 GCPTRTYPE(uint8_t *) vram_ptrGC; 250 /** @todo r=bird: bool not RTUINT (my fault I guess). */ 250 251 /** LFB was updated flag. */ 251 boolfLFBUpdated;252 RTUINT fLFBUpdated; 252 253 /** Indicates if the GC extensions are enabled or not. */ 253 boolfGCEnabled;254 RTUINT fGCEnabled; 254 255 /** Indicates if the R0 extensions are enabled or not. */ 255 bool fR0Enabled; 256 RTUINT fR0Enabled; 257 /** Pointer to vgaGCLFBAccessHandler(). */ 258 RTGCPTR GCPtrLFBHandler; 256 259 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */ 257 260 bool fHaveDirtyBits; 258 /** Pointer to vgaGCLFBAccessHandler(). */259 RTGCPTR GCPtrLFBHandler;260 261 /** Bitmap tracking dirty pages. */ 261 262 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32]; … … 281 282 uint32_t fRenderVRAM; 282 283 284 #if HC_ARCH_BITS == 32 285 uint32_t Padding10; 286 #endif 283 287 /** The PCI device. */ 284 288 PCIDEVICE Dev; -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r7066 r7072 142 142 uint32_t u32Lnkst; 143 143 /** Address of the RX descriptor table (ring). Loaded at init. */ 144 RTGCPHYS 144 RTGCPHYS32 GCRDRA; 145 145 /** Address of the TX descriptor table (ring). Loaded at init. */ 146 RTGCPHYS 146 RTGCPHYS32 GCTDRA; 147 147 uint8_t aPROM[16]; 148 148 uint16_t aCSR[CSR_MAX_REG]; … … 167 167 int iLog2DescSize; 168 168 /** Bits 16..23 in 16-bit mode */ 169 RTGCPHYS 169 RTGCPHYS32 GCUpperPhys; 170 170 171 171 /** Transmit signaller */ 172 GCPTRTYPE(PPDMQUEUE) pXmitQueueGC; 172 173 R3R0PTRTYPE(PPDMQUEUE) pXmitQueueHC; 173 GCPTRTYPE(PPDMQUEUE) pXmitQueueGC;174 174 175 175 /** Receive signaller */ 176 R3R0PTRTYPE(PPDMQUEUE) pCanRxQueueHC; 176 177 GCPTRTYPE(PPDMQUEUE) pCanRxQueueGC; 177 R3R0PTRTYPE(PPDMQUEUE) pCanRxQueueHC; 178 /** Pointer to the device instance. */ 179 GCPTRTYPE(PPDMDEVINS) pDevInsGC; 178 180 /** Pointer to the device instance. */ 179 181 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 180 /** Pointer to the device instance. */181 GCPTRTYPE(PPDMDEVINS) pDevInsGC;182 /** Alignment padding. */183 RTGCPTR GCPtrAlignment0;184 182 /** Restore timer. 185 183 * This is used to disconnect and reconnect the link after a restore. */ … … 196 194 PDMINETWORKCONFIG INetworkConfig; 197 195 /** Base address of the MMIO region. */ 198 RTGCPHYS 196 RTGCPHYS32 MMIOBase; 199 197 /** Base port of the I/O space region. */ 200 198 RTIOPORT IOPortBase; … … 214 212 PDMMAC MacConfigured; 215 213 216 #if HC_ARCH_BITS == 64217 uint32_t u32Alignment0; /** Alignment padding. */218 #endif219 214 /** The LED. */ 220 215 PDMLED Led; … … 233 228 234 229 #ifdef PCNET_NO_POLLING 235 RTGCPHYS 230 RTGCPHYS32 TDRAPhysOld; 236 231 uint32_t cbTDRAOld; 237 232 238 RTGCPHYS 233 RTGCPHYS32 RDRAPhysOld; 239 234 uint32_t cbRDRAOld; 240 235 … … 582 577 * Make sure we read the own flag first. 583 578 */ 584 DECLINLINE(void) pcnetTmdLoad(PCNetState *pData, TMD *tmd, RTGCPHYS addr)579 DECLINLINE(void) pcnetTmdLoad(PCNetState *pData, TMD *tmd, RTGCPHYS32 addr) 585 580 { 586 581 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pData); … … 626 621 * Make sure that all data are transmitted before we clear the own flag. 627 622 */ 628 DECLINLINE(void) pcnetTmdStorePassHost(PCNetState *pData, TMD *tmd, RTGCPHYS addr)623 DECLINLINE(void) pcnetTmdStorePassHost(PCNetState *pData, TMD *tmd, RTGCPHYS32 addr) 629 624 { 630 625 STAM_PROFILE_ADV_START(&pData->CTXSUFF(StatTmdStore), a); … … 668 663 * Make sure we read the own flag first. 669 664 */ 670 DECLINLINE(void) pcnetRmdLoad(PCNetState *pData, RMD *rmd, RTGCPHYS addr)665 DECLINLINE(void) pcnetRmdLoad(PCNetState *pData, RMD *rmd, RTGCPHYS32 addr) 671 666 { 672 667 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pData); … … 711 706 * Make sure that all data are transmitted before we clear the own flag. 712 707 */ 713 DECLINLINE(void) pcnetRmdStorePassHost(PCNetState *pData, RMD *rmd, RTGCPHYS addr)708 DECLINLINE(void) pcnetRmdStorePassHost(PCNetState *pData, RMD *rmd, RTGCPHYS32 addr) 714 709 { 715 710 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pData); … … 971 966 * Get the receive descriptor ring address with a given index. 972 967 */ 973 DECLINLINE(RTGCPHYS ) pcnetRdraAddr(PCNetState *pData, int idx)968 DECLINLINE(RTGCPHYS32) pcnetRdraAddr(PCNetState *pData, int idx) 974 969 { 975 970 return pData->GCRDRA + ((CSR_RCVRL(pData) - idx) << pData->iLog2DescSize); … … 979 974 * Get the transmit descriptor ring address with a given index. 980 975 */ 981 DECLINLINE(RTGCPHYS ) pcnetTdraAddr(PCNetState *pData, int idx)976 DECLINLINE(RTGCPHYS32) pcnetTdraAddr(PCNetState *pData, int idx) 982 977 { 983 978 return pData->GCTDRA + ((CSR_XMTRL(pData) - idx) << pData->iLog2DescSize); … … 1303 1298 * 3) TDRA & RDRA overlap partly with different physical pages 1304 1299 */ 1305 RTGCPHYS RDRAPageStart = pData->GCRDRA & ~PAGE_OFFSET_MASK;1306 RTGCPHYS RDRAPageEnd = (pcnetRdraAddr(pData, 0) - 1) & ~PAGE_OFFSET_MASK;1307 RTGCPHYS TDRAPageStart = pData->GCTDRA & ~PAGE_OFFSET_MASK;1308 RTGCPHYS TDRAPageEnd = (pcnetTdraAddr(pData, 0) - 1) & ~PAGE_OFFSET_MASK;1300 RTGCPHYS32 RDRAPageStart = pData->GCRDRA & ~PAGE_OFFSET_MASK; 1301 RTGCPHYS32 RDRAPageEnd = (pcnetRdraAddr(pData, 0) - 1) & ~PAGE_OFFSET_MASK; 1302 RTGCPHYS32 TDRAPageStart = pData->GCTDRA & ~PAGE_OFFSET_MASK; 1303 RTGCPHYS32 TDRAPageEnd = (pcnetTdraAddr(pData, 0) - 1) & ~PAGE_OFFSET_MASK; 1309 1304 1310 1305 if ( RDRAPageStart > TDRAPageEnd … … 1474 1469 * The current receive message descriptor. 1475 1470 */ 1476 RMD rmd;1477 int i = CSR_RCVRC(pData);1478 RTGCPHYS addr;1471 RMD rmd; 1472 int i = CSR_RCVRC(pData); 1473 RTGCPHYS32 addr; 1479 1474 1480 1475 if (i < 1) … … 1568 1563 if (RT_LIKELY(pData->GCTDRA)) 1569 1564 { 1570 RTGCPHYS cxda = pcnetTdraAddr(pData, CSR_XMTRC(pData));1565 RTGCPHYS32 cxda = pcnetTdraAddr(pData, CSR_XMTRC(pData)); 1571 1566 1572 1567 pcnetTmdLoad(pData, tmd, PHYSADDR(pData, cxda)); … … 1670 1665 /* Dump the status of all RX descriptors */ 1671 1666 const unsigned cb = 1 << pData->iLog2DescSize; 1672 RTGCPHYS 1667 RTGCPHYS32 GCPhys = pData->GCRDRA; 1673 1668 i = CSR_RCVRL(pData); 1674 1669 while (i-- > 0) … … 1684 1679 else 1685 1680 { 1686 uint8_t *src = &pData->abRecvBuf[8];1687 RTGCPHYS crda = CSR_CRDA(pData);1688 RTGCPHYS next_crda;1681 uint8_t *src = &pData->abRecvBuf[8]; 1682 RTGCPHYS32 crda = CSR_CRDA(pData); 1683 RTGCPHYS32 next_crda; 1689 1684 RMD rmd, next_rmd; 1690 1685 int pktcount = 0; … … 1715 1710 1716 1711 int count = RT_MIN(4096 - (int)rmd.rmd1.bcnt, size); 1717 RTGCPHYS rbadr = PHYSADDR(pData, rmd.rmd0.rbadr);1712 RTGCPHYS32 rbadr = PHYSADDR(pData, rmd.rmd0.rbadr); 1718 1713 PDMDevHlpPhysWrite(pDevIns, rbadr, src, count); 1719 1714 src += count; … … 1860 1855 * Reads the first part of a frame 1861 1856 */ 1862 DECLINLINE(void) pcnetXmitRead1st(PCNetState *pData, RTGCPHYS GCPhysFrame, const unsigned cbFrame)1857 DECLINLINE(void) pcnetXmitRead1st(PCNetState *pData, RTGCPHYS32 GCPhysFrame, const unsigned cbFrame) 1863 1858 { 1864 1859 Assert(cbFrame < sizeof(pData->abSendBuf)); … … 1875 1870 * Reads more into the current frame. 1876 1871 */ 1877 DECLINLINE(void) pcnetXmitReadMore(PCNetState *pData, RTGCPHYS GCPhysFrame, const unsigned cbFrame)1872 DECLINLINE(void) pcnetXmitReadMore(PCNetState *pData, RTGCPHYS32 GCPhysFrame, const unsigned cbFrame) 1878 1873 { 1879 1874 Assert(pData->SendFrame.cb + cbFrame < sizeof(pData->abSendBuf)); … … 2786 2781 case 2: 2787 2782 /* PHY identifier 1. */ 2788 val = 0x22; /* Am79C874 PHY */ 2783 val = 0x22; /* Am79C874 PHY */ 2789 2784 break; 2790 2785 2791 2786 case 3: 2792 2787 /* PHY identifier 2. */ 2793 val = 0x561b; /* Am79C874 PHY */ 2788 val = 0x561b; /* Am79C874 PHY */ 2794 2789 break; 2795 2790 … … 2799 2794 #if 0 2800 2795 // Advertising flow control is a) not the default, and b) confuses 2801 // the link speed detection routine in Windows PCnet driver 2796 // the link speed detection routine in Windows PCnet driver 2802 2797 | 0x0400 /* Try flow control. */ 2803 2798 #endif … … 3782 3777 { 3783 3778 const unsigned cb = 1 << pData->iLog2DescSize; 3784 RTGCPHYS 3779 RTGCPHYS32 GCPhys = pData->GCRDRA; 3785 3780 unsigned i = CSR_RCVRL(pData); 3786 3781 while (i-- > 0) … … 3822 3817 { 3823 3818 const unsigned cb = 1 << pData->iLog2DescSize; 3824 RTGCPHYS 3819 RTGCPHYS32 GCPhys = pData->GCTDRA; 3825 3820 unsigned i = CSR_XMTRL(pData); 3826 3821 while (i-- > 0) … … 3903 3898 SSMR3PutS32(pSSMHandle, pData->iISR); 3904 3899 SSMR3PutU32(pSSMHandle, pData->u32Lnkst); 3905 SSMR3PutGCPhys (pSSMHandle, pData->GCRDRA);3906 SSMR3PutGCPhys (pSSMHandle, pData->GCTDRA);3900 SSMR3PutGCPhys32(pSSMHandle, pData->GCRDRA); 3901 SSMR3PutGCPhys32(pSSMHandle, pData->GCTDRA); 3907 3902 SSMR3PutMem(pSSMHandle, pData->aPROM, sizeof(pData->aPROM)); 3908 3903 SSMR3PutMem(pSSMHandle, pData->aCSR, sizeof(pData->aCSR)); … … 3965 3960 SSMR3GetS32(pSSMHandle, &pData->iISR); 3966 3961 SSMR3GetU32(pSSMHandle, &pData->u32Lnkst); 3967 SSMR3GetGCPhys (pSSMHandle, &pData->GCRDRA);3968 SSMR3GetGCPhys (pSSMHandle, &pData->GCTDRA);3962 SSMR3GetGCPhys32(pSSMHandle, &pData->GCRDRA); 3963 SSMR3GetGCPhys32(pSSMHandle, &pData->GCTDRA); 3969 3964 SSMR3GetMem(pSSMHandle, &pData->aPROM, sizeof(pData->aPROM)); 3970 3965 SSMR3GetMem(pSSMHandle, &pData->aCSR, sizeof(pData->aCSR)); -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r6852 r7072 470 470 } 471 471 472 static void acpiPhyscpy (ACPIState *s, RTGCPHYS dst, const void * const src, size_t size)472 static void acpiPhyscpy (ACPIState *s, RTGCPHYS32 dst, const void * const src, size_t size) 473 473 { 474 474 PDMDevHlpPhysWrite (s->pDevIns, dst, src, size); … … 476 476 477 477 /* Differentiated System Description Table (DSDT) */ 478 static void acpiSetupDSDT (ACPIState *s, RTGCPHYS addr)478 static void acpiSetupDSDT (ACPIState *s, RTGCPHYS32 addr) 479 479 { 480 480 acpiPhyscpy (s, addr, AmlCode, sizeof(AmlCode)); … … 482 482 483 483 /* Firmware ACPI Control Structure (FACS) */ 484 static void acpiSetupFACS (ACPIState *s, RTGCPHYS addr)484 static void acpiSetupFACS (ACPIState *s, RTGCPHYS32 addr) 485 485 { 486 486 ACPITBLFACS facs; … … 500 500 501 501 /* Fixed ACPI Description Table (FADT aka FACP) */ 502 static void acpiSetupFADT (ACPIState *s, RTGCPHYS addr, uint32_t facs_addr, uint32_t dsdt_addr)502 static void acpiSetupFADT (ACPIState *s, RTGCPHYS32 addr, uint32_t facs_addr, uint32_t dsdt_addr) 503 503 { 504 504 ACPITBLFADT fadt; … … 567 567 * addresses for description headers. RSDT is for ACPI 1.0. XSDT for ACPI 2.0 and up. 568 568 */ 569 static int acpiSetupRSDT (ACPIState *s, RTGCPHYS addr, unsigned int nb_entries, uint32_t *addrs)569 static int acpiSetupRSDT (ACPIState *s, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs) 570 570 { 571 571 ACPITBLRSDT *rsdt; … … 589 589 590 590 /* Extended System Description Table. */ 591 static int acpiSetupXSDT (ACPIState *s, RTGCPHYS addr, unsigned int nb_entries, uint32_t *addrs)591 static int acpiSetupXSDT (ACPIState *s, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs) 592 592 { 593 593 ACPITBLXSDT *xsdt; … … 631 631 /** @todo All hardcoded, should set this up based on the actual VM config!!!!! */ 632 632 /** @note APIC without IO-APIC hangs Windows Vista therefore we setup both */ 633 static void acpiSetupMADT (ACPIState *s, RTGCPHYS addr)633 static void acpiSetupMADT (ACPIState *s, RTGCPHYS32 addr) 634 634 { 635 635 ACPITBLMADT madt; … … 1456 1456 static int acpiPlantTables (ACPIState *s) 1457 1457 { 1458 int rc;1459 uint32_trsdt_addr, xsdt_addr, fadt_addr, facs_addr, dsdt_addr, last_addr, apic_addr = 0;1460 uint32_t addend = 0;1461 uint32_trsdt_addrs[4];1462 uint32_t cAddr;1463 size_t rsdt_tbl_len = sizeof(ACPITBLHEADER);1464 size_t xsdt_tbl_len = sizeof(ACPITBLHEADER);1458 int rc; 1459 RTGCPHYS32 rsdt_addr, xsdt_addr, fadt_addr, facs_addr, dsdt_addr, last_addr, apic_addr = 0; 1460 uint32_t addend = 0; 1461 RTGCPHYS32 rsdt_addrs[4]; 1462 uint32_t cAddr; 1463 size_t rsdt_tbl_len = sizeof(ACPITBLHEADER); 1464 size_t xsdt_tbl_len = sizeof(ACPITBLHEADER); 1465 1465 1466 1466 cAddr = 1; /* FADT */ -
trunk/src/VBox/Devices/PC/DevPcBios.cpp
r6890 r7072 1121 1121 /* the low ROM mapping. */ 1122 1122 unsigned cb = RT_MIN(cbPcBiosBinary, 128 * _1K); 1123 RTGCPHYS GCPhys = 0x00100000 - cb;1123 RTGCPHYS32 GCPhys = 0x00100000 - cb; 1124 1124 const uint8_t *pbVirgin = &pu8PcBiosBinary[cbPcBiosBinary - cb]; 1125 1125 while (GCPhys < 0x00100000) -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r7060 r7072 321 321 /** The BusMaster DMA state. */ 322 322 BMDMAState BmDma; 323 /** (32 bit) GC phys pointer to first DMA descriptor. */324 uint32_tpFirstDMADesc;325 /** (32 bit) GC phys pointer to last DMA descriptor. */326 uint32_tpLastDMADesc;327 /** (32 bit) GC phys pointer to current DMA buffer (for redo operations). */328 uint32_tpRedoDMABuffer;323 /** Pointer to first DMA descriptor. */ 324 RTGCPHYS32 pFirstDMADesc; 325 /** Pointer to last DMA descriptor. */ 326 RTGCPHYS32 pLastDMADesc; 327 /** Pointer to current DMA buffer (for redo operations). */ 328 RTGCPHYS32 pRedoDMABuffer; 329 329 /** Size of current DMA buffer (for redo operations). */ 330 330 uint32_t cbRedoDMABuffer; … … 3909 3909 ATADevState *s = &pCtl->aIfs[pCtl->iAIOIf]; 3910 3910 bool fRedo; 3911 uint32_tpDesc;3911 RTGCPHYS32 pDesc; 3912 3912 uint32_t cbTotalTransfer, cbElementaryTransfer; 3913 3913 uint32_t iIOBufferCur, iIOBufferEnd; … … 3939 3939 { 3940 3940 BMDMADesc DMADesc; 3941 uint32_tpBuffer;3941 RTGCPHYS32 pBuffer; 3942 3942 uint32_t cbBuffer; 3943 3943 … … 3967 3967 dmalen = RT_MIN(cbBuffer, iIOBufferEnd - iIOBufferCur); 3968 3968 Log2(("%s: DMA desc %#010x: addr=%#010x size=%#010x\n", __FUNCTION__, 3969 pDesc, pBuffer, cbBuffer));3969 (int)pDesc, pBuffer, cbBuffer)); 3970 3970 if (uTxDir == PDMBLOCKTXDIR_FROM_DEVICE) 3971 3971 PDMDevHlpPhysWrite(pDevIns, pBuffer, s->CTXSUFF(pbIOBuffer) + iIOBufferCur, dmalen); … … 5623 5623 SSMR3PutBool(pSSMHandle, pData->aCts[i].fRedoDMALastDesc); 5624 5624 SSMR3PutMem(pSSMHandle, &pData->aCts[i].BmDma, sizeof(pData->aCts[i].BmDma)); 5625 SSMR3Put U32(pSSMHandle, pData->aCts[i].pFirstDMADesc);5626 SSMR3Put U32(pSSMHandle, pData->aCts[i].pLastDMADesc);5627 SSMR3Put U32(pSSMHandle, pData->aCts[i].pRedoDMABuffer);5625 SSMR3PutGCPhys32(pSSMHandle, pData->aCts[i].pFirstDMADesc); 5626 SSMR3PutGCPhys32(pSSMHandle, pData->aCts[i].pLastDMADesc); 5627 SSMR3PutGCPhys32(pSSMHandle, pData->aCts[i].pRedoDMABuffer); 5628 5628 SSMR3PutU32(pSSMHandle, pData->aCts[i].cbRedoDMABuffer); 5629 5629 … … 5728 5728 SSMR3GetBool(pSSMHandle, (bool *)&pData->aCts[i].fRedoDMALastDesc); 5729 5729 SSMR3GetMem(pSSMHandle, &pData->aCts[i].BmDma, sizeof(pData->aCts[i].BmDma)); 5730 SSMR3Get U32(pSSMHandle, &pData->aCts[i].pFirstDMADesc);5731 SSMR3Get U32(pSSMHandle, &pData->aCts[i].pLastDMADesc);5732 SSMR3Get U32(pSSMHandle, &pData->aCts[i].pRedoDMABuffer);5730 SSMR3GetGCPhys32(pSSMHandle, &pData->aCts[i].pFirstDMADesc); 5731 SSMR3GetGCPhys32(pSSMHandle, &pData->aCts[i].pLastDMADesc); 5732 SSMR3GetGCPhys32(pSSMHandle, &pData->aCts[i].pRedoDMABuffer); 5733 5733 SSMR3GetU32(pSSMHandle, &pData->aCts[i].cbRedoDMABuffer); 5734 5734 -
trunk/src/VBox/Devices/Storage/PIIX3ATABmDma.h
r7060 r7072 52 52 /** PIIX3 Bus Master DMA unit state. */ 53 53 typedef struct BMDMAState { 54 /** Address of the MMIO region in the guest's memory space. */55 uint32_t pvAddr;56 54 /** Command register. */ 57 55 uint8_t u8Cmd; 58 56 /** Status register. */ 59 57 uint8_t u8Status; 58 /** Address of the MMIO region in the guest's memory space. */ 59 RTGCPHYS32 pvAddr; 60 60 } BMDMAState; 61 61 … … 64 64 typedef struct BMDMADesc { 65 65 /** Address of the DMA source/target buffer. */ 66 uint32_tpBuffer;66 RTGCPHYS32 pBuffer; 67 67 /** Size of the DMA source/target buffer. */ 68 68 uint32_t cbBuffer; -
trunk/src/VBox/Devices/VMMDev/VMMDevState.h
r5999 r7072 85 85 VMMDevMemory *pVMMDevRAMHC; 86 86 /** GC physical address of VMMDev RAM area */ 87 RTGCPHYS GCPhysVMMDevRAM;87 RTGCPHYS32 GCPhysVMMDevRAM; 88 88 89 89 /** Information reported by guest via VMMDevReportGuestInfo generic request. -
trunk/src/VBox/Devices/vl_vbox.h
r5999 r7072 70 70 * Misc types. 71 71 */ 72 typedef RTGCPHYS 72 typedef RTGCPHYS32 target_phys_addr_t; 73 73 typedef PCIDEVICE PCIDevice; 74 74 typedef RTGCUINTREG target_ulong; -
trunk/src/VBox/VMM/PGM.cpp
r6927 r7072 566 566 567 567 /** Saved state data unit version. */ 568 #define PGM_SAVED_STATE_VERSION 5568 #define PGM_SAVED_STATE_VERSION 6 569 569 570 570 /******************************************************************************* -
trunk/src/VBox/VMM/SSM.cpp
r5999 r7072 2236 2236 2237 2237 /** 2238 * Saves a 32 bits GC physical address item to the current data unit. 2239 * 2240 * @returns VBox status. 2241 * @param pSSM SSM operation handle. 2242 * @param GCPhys The item to save 2243 */ 2244 SSMR3DECL(int) SSMR3PutGCPhys32(PSSMHANDLE pSSM, RTGCPHYS32 GCPhys) 2245 { 2246 if (pSSM->enmOp == SSMSTATE_SAVE_EXEC) 2247 return ssmr3Write(pSSM, &GCPhys, sizeof(GCPhys)); 2248 AssertMsgFailed(("Invalid state %d\n", pSSM->enmOp)); 2249 return VERR_SSM_INVALID_STATE; 2250 } 2251 2252 /** 2238 2253 * Saves a GC physical address item to the current data unit. 2239 2254 * … … 2757 2772 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) 2758 2773 return ssmr3Read(pSSM, pi, sizeof(*pi)); 2774 AssertMsgFailed(("Invalid state %d\n", pSSM->enmOp)); 2775 return VERR_SSM_INVALID_STATE; 2776 } 2777 2778 /** 2779 * Loads a 32 bits GC physical address item from the current data unit. 2780 * 2781 * @returns VBox status. 2782 * @param pSSM SSM operation handle. 2783 * @param pGCPhys Where to store the GC physical address. 2784 */ 2785 SSMR3DECL(int) SSMR3GetGCPhys32(PSSMHANDLE pSSM, PRTGCPHYS32 pGCPhys) 2786 { 2787 if (pSSM->enmOp == SSMSTATE_LOAD_EXEC || pSSM->enmOp == SSMSTATE_OPEN_READ) 2788 return ssmr3Read(pSSM, pGCPhys, sizeof(*pGCPhys)); 2759 2789 AssertMsgFailed(("Invalid state %d\n", pSSM->enmOp)); 2760 2790 return VERR_SSM_INVALID_STATE;
Note:
See TracChangeset
for help on using the changeset viewer.