Changeset 70970 in vbox for trunk

Timestamp:

Feb 12, 2018 11:12:48 AM (7 years ago)

Author:

vboxsync

Message:

VMM/IEM: Nested Hw.virt: Flush TLB after switching modes if needed to prevent using CR3 with an old/previous paging mode.

File:

• trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h

@@ -61 +61 @@
 {
     /*
+     * Inform PGM about paging mode changes.
+     * We include X86_CR0_PE because PGM doesn't handle paged-real mode yet,
+     * see comment in iemMemPageTranslateAndCheckAccess().
+     */
+    int rc = PGMChangeMode(pVCpu, pCtx->cr0 | X86_CR0_PE, pCtx->cr4, pCtx->msrEFER);
+#ifdef IN_RING3
+    Assert(rc != VINF_PGM_CHANGE_MODE);
+#endif
+    AssertRCReturn(rc, rc);
+
+    /* Inform CPUM (recompiler), can later be removed. */
+    CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
+
+    /*
      * Flush the TLB with new CR3. This is required in case the PGM mode change
-     * below doesn't actually change anything.
+     * above doesn't actually change anything.
      */
-    int rc = PGMFlushTLB(pVCpu, pCtx->cr3, true);
-    if (RT_SUCCESS(rc))
-    {
-        /*
-         * Inform PGM about paging mode changes.
-         * We include X86_CR0_PE because PGM doesn't handle paged-real mode yet,
-         * see comment in iemMemPageTranslateAndCheckAccess().
-         */
-        rc = PGMChangeMode(pVCpu, pCtx->cr0 | X86_CR0_PE, pCtx->cr4, pCtx->msrEFER);
-#ifdef IN_RING3
-        Assert(rc != VINF_PGM_CHANGE_MODE);
-#endif
+    if (rc == VINF_SUCCESS)
+    {
+        rc = PGMFlushTLB(pVCpu, pCtx->cr3, true);
         AssertRCReturn(rc, rc);
-
-        /* Inform CPUM (recompiler), can later be removed. */
-        CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
-
-        /* Re-initialize IEM cache/state after the drastic mode switch. */
-        iemReInitExec(pVCpu);
-    }
+    }
+
+    /* Re-initialize IEM cache/state after the drastic mode switch. */
+    iemReInitExec(pVCpu);
     return rc;
 }