VirtualBox

Changeset 71044 in vbox for trunk/src/VBox/VMM/VMMR3


Ignore:
Timestamp:
Feb 16, 2018 9:15:52 PM (7 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
120907
Message:

NEM: Upped the max mapped pages to 4000, which helps with performance. Problem was spurious event injections. Sketched out what the pending interrupt register might look like. bugref:9044

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp

    r71043 r71044  
    5959#endif
    6060
    61 
    62 /*********************************************************************************************************************************
    63 *   Structures and Typedefs                                                                                                      *
    64 *********************************************************************************************************************************/
    6561/** @name Our two-bit physical page state for PGMPAGE
    6662 * @{ */
     
    7773#define NEM_WIN_IS_RELEVANT_TO_A20(a_GCPhys)    \
    7874    ( ((RTGCPHYS)((a_GCPhys) - _1M) < (RTGCPHYS)_64K) || ((RTGCPHYS)(a_GCPhys) < (RTGCPHYS)_64K) )
     75
     76
     77/*********************************************************************************************************************************
     78*   Structures and Typedefs                                                                                                      *
     79*********************************************************************************************************************************/
     80/** WHvRegisterInterruptState layout, reconstructed from the v7.1 DDK. */
     81typedef union MISSINGINTERUPTSTATEREG
     82{
     83    /** 64-bit view. */
     84    uint64_t au64[2];
     85    struct /* unamed */
     86    {
     87        uint64_t fInterruptShadow : 1;
     88        uint64_t fNmiMasked : 2;
     89        uint64_t uReserved0 : 61;
     90        uint64_t uReserved1;
     91    };
     92} MISSINGINTERUPTSTATEREG;
     93AssertCompileSize(MISSINGINTERUPTSTATEREG, 16);
     94
     95/** Used by MISSINGPENDINGINTERRUPTIONREG. */
     96typedef enum MISSINGPENDINGINTERRUPTIONTYPE
     97{
     98    kPendingIntType_Interrupt = 0,
     99    kPendingIntType_Nmi,
     100    kPendingIntType_Xcpt,
     101    kPendingIntType_Dunno,
     102    kPendingIntType_SoftwareInterrupt
     103} MISSINGPENDINGINTERRUPTIONTYPE;
     104
     105/** WHvRegisterPendingInterruption layout, reconstructed from the v7.1 DDK. */
     106typedef union MISSINGPENDINGINTERRUPTIONREG
     107{
     108    /** 64-bit view. */
     109    uint64_t au64[2];
     110    struct /* unamed */
     111    {
     112        uint32_t fInterruptionPending : 1;
     113        uint32_t enmInterruptionType : 3; /**< MISSINGPENDINGINTERRUPTIONTYPE */
     114        uint32_t fDeliverErrCd : 1;
     115        uint32_t fUnknown0 : 1;
     116        uint32_t fUnknown1 : 1; /**< Observed set when software interrupt was issued. */
     117        uint32_t uReserved0 : 9;
     118        uint32_t InterruptionVector : 16;
     119        uint32_t uErrCd;
     120        uint64_t uReserved1;
     121    };
     122} MISSINGPENDINGINTERRUPTIONREG;
     123AssertCompileSize(MISSINGPENDINGINTERRUPTIONREG, 16);
    79124
    80125
     
    9971042    aValues[iReg].Reg64 = pCtx->cr2;
    9981043    iReg++;
    999 Log(("=> cr2=%RX64\n", pCtx->cr2));
    10001044    aenmNames[iReg]     = WHvX64RegisterCr3;
    10011045    aValues[iReg].Reg64 = pCtx->cr3;
     
    13141358    /* event injection */
    13151359    aenmNames[76] = WHvRegisterPendingInterruption;
    1316     aenmNames[77] = WHvRegisterPendingInterruption;
     1360    aenmNames[77] = WHvRegisterInterruptState;
    13171361    aenmNames[78] = WHvRegisterInterruptState;
    13181362    aenmNames[79] = WHvRegisterPendingEvent0;
     
    13991443        Assert(aenmNames[29] == WHvX64RegisterCr2);
    14001444        pCtx->cr2 = aValues[29].Reg64;
    1401 Log(("<= cr2=%RX64\n", pCtx->cr2));
    14021445        if (pCtx->cr3 != aValues[30].Reg64)
    14031446        {
     
    15381581
    15391582        /// @todo WHvRegisterPendingInterruption
     1583        Assert(aenmNames[76] == WHvRegisterPendingInterruption);
     1584        /** @todo Someone at microsoft please explain why HV_X64_PENDING_INTERRUPTION_REGISTER
     1585         * and HV_X64_INTERRUPT_STATE_REGISTER are missing from the headers.  Ditto for
     1586         * wathever structures WHvRegisterPendingEvent0/1 uses.   */
     1587        MISSINGPENDINGINTERRUPTIONREG const * pPendingInt = (MISSINGPENDINGINTERRUPTIONREG const *)&aValues[76];
     1588        if (pPendingInt->fInterruptionPending)
     1589        {
     1590            Log6(("PendingInterruption: type=%u vector=%#x errcd=%RTbool/%#x unk0=%u unk1=%u\n",
     1591                  pPendingInt->enmInterruptionType, pPendingInt->InterruptionVector, pPendingInt->fDeliverErrCd,
     1592                  pPendingInt->uErrCd, pPendingInt->fUnknown0, pPendingInt->fUnknown1));
     1593            AssertMsg(pPendingInt->uReserved0 == 0 && pPendingInt->uReserved1 == 0,
     1594                      ("%#RX64 %#RX64\n", pPendingInt->au64[0], pPendingInt->au64[1]));
     1595        }
     1596
    15401597        /// @todo WHvRegisterInterruptState
    15411598        /// @todo WHvRegisterPendingEvent0
     
    22702327        }
    22712328
    2272         /* Major hack alert! */
     2329        /* Hack alert! */
    22732330        uint32_t const cMappedPages = pVM->nem.s.cMappedPages;
    2274         if (cMappedPages < 200)
     2331        if (cMappedPages < 4000)
    22752332        { /* likely */ }
    22762333        else
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