Changeset 71146 in vbox
- Timestamp:
- Feb 28, 2018 9:54:40 AM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 121039
- Location:
- trunk
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/Graphics/VBoxVideoGuest.h
r69307 r71146 126 126 127 127 DECLHIDDEN(uint32_t) VBoxHGSMIGetMonitorCount(PHGSMIGUESTCOMMANDCONTEXT pCtx); 128 DECLHIDDEN(bool) VBoxVGACfgAvailable(void); 129 DECLHIDDEN(bool) VBoxVGACfgQuery(uint16_t u16Id, uint32_t *pu32Value); 128 130 DECLHIDDEN(uint32_t) VBoxVideoGetVRAMSize(void); 129 131 DECLHIDDEN(bool) VBoxVideoAnyWidthAllowed(void); -
trunk/include/VBox/Graphics/VBoxVideoVBE.h
r69307 r71146 50 50 #define VBE_DISPI_IOPORT_DAC_DATA 0x03C9 51 51 52 /* Cross reference with src/VBox/Devices/Graphics/DevVGA.h */ 52 53 #define VBE_DISPI_INDEX_ID 0x0 53 54 #define VBE_DISPI_INDEX_XRES 0x1 … … 62 63 #define VBE_DISPI_INDEX_VBOX_VIDEO 0xa 63 64 #define VBE_DISPI_INDEX_FB_BASE_HI 0xb 65 #define VBE_DISPI_INDEX_CFG 0xc 64 66 65 67 #define VBE_DISPI_ID0 0xB0C0 … … 73 75 #define VBE_DISPI_ID_HGSMI 0xBE01 74 76 #define VBE_DISPI_ID_ANYX 0xBE02 77 #define VBE_DISPI_ID_CFG 0xBE03 /* VBE_DISPI_INDEX_CFG is available. */ 75 78 76 79 #define VBE_DISPI_DISABLED 0x00 … … 83 86 #define VBE_DISPI_NOCLEARMEM 0x80 84 87 88 /* VBE_DISPI_INDEX_CFG content. */ 89 #define VBE_DISPI_CFG_MASK_ID 0x0FFF /* Identifier of a configuration value. */ 90 #define VBE_DISPI_CFG_MASK_SUPPORT 0x1000 /* Query whether the identifier is supported. */ 91 #define VBE_DISPI_CFG_MASK_RESERVED 0xE000 /* For future extensions. Must be 0. */ 92 93 /* VBE_DISPI_INDEX_CFG values. */ 94 #define VBE_DISPI_CFG_ID_VERSION 0x0000 /* Version of the configuration interface. */ 95 #define VBE_DISPI_CFG_ID_VRAM_SIZE 0x0001 /* VRAM size. */ 96 #define VBE_DISPI_CFG_ID_3D 0x0002 /* 3D support. */ 97 #define VBE_DISPI_CFG_ID_VMSVGA 0x0003 /* VMSVGA FIFO and ports are available. */ 98 85 99 #define VGA_PORT_HGSMI_HOST 0x3b0 86 100 #define VGA_PORT_HGSMI_GUEST 0x3d0 -
trunk/src/VBox/Additions/common/VBoxVideo/Modesetting.cpp
r69309 r71146 59 59 60 60 /** 61 * Query whether the virtual hardware supports VBE_DISPI_ID_CFG 62 * and set the interface. 63 * 64 * @returns Whether the interface is supported. 65 */ 66 DECLHIDDEN(bool) VBoxVGACfgAvailable(void) 67 { 68 VBVO_PORT_WRITE_U16(VBE_DISPI_IOPORT_INDEX, VBE_DISPI_INDEX_ID); 69 VBVO_PORT_WRITE_U16(VBE_DISPI_IOPORT_DATA, VBE_DISPI_ID_CFG); 70 const uint16_t DispiId = VBVO_PORT_READ_U16(VBE_DISPI_IOPORT_DATA); 71 return (DispiId == VBE_DISPI_ID_CFG); 72 } 73 74 75 /** 76 * Query a configuration value from the virtual hardware which supports VBE_DISPI_ID_CFG. 77 * I.e. use this function only if VBoxVGACfgAvailable returns true. 78 * 79 * @returns Whether the value is supported. 80 * @param u16Id Identifier of the configuration value (VBE_DISPI_CFG_ID_*). 81 * @param pu32Value Where to store value from the host. 82 */ 83 DECLHIDDEN(bool) VBoxVGACfgQuery(uint16_t u16Id, uint32_t *pu32Value) 84 { 85 VBVO_PORT_WRITE_U16(VBE_DISPI_IOPORT_INDEX, VBE_DISPI_INDEX_CFG); 86 VBVO_PORT_WRITE_U16(VBE_DISPI_IOPORT_DATA, VBE_DISPI_CFG_MASK_SUPPORT | u16Id); 87 const uint32_t u32 = VBVO_PORT_READ_U32(VBE_DISPI_IOPORT_DATA); 88 if (u32) 89 { 90 VBVO_PORT_WRITE_U16(VBE_DISPI_IOPORT_DATA, u16Id); 91 *pu32Value = VBVO_PORT_READ_U32(VBE_DISPI_IOPORT_DATA); 92 return true; 93 } 94 95 return false; 96 } 97 98 99 /** 61 100 * Returns the size of the video RAM in bytes. 62 101 * … … 65 104 DECLHIDDEN(uint32_t) VBoxVideoGetVRAMSize(void) 66 105 { 67 /** @note A 32bit read on this port returns the VRAM size . */106 /** @note A 32bit read on this port returns the VRAM size if interface is older than VBE_DISPI_ID_CFG. */ 68 107 return VBVO_PORT_READ_U32(VBE_DISPI_IOPORT_DATA); 69 108 } -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r70596 r71146 847 847 848 848 #ifdef CONFIG_BOCHS_VBE 849 850 static uint32_t vbe_read_cfg(PVGASTATE pThis) 851 { 852 const uint16_t u16Cfg = pThis->vbe_regs[VBE_DISPI_INDEX_CFG]; 853 const uint16_t u16Id = u16Cfg & VBE_DISPI_CFG_MASK_ID; 854 const bool fQuerySupport = RT_BOOL(u16Cfg & VBE_DISPI_CFG_MASK_SUPPORT); 855 856 switch (u16Id) 857 { 858 case VBE_DISPI_CFG_ID_VERSION: 859 return fQuerySupport ? 1 : 0; 860 case VBE_DISPI_CFG_ID_VRAM_SIZE: 861 return fQuerySupport ? 1 : pThis->vram_size; 862 case VBE_DISPI_CFG_ID_3D: 863 return fQuerySupport ? 1 : pThis->f3DEnabled; 864 case VBE_DISPI_CFG_ID_VMSVGA: 865 return fQuerySupport ? 1 : pThis->fVMSVGAEnabled; 866 default: 867 return 0; /* Not supported. */ 868 } 869 } 870 849 871 static uint32_t vbe_ioport_read_index(PVGASTATE pThis, uint32_t addr) 850 872 { … … 883 905 val = 1; 884 906 break; 907 case VBE_DISPI_INDEX_CFG: 908 val = vbe_read_cfg(pThis); 909 break; 885 910 default: 886 911 Assert(pThis->vbe_index < VBE_DISPI_INDEX_NB); … … 985 1010 val == VBE_DISPI_ID2 || 986 1011 val == VBE_DISPI_ID3 || 987 val == VBE_DISPI_ID4) { 1012 val == VBE_DISPI_ID4 || 1013 /* VBox extensions. */ 1014 val == VBE_DISPI_ID_VBOX_VIDEO || 1015 val == VBE_DISPI_ID_ANYX || 1016 #ifdef VBOX_WITH_HGSMI 1017 val == VBE_DISPI_ID_HGSMI || 1018 #endif 1019 val == VBE_DISPI_ID_CFG) 1020 { 988 1021 pThis->vbe_regs[pThis->vbe_index] = val; 989 1022 } 990 if (val == VBE_DISPI_ID_VBOX_VIDEO) {991 pThis->vbe_regs[pThis->vbe_index] = val;992 } else if (val == VBE_DISPI_ID_ANYX) {993 pThis->vbe_regs[pThis->vbe_index] = val;994 }995 #ifdef VBOX_WITH_HGSMI996 else if (val == VBE_DISPI_ID_HGSMI) {997 pThis->vbe_regs[pThis->vbe_index] = val;998 }999 #endif /* VBOX_WITH_HGSMI */1000 1023 break; 1001 1024 case VBE_DISPI_INDEX_XRES: … … 1181 1204 #endif /* IN_RING3 */ 1182 1205 break; 1206 case VBE_DISPI_INDEX_CFG: 1207 pThis->vbe_regs[pThis->vbe_index] = val; 1208 break; 1183 1209 default: 1184 1210 break; … … 2753 2779 SSMR3PutU32(pSSM, pThis->bank_offset); 2754 2780 #ifdef CONFIG_BOCHS_VBE 2755 SSMR3PutU8(pSSM, 1); 2781 AssertCompile(RT_ELEMENTS(pThis->vbe_regs) < 256); 2782 SSMR3PutU8(pSSM, (uint8_t)RT_ELEMENTS(pThis->vbe_regs)); 2756 2783 SSMR3PutU16(pSSM, pThis->vbe_index); 2757 for(i = 0; i < VBE_DISPI_INDEX_NB_SAVED; i++)2784 for(i = 0; i < RT_ELEMENTS(pThis->vbe_regs); i++) 2758 2785 SSMR3PutU16(pSSM, pThis->vbe_regs[i]); 2759 2786 SSMR3PutU32(pSSM, pThis->vbe_start_addr); … … 2801 2828 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 2802 2829 } 2830 2831 if (u8 == 1) 2832 u8 = VBE_DISPI_INDEX_NB_SAVED; /* Used to save so many registers. */ 2833 if (u8 > RT_ELEMENTS(pThis->vbe_regs)) 2834 { 2835 Log(("vga_load: saved %d, expected %d!!\n", u8, RT_ELEMENTS(pThis->vbe_regs))); 2836 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 2837 } 2838 2803 2839 SSMR3GetU16(pSSM, &pThis->vbe_index); 2804 for(i = 0; i < VBE_DISPI_INDEX_NB_SAVED; i++)2840 for(i = 0; i < (int)u8; i++) 2805 2841 SSMR3GetU16(pSSM, &pThis->vbe_regs[i]); 2806 2842 if (version_id <= VGA_SAVEDSTATE_VERSION_INV_VHEIGHT) … … 3005 3041 Assert(PDMCritSectIsOwner(pDevIns->CTX_SUFF(pCritSectRo))); 3006 3042 3007 3008 3043 #ifdef VBE_BYTEWISE_IO 3009 3044 if (cb == 1) … … 3027 3062 if (cb == 4) 3028 3063 { 3029 /* Quick hack for getting the vram size. */ 3030 *pu32 = pThis->vram_size; 3064 if (pThis->vbe_regs[VBE_DISPI_INDEX_ID] == VBE_DISPI_ID_CFG) 3065 *pu32 = vbe_ioport_read_data(pThis, Port); /* New interface. */ 3066 else 3067 *pu32 = pThis->vram_size; /* Quick hack for getting the vram size. */ 3031 3068 return VINF_SUCCESS; 3032 3069 } … … 6175 6212 #endif 6176 6213 "SuppressNewYearSplash\0" 6214 "3DEnabled\0" 6177 6215 )) 6178 6216 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, … … 6203 6241 AssertLogRelRCReturn(rc, rc); 6204 6242 Log(("VGA: VRamSize=%#x fGCenabled=%RTbool fR0Enabled=%RTbool\n", pThis->vram_size, pThis->fGCEnabled, pThis->fR0Enabled)); 6243 6244 rc = CFGMR3QueryBoolDef(pCfg, "3DEnabled", &pThis->f3DEnabled, false); 6245 AssertLogRelRCReturn(rc, rc); 6205 6246 6206 6247 #ifdef VBOX_WITH_VMSVGA -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r70596 r71146 79 79 80 80 /* Cross reference with <VBoxVideoVBE.h> */ 81 #define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */82 #define VBE_DISPI_INDEX_NB 0x c/* Total number of VBE registers */81 #define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */ 82 #define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */ 83 83 84 84 #define VGA_STATE_COMMON_BOCHS_VBE \ 85 85 uint16_t vbe_index; \ 86 86 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \ 87 uint16_t alignment[ 3]; /* pad to 64 bits */ \87 uint16_t alignment[2]; /* pad to 64 bits */ \ 88 88 uint32_t vbe_start_addr; \ 89 89 uint32_t vbe_line_offset; \ … … 338 338 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */ 339 339 bool fRenderVRAM; 340 /** Whether 3D is enabled for the VM. */ 341 bool f3DEnabled; 340 342 # ifdef VBOX_WITH_VMSVGA 341 343 /* Whether the SVGA emulation is enabled or not. */ 342 344 bool fVMSVGAEnabled; 345 bool Padding4[0+4]; 346 # else 343 347 bool Padding4[1+4]; 344 # else345 bool Padding4[2+4];346 348 # endif 347 349 -
trunk/src/VBox/Main/src-client/ConsoleImpl2.cpp
r71108 r71146 3720 3720 NOREF(fHMEnabled); 3721 3721 #endif 3722 BOOL f3DEnabled; 3723 hrc = ptrMachine->COMGETTER(Accelerate3DEnabled)(&f3DEnabled); H(); 3724 InsertConfigInteger(pCfg, "3DEnabled", f3DEnabled); 3722 3725 3723 3726 i_attachStatusDriver(pInst, &mapCrOglLed, 0, 0, NULL, NULL, 0); … … 3739 3742 pFramebuffer->Release(); 3740 3743 } 3741 BOOL f3DEnabled;3742 hrc = ptrMachine->COMGETTER(Accelerate3DEnabled)(&f3DEnabled); H();3743 3744 InsertConfigInteger(pCfg, "VMSVGA3dEnabled", f3DEnabled); 3744 3745 #else
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