VirtualBox

Changeset 7180 in vbox for trunk/src/VBox/Runtime/testcase


Ignore:
Timestamp:
Feb 27, 2008 4:45:11 PM (17 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
28476
Message:

Added ASMAtomicAddU32 and ASMAtomicAddS32. Extended the inline benchmark a bit.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Runtime/testcase/tstInlineAsm.cpp

    r6777 r7180  
    118118{
    119119    unsigned    iBit;
    120     struct 
     120    struct
    121121    {
    122122        uint32_t    uEBX, uEAX, uEDX, uECX;
     
    733733    CHECKOP(ASMAtomicReadU64(&u64), 0xfedcba0987654321ULL, "%#llx", uint64_t);
    734734    CHECKVAL(u64, 0xfedcba0987654321ULL, "%#llx");
     735}
     736
     737
     738static void tstASMAtomicAddS32(void)
     739{
     740    int32_t i32Rc;
     741    int32_t i32 = 10;
     742#define MYCHECK(op, rc, val) \
     743    do { \
     744        i32Rc = op; \
     745        if (i32Rc != (rc)) \
     746        { \
     747            RTPrintf("%s, %d: FAILURE: %s -> %d expected %d\n", __FUNCTION__, __LINE__, #op, i32Rc, rc); \
     748            g_cErrors++; \
     749        } \
     750        if (i32 != (val)) \
     751        { \
     752            RTPrintf("%s, %d: FAILURE: %s => i32=%d expected %d\n", __FUNCTION__, __LINE__, #op, i32, val); \
     753            g_cErrors++; \
     754        } \
     755    } while (0)
     756    MYCHECK(ASMAtomicAddS32(&i32, 1),               10,             11);
     757    MYCHECK(ASMAtomicAddS32(&i32, -2),              11,             9);
     758    MYCHECK(ASMAtomicAddS32(&i32, -9),              9,              0);
     759    MYCHECK(ASMAtomicAddS32(&i32, -0x7fffffff),     0,              -0x7fffffff);
     760    MYCHECK(ASMAtomicAddS32(&i32, 0),               -0x7fffffff,    -0x7fffffff);
     761    MYCHECK(ASMAtomicAddS32(&i32, 0x7fffffff),      -0x7fffffff,    0);
     762    MYCHECK(ASMAtomicAddS32(&i32, 0),               0,              0);
     763#undef MYCHECK
    735764}
    736765
     
    776805    MYCHECK(ASMAtomicIncS32(&i32), 3);
    777806#undef MYCHECK
    778 
    779807}
    780808
     
    924952 * Make this static. We don't want to have this located on the stack.
    925953 */
    926 static volatile uint32_t g_u32;
    927 
    928 #define BENCH(ins, str)  \
    929     RTThreadYield(); \
    930     u64Start = ASMReadTSC(); \
    931     for (i = cRounds; i > 0; i--) \
    932         ins; \
    933     u64Stop = ASMReadTSC(); \
    934     RTPrintf(" %-10s %3llu cycles\n", str, (u64Stop - u64Start) / cRounds);
    935 
    936 void tstASMBench()
    937 {
     954void tstASMBench(void)
     955{
     956    static uint8_t  volatile s_u8;
     957    static int8_t   volatile s_i8;
     958    static uint16_t volatile s_u16;
     959    static int16_t  volatile s_i16;
     960    static uint32_t volatile s_u32;
     961    static int32_t  volatile s_i32;
     962    static uint64_t volatile s_u64;
     963    static int64_t  volatile s_i64;
    938964    register unsigned i;
    939965    const unsigned cRounds = 1000000;
    940     register uint64_t u64Start, u64Stop;
    941 
    942     RTPrintf("Benchmarking some low-level instructions:\n");
    943 
    944     BENCH(g_u32 = 0,                         "mov:");
    945     BENCH(ASMAtomicXchgU32(&g_u32, 0),       "xchg:");
    946     BENCH(ASMAtomicCmpXchgU32(&g_u32, 0, 0), "cmpxchg:");
     966    register uint64_t u64Elapsed;
     967
     968    RTPrintf("tstInlineASM: Benchmarking:\n");
     969
     970#define BENCH(op, str)  \
     971        RTThreadYield(); \
     972        u64Elapsed = ASMReadTSC(); \
     973        for (i = cRounds; i > 0; i--) \
     974            op; \
     975        u64Elapsed = ASMReadTSC() - u64Elapsed; \
     976        RTPrintf(" %-30s %3llu cycles\n", str, u64Elapsed / cRounds);
     977
     978    BENCH(s_u32 = 0,                            "s_u32 = 0:");
     979    BENCH(ASMAtomicUoWriteU8(&s_u8, 0),         "ASMAtomicUoWriteU8:");
     980    BENCH(ASMAtomicUoWriteS8(&s_i8, 0),         "ASMAtomicUoWriteS8:");
     981    BENCH(ASMAtomicUoWriteU16(&s_u16, 0),       "ASMAtomicUoWriteU16:");
     982    BENCH(ASMAtomicUoWriteS16(&s_i16, 0),       "ASMAtomicUoWriteS16:");
     983    BENCH(ASMAtomicUoWriteU32(&s_u32, 0),       "ASMAtomicUoWriteU32:");
     984    BENCH(ASMAtomicUoWriteS32(&s_i32, 0),       "ASMAtomicUoWriteS32:");
     985    BENCH(ASMAtomicUoWriteU64(&s_u64, 0),       "ASMAtomicUoWriteU64:");
     986    BENCH(ASMAtomicUoWriteS64(&s_i64, 0),       "ASMAtomicUoWriteS64:");
     987    BENCH(ASMAtomicWriteU8(&s_u8, 0),           "ASMAtomicWriteU8:");
     988    BENCH(ASMAtomicWriteS8(&s_i8, 0),           "ASMAtomicWriteS8:");
     989    BENCH(ASMAtomicWriteU16(&s_u16, 0),         "ASMAtomicWriteU16:");
     990    BENCH(ASMAtomicWriteS16(&s_i16, 0),         "ASMAtomicWriteS16:");
     991    BENCH(ASMAtomicWriteU32(&s_u32, 0),         "ASMAtomicWriteU32:");
     992    BENCH(ASMAtomicWriteS32(&s_i32, 0),         "ASMAtomicWriteS32:");
     993    BENCH(ASMAtomicWriteU64(&s_u64, 0),         "ASMAtomicWriteU64:");
     994    BENCH(ASMAtomicWriteS64(&s_i64, 0),         "ASMAtomicWriteS64:");
     995    BENCH(ASMAtomicXchgU8(&s_u8, 0),            "ASMAtomicXchgU8:");
     996    BENCH(ASMAtomicXchgS8(&s_i8, 0),            "ASMAtomicXchgS8:");
     997    BENCH(ASMAtomicXchgU16(&s_u16, 0),          "ASMAtomicXchgU16:");
     998    BENCH(ASMAtomicXchgS16(&s_i16, 0),          "ASMAtomicXchgS16:");
     999    BENCH(ASMAtomicXchgU32(&s_u32, 0),          "ASMAtomicXchgU32:");
     1000    BENCH(ASMAtomicXchgS32(&s_i32, 0),          "ASMAtomicXchgS32:");
     1001    BENCH(ASMAtomicXchgU64(&s_u64, 0),          "ASMAtomicXchgU64:");
     1002    BENCH(ASMAtomicXchgS64(&s_i64, 0),          "ASMAtomicXchgS64:");
     1003    BENCH(ASMAtomicCmpXchgU32(&s_u32, 0, 0),    "ASMAtomicCmpXchgU32:");
     1004    BENCH(ASMAtomicCmpXchgS32(&s_i32, 0, 0),    "ASMAtomicCmpXchgS32:");
     1005    BENCH(ASMAtomicCmpXchgU64(&s_u64, 0, 0),    "ASMAtomicCmpXchgU64:");
     1006    BENCH(ASMAtomicCmpXchgS64(&s_i64, 0, 0),    "ASMAtomicCmpXchgS64:");
     1007    BENCH(ASMAtomicCmpXchgU32(&s_u32, 0, 1),    "ASMAtomicCmpXchgU32/neg:");
     1008    BENCH(ASMAtomicCmpXchgS32(&s_i32, 0, 1),    "ASMAtomicCmpXchgS32/neg:");
     1009    BENCH(ASMAtomicCmpXchgU64(&s_u64, 0, 1),    "ASMAtomicCmpXchgU64/neg:");
     1010    BENCH(ASMAtomicCmpXchgS64(&s_i64, 0, 1),    "ASMAtomicCmpXchgS64/neg:");
     1011    BENCH(ASMAtomicIncU32(&s_u32),              "ASMAtomicIncU32:");
     1012    BENCH(ASMAtomicIncS32(&s_i32),              "ASMAtomicIncS32:");
     1013    BENCH(ASMAtomicDecU32(&s_u32),              "ASMAtomicDecU32:");
     1014    BENCH(ASMAtomicDecS32(&s_i32),              "ASMAtomicDecS32:");
     1015    BENCH(ASMAtomicAddU32(&s_u32, 5),           "ASMAtomicAddU32:");
     1016    BENCH(ASMAtomicAddS32(&s_i32, 5),           "ASMAtomicAddS32:");
    9471017
    9481018    RTPrintf("Done.\n");
     1019
     1020#undef BENCH
    9491021}
    9501022
     
    9741046    tstASMAtomicCmpXchgExU64();
    9751047    tstASMAtomicReadU64();
     1048    tstASMAtomicAddS32();
    9761049    tstASMAtomicDecIncS32();
    9771050    tstASMAtomicAndOrU32();
    9781051    tstASMMemZeroPage();
    9791052    tstASMMath();
     1053
    9801054    tstASMBench();
    9811055
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette