Changeset 72422 in vbox for trunk/src/VBox

Timestamp:

Jun 4, 2018 7:43:44 AM (7 years ago)

Author:

vboxsync

Message:

VMM/APIC: Space.

File:

• trunk/src/VBox/VMM/VMMAll/APICAll.cpp (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/APICAll.cpp

@@ -218 +218 @@
     } const s_aAccess[] =
     {
-        /* enmAccess  pszBefore                        pszAfter                       rcRZ */
-        /* 0 */     { "read MSR",                      " while not in x2APIC mode",   VINF_CPUM_R3_MSR_READ  },
-        /* 1 */     { "write MSR",                     " while not in x2APIC mode",   VINF_CPUM_R3_MSR_WRITE },
-        /* 2 */     { "read reserved/unknown MSR",     "",                            VINF_CPUM_R3_MSR_READ  },
-        /* 3 */     { "write reserved/unknown MSR",    "",                            VINF_CPUM_R3_MSR_WRITE },
-        /* 4 */     { "read write-only MSR",           "",                            VINF_CPUM_R3_MSR_READ  },
-        /* 5 */     { "write read-only MSR",           "",                            VINF_CPUM_R3_MSR_WRITE },
-        /* 6 */     { "read reserved bits of MSR",     "",                            VINF_CPUM_R3_MSR_READ  },
-        /* 7 */     { "write reserved bits of MSR",    "",                            VINF_CPUM_R3_MSR_WRITE },
-        /* 8 */     { "write an invalid value to MSR", "",                            VINF_CPUM_R3_MSR_WRITE },
-        /* 9 */     { "write MSR",                     "disallowed by configuration", VINF_CPUM_R3_MSR_WRITE },
-        /* 10 */    { "read MSR",                      "disallowed by configuration", VINF_CPUM_R3_MSR_READ }
+        /* enmAccess  pszBefore                        pszAfter                        rcRZ */
+        /* 0 */     { "read MSR",                      " while not in x2APIC mode",    VINF_CPUM_R3_MSR_READ  },
+        /* 1 */     { "write MSR",                     " while not in x2APIC mode",    VINF_CPUM_R3_MSR_WRITE },
+        /* 2 */     { "read reserved/unknown MSR",     "",                             VINF_CPUM_R3_MSR_READ  },
+        /* 3 */     { "write reserved/unknown MSR",    "",                             VINF_CPUM_R3_MSR_WRITE },
+        /* 4 */     { "read write-only MSR",           "",                             VINF_CPUM_R3_MSR_READ  },
+        /* 5 */     { "write read-only MSR",           "",                             VINF_CPUM_R3_MSR_WRITE },
+        /* 6 */     { "read reserved bits of MSR",     "",                             VINF_CPUM_R3_MSR_READ  },
+        /* 7 */     { "write reserved bits of MSR",    "",                             VINF_CPUM_R3_MSR_WRITE },
+        /* 8 */     { "write an invalid value to MSR", "",                             VINF_CPUM_R3_MSR_WRITE },
+        /* 9 */     { "write MSR",                     " disallowed by configuration", VINF_CPUM_R3_MSR_WRITE },
+        /* 10 */    { "read MSR",                      " disallowed by configuration", VINF_CPUM_R3_MSR_READ }
     };
     AssertCompile(RT_ELEMENTS(s_aAccess) == APICMSRACCESS_COUNT);