Changeset 72488 in vbox
- Timestamp:
- Jun 9, 2018 12:24:35 PM (7 years ago)
- Location:
- trunk
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/cpum.h
r72358 r72488 1259 1259 /** @} */ 1260 1260 1261 /** @name Externalized State Helpers. 1262 * @{ */ 1263 /** @def CPUM_ASSERT_NOT_EXTRN 1264 * Macro for asserting that @a a_fNotExtrn are present. 1265 * 1266 * @param a_pVCpu The cross context virtual CPU structure of the calling EMT. 1267 * @param a_fNotExtrn Mask of CPUMCTX_EXTRN_XXX bits to check. 1268 * 1269 * @remarks Requires VMCPU_INCL_CPUM_GST_CTX to be defined. 1270 */ 1271 #define CPUM_ASSERT_NOT_EXTRN(a_pVCpu, a_fNotExtrn) \ 1272 AssertMsg(!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fNotExtrn)), \ 1273 ("%#RX64; a_fNotExtrn=%#RX64\n", (a_pVCpu)->cpum.GstCtx.fExtrn, (a_fNotExtrn))) 1274 1275 /** @def CPUM_IMPORT_EXTRN_RET 1276 * Macro for making sure the state specified by @a fExtrnImport is present, 1277 * calling CPUMImportGuestStateOnDemand() to get it if necessary. 1278 * 1279 * Will return if CPUMImportGuestStateOnDemand() fails. 1280 * 1281 * @param a_pVCpu The cross context virtual CPU structure of the calling EMT. 1282 * @param a_fExtrnImport Mask of CPUMCTX_EXTRN_XXX bits to get. 1283 * @thread EMT(a_pVCpu) 1284 * 1285 * @remarks Requires VMCPU_INCL_CPUM_GST_CTX to be defined. 1286 */ 1287 #define CPUM_IMPORT_EXTRN_RET(a_pVCpu, a_fExtrnImport) \ 1288 do { \ 1289 if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \ 1290 { /* already present, consider this likely */ } \ 1291 else \ 1292 { \ 1293 int rcCpumImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \ 1294 AssertRCReturn(rcCpumImport, rcCpumImport); \ 1295 } \ 1296 } while (0) 1297 1298 /** @def CPUM_IMPORT_EXTRN_RC 1299 * Macro for making sure the state specified by @a fExtrnImport is present, 1300 * calling CPUMImportGuestStateOnDemand() to get it if necessary. 1301 * 1302 * Will update a_rcStrict if CPUMImportGuestStateOnDemand() fails. 1303 * 1304 * @param a_pVCpu The cross context virtual CPU structure of the calling EMT. 1305 * @param a_fExtrnImport Mask of CPUMCTX_EXTRN_XXX bits to get. 1306 * @param a_rcStrict Strict status code variable to update on failure. 1307 * @thread EMT(a_pVCpu) 1308 * 1309 * @remarks Requires VMCPU_INCL_CPUM_GST_CTX to be defined. 1310 */ 1311 #define CPUM_IMPORT_EXTRN_RCSTRICT(a_pVCpu, a_fExtrnImport, a_rcStrict) \ 1312 do { \ 1313 if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \ 1314 { /* already present, consider this likely */ } \ 1315 else \ 1316 { \ 1317 int rcCpumImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \ 1318 AssertStmt(RT_SUCCESS(rcCpumImport) || RT_FAILURE_NP(a_rcStrict), a_rcStrict = rcCpumImport); \ 1319 } \ 1320 } while (0) 1321 1322 VMM_INT_DECL(int) CPUMImportGuestStateOnDemand(PVMCPU pVCpu, uint64_t fExtrnImport); 1323 /** @} */ 1324 1261 1325 #ifndef IPRT_WITHOUT_NAMED_UNIONS_AND_STRUCTS 1262 1326 -
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r72484 r72488 28 28 #include <VBox/vmm/mm.h> 29 29 #include <VBox/vmm/em.h> 30 #ifndef IN_RC 31 # include <VBox/vmm/nem.h> 32 # include <VBox/vmm/hm.h> 33 #endif 30 34 #if defined(VBOX_WITH_RAW_MODE) && !defined(IN_RING0) 31 35 # include <VBox/vmm/selm.h> … … 42 46 #include <iprt/asm-amd64-x86.h> 43 47 #ifdef IN_RING3 44 # include <iprt/thread.h>48 # include <iprt/thread.h> 45 49 #endif 46 50 … … 973 977 VMMDECL(uint64_t) CPUMGetGuestCR0(PVMCPU pVCpu) 974 978 { 979 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_CR0)); 975 980 return pVCpu->cpum.s.Guest.cr0; 976 981 } … … 979 984 VMMDECL(uint64_t) CPUMGetGuestCR2(PVMCPU pVCpu) 980 985 { 986 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_CR2)); 981 987 return pVCpu->cpum.s.Guest.cr2; 982 988 } … … 985 991 VMMDECL(uint64_t) CPUMGetGuestCR3(PVMCPU pVCpu) 986 992 { 993 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_CR3)); 987 994 return pVCpu->cpum.s.Guest.cr3; 988 995 } … … 991 998 VMMDECL(uint64_t) CPUMGetGuestCR4(PVMCPU pVCpu) 992 999 { 1000 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_CR4)); 993 1001 return pVCpu->cpum.s.Guest.cr4; 994 1002 } … … 1013 1021 VMMDECL(uint32_t) CPUMGetGuestEIP(PVMCPU pVCpu) 1014 1022 { 1023 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_RIP)); 1015 1024 return pVCpu->cpum.s.Guest.eip; 1016 1025 } … … 1019 1028 VMMDECL(uint64_t) CPUMGetGuestRIP(PVMCPU pVCpu) 1020 1029 { 1030 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_RIP)); 1021 1031 return pVCpu->cpum.s.Guest.rip; 1022 1032 } … … 2771 2781 } 2772 2782 2783 2784 /** 2785 * Used to dynamically imports state residing in NEM or HM. 2786 * 2787 * This is a worker for the CPUM_IMPORT_EXTRN_RET() macro and various IEM ones. 2788 * 2789 * @returns VBox status code. 2790 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2791 * @param fExtrnImport The fields to import. 2792 * @thread EMT(pVCpu) 2793 */ 2794 VMM_INT_DECL(int) CPUMImportGuestStateOnDemand(PVMCPU pVCpu, uint64_t fExtrnImport) 2795 { 2796 VMCPU_ASSERT_EMT(pVCpu); 2797 if (pVCpu->cpum.s.Guest.fExtrn & fExtrnImport) 2798 { 2799 #ifndef IN_RC 2800 switch (pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_KEEPER_MASK) 2801 { 2802 case CPUMCTX_EXTRN_KEEPER_NEM: 2803 { 2804 int rc = NEMImportStateOnDemand(pVCpu, &pVCpu->cpum.s.Guest, fExtrnImport); 2805 Assert(rc == VINF_SUCCESS || RT_FAILURE_NP(rc)); 2806 return rc; 2807 } 2808 2809 case CPUMCTX_EXTRN_KEEPER_HM: /** @todo make HM use CPUMCTX_EXTRN_XXX. */ 2810 default: 2811 AssertLogRelMsgFailedReturn(("%#RX64 vs %#RX64\n", pVCpu->cpum.s.Guest.fExtrn, fExtrnImport), VERR_CPUM_IPE_2); 2812 } 2813 #else 2814 AssertLogRelMsgFailedReturn(("%#RX64 vs %#RX64\n", pVCpu->cpum.s.Guest.fExtrn, fExtrnImport), VERR_CPUM_IPE_2); 2815 #endif 2816 } 2817 return VINF_SUCCESS; 2818 } 2819 -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r72484 r72488 13894 13894 #endif /* IEM_WITH_SETJMP */ 13895 13895 13896 13897 /**13898 * Used to dynamically imports state residing in NEM or HM.13899 *13900 * @returns VBox status code.13901 * @param pVCpu The cross context virtual CPU structure of the calling thread.13902 * @param pCtx The CPU context structure.13903 * @param fExtrnImport The fields to import.13904 */13905 int iemCtxImport(PVMCPU pVCpu, PCPUMCTX pCtx, uint64_t fExtrnImport)13906 {13907 switch (pCtx->fExtrn & CPUMCTX_EXTRN_KEEPER_MASK)13908 {13909 #ifndef IN_RC13910 case CPUMCTX_EXTRN_KEEPER_NEM:13911 {13912 int rc = NEMImportStateOnDemand(pVCpu, pCtx, fExtrnImport);13913 Assert(rc == VINF_SUCCESS || RT_FAILURE_NP(rc));13914 return rc;13915 }13916 13917 case CPUMCTX_EXTRN_KEEPER_HM: /** @todo make HM use CPUMCTX_EXTRN_XXX. */13918 #endif13919 13920 default:13921 AssertLogRelMsgFailed(("%RX64\n", fExtrnImport));13922 #ifdef IN_RC13923 RT_NOREF_PV(pVCpu); RT_NOREF_PV(fExtrnImport);13924 #endif13925 return VERR_IEM_IPE_9;13926 }13927 }13928 13929 13930 13896 /** @} */ 13931 13897 -
trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h
r72484 r72488 1039 1039 /* Almost done, just update extrn flags and maybe change PGM mode. */ 1040 1040 pCtx->fExtrn &= ~fWhat; 1041 if (!(pCtx->fExtrn & (CPUMCTX_EXTRN_ALL | (CPUMCTX_EXTRN_NEM_WIN_MASK & ~CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT)))) 1042 pCtx->fExtrn = 0; 1041 1043 1042 1044 /* Typical. */ … … 1050 1052 { 1051 1053 int rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER); 1052 AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); 1054 AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc); 1053 1055 } 1054 1056 … … 1056 1058 { 1057 1059 int rc = PGMFlushTLB(pVCpu, pCtx->cr3, fFlushGlobalTlb); 1058 AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); 1060 AssertMsg(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc)); NOREF(rc); 1059 1061 } 1060 1062 … … 1238 1240 1239 1241 1240 #ifdef LOG_ENABLED1241 1242 /** Macro used by nemHCWinExecStateToLogStr and nemR3WinExecStateToLogStr. */ 1242 # 1243 #define SWITCH_IT(a_szPrefix) \ 1243 1244 do \ 1244 1245 switch (u)\ … … 1256 1257 while (0) 1257 1258 1258 # 1259 #ifdef NEM_WIN_USE_OUR_OWN_RUN_API 1259 1260 /** 1260 1261 * Translates the execution stat bitfield into a short log string, VID version. … … 1275 1276 SWITCH_IT("RM"); 1276 1277 } 1277 # 1278 #elif defined(IN_RING3) 1278 1279 /** 1279 1280 * Translates the execution stat bitfield into a short log string, WinHv version. … … 1294 1295 SWITCH_IT("RM"); 1295 1296 } 1296 # endif /* IN_RING3 && !NEM_WIN_USE_OUR_OWN_RUN_API */ 1297 # undef SWITCH_IT 1298 #endif /* LOG_ENABLED */ 1297 #endif /* IN_RING3 && !NEM_WIN_USE_OUR_OWN_RUN_API */ 1298 #undef SWITCH_IT 1299 1299 1300 1300 … … 2802 2802 nemR3WinCopyStateFromExceptionMessage(pVCpu, pExit, pCtx, true /*fClearXcpt*/); 2803 2803 uint64_t fWhat = NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM; 2804 if (p Msg->ExceptionVector== X86_XCPT_DB)2804 if (pExit->VpException.ExceptionType == X86_XCPT_DB) 2805 2805 fWhat |= CPUMCTX_EXTRN_DR0_DR3 | CPUMCTX_EXTRN_DR7 | CPUMCTX_EXTRN_DR6; 2806 2806 VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NULL, pCtx, fWhat, "Xcpt"); … … 3670 3670 /* 3671 3671 * If the CPU is running, make sure to stop it before we try sync back the 3672 * state and return to EM. 3672 * state and return to EM. We don't sync back the whole state if we can help it. 3673 3673 */ 3674 3674 # ifdef NEM_WIN_USE_OUR_OWN_RUN_API … … 3685 3685 if (pCtx->fExtrn & (CPUMCTX_EXTRN_ALL | (CPUMCTX_EXTRN_NEM_WIN_MASK & ~CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT))) 3686 3686 { 3687 # ifdef IN_RING0 3688 int rc2 = nemR0WinImportState(pGVM, pGVCpu, pCtx, CPUMCTX_EXTRN_ALL | CPUMCTX_EXTRN_NEM_WIN_MASK); 3689 if (RT_SUCCESS(rc2)) 3690 pCtx->fExtrn = 0; 3691 else if (rc2 == VERR_NEM_CHANGE_PGM_MODE || rc2 == VERR_NEM_FLUSH_TLB || rc2 == VERR_NEM_UPDATE_APIC_BASE) 3692 { 3693 pCtx->fExtrn = 0; 3694 if (rcStrict == VINF_SUCCESS || rcStrict == -rc2) 3695 rcStrict = -rc2; 3696 else 3687 /* Try anticipate what we might need. */ 3688 uint64_t fImport = IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI; 3689 if ( (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) 3690 || RT_FAILURE(rcStrict)) 3691 fImport = CPUMCTX_EXTRN_ALL | (CPUMCTX_EXTRN_NEM_WIN_MASK & ~CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT); 3692 else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_INTERRUPT_APIC 3693 | VMCPU_FF_INTERRUPT_NMI | VMCPU_FF_INTERRUPT_SMI)) 3694 fImport |= IEM_CPUMCTX_EXTRN_XCPT_MASK; 3695 if (pCtx->fExtrn & fImport) 3696 { 3697 #ifdef IN_RING0 3698 int rc2 = nemR0WinImportState(pGVM, pGVCpu, pCtx, fImport | CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT); 3699 if (RT_SUCCESS(rc2)) 3700 pCtx->fExtrn &= ~fImport; 3701 else if (rc2 == VERR_NEM_CHANGE_PGM_MODE || rc2 == VERR_NEM_FLUSH_TLB || rc2 == VERR_NEM_UPDATE_APIC_BASE) 3697 3702 { 3698 pVCpu->nem.s.rcPending = -rc2; 3699 LogFlow(("NEM/%u: rcPending=%Rrc (rcStrict=%Rrc)\n", pVCpu->idCpu, rc2, VBOXSTRICTRC_VAL(rcStrict) )); 3703 pCtx->fExtrn &= ~fImport; 3704 if (rcStrict == VINF_SUCCESS || rcStrict == -rc2) 3705 rcStrict = -rc2; 3706 else 3707 { 3708 pVCpu->nem.s.rcPending = -rc2; 3709 LogFlow(("NEM/%u: rcPending=%Rrc (rcStrict=%Rrc)\n", pVCpu->idCpu, rc2, VBOXSTRICTRC_VAL(rcStrict) )); 3710 } 3700 3711 } 3701 }3702 3712 # else 3703 int rc2 = nemHCWinCopyStateFromHyperV(pVM, pVCpu, pCtx, CPUMCTX_EXTRN_ALL | CPUMCTX_EXTRN_NEM_WIN_MASK);3704 if (RT_SUCCESS(rc2))3705 pCtx->fExtrn = 0;3713 int rc2 = nemHCWinCopyStateFromHyperV(pVM, pVCpu, pCtx, fImport | CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT); 3714 if (RT_SUCCESS(rc2)) 3715 pCtx->fExtrn &= ~fImport; 3706 3716 # endif 3707 else if (RT_SUCCESS(rcStrict)) 3708 rcStrict = rc2; 3717 else if (RT_SUCCESS(rcStrict)) 3718 rcStrict = rc2; 3719 if (!(pCtx->fExtrn & (CPUMCTX_EXTRN_ALL | (CPUMCTX_EXTRN_NEM_WIN_MASK & ~CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT)))) 3720 pCtx->fExtrn = 0; 3721 STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatImportOnReturn); 3722 } 3723 else 3724 { 3725 STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatImportOnReturnSkipped); 3726 //pCtx->fExtrn &= ~CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT; 3727 } 3709 3728 } 3710 3729 else 3730 { 3731 STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatImportOnReturnSkipped); 3711 3732 pCtx->fExtrn = 0; 3733 } 3712 3734 3713 3735 LogFlow(("NEM/%u: %04x:%08RX64 efl=%#08RX64 => %Rrc\n", -
trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp
r72484 r72488 2135 2135 /* Almost done, just update extrn flags and maybe change PGM mode. */ 2136 2136 pCtx->fExtrn &= ~fWhat; 2137 if (!(pCtx->fExtrn & (CPUMCTX_EXTRN_ALL | (CPUMCTX_EXTRN_NEM_WIN_MASK & ~CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT)))) 2138 pCtx->fExtrn = 0; 2137 2139 2138 2140 /* Typical. */ -
trunk/src/VBox/VMM/VMMR3/EM.cpp
r72461 r72488 37 37 *********************************************************************************************************************************/ 38 38 #define LOG_GROUP LOG_GROUP_EM 39 #define VMCPU_INCL_CPUM_GST_CTX /* for CPUM_IMPORT_GUEST_STATE_RET */ 39 40 #include <VBox/vmm/em.h> 40 41 #include <VBox/vmm/vmm.h> … … 95 96 #endif 96 97 static int emR3RemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone); 97 int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, int rc);98 98 99 99 … … 1198 1198 fInREMState = emR3RemExecuteSyncBack(pVM, pVCpu); 1199 1199 #endif 1200 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);1200 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc)); 1201 1201 } 1202 1202 … … 1610 1610 * Executes all high priority post execution force actions. 1611 1611 * 1612 * @returns rc or a fatal status code. 1612 * @returns Strict VBox status code. Typically @a rc, but may be upgraded to 1613 * fatal error status code. 1613 1614 * 1614 1615 * @param pVM The cross context VM structure. 1615 1616 * @param pVCpu The cross context virtual CPU structure. 1616 * @param rc The current rc.1617 * @param rc The current strict VBox status code rc. 1617 1618 */ 1618 int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, intrc)1619 VBOXSTRICTRC emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc) 1619 1620 { 1620 1621 VBOXVMM_EM_FF_HIGH(pVCpu, pVM->fGlobalForcedActions, pVCpu->fLocalForcedActions, rc); … … 1626 1627 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3)) 1627 1628 { 1629 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER, rc); 1628 1630 int rc2 = PGMUpdateCR3(pVCpu, CPUMGetGuestCR3(pVCpu)); 1629 1631 if (RT_FAILURE(rc2)) … … 1635 1637 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES)) 1636 1638 { 1639 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER, rc); 1637 1640 if (CPUMIsGuestInPAEMode(pVCpu)) 1638 1641 { … … 1649 1652 /* IEM has pending work (typically memory write after INS instruction). */ 1650 1653 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_IEM)) 1651 rc = VBOXSTRICTRC_TODO(IEMR3ProcessForceFlag(pVM, pVCpu, rc));1654 rc = IEMR3ProcessForceFlag(pVM, pVCpu, rc); 1652 1655 1653 1656 /* IOM has pending work (comitting an I/O or MMIO write). */ 1654 1657 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_IOM)) 1655 rc = VBOXSTRICTRC_TODO(IOMR3ProcessForceFlag(pVM, pVCpu, rc));1658 rc = IOMR3ProcessForceFlag(pVM, pVCpu, rc); 1656 1659 1657 1660 #ifdef VBOX_WITH_RAW_MODE … … 1829 1832 if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS)) 1830 1833 { 1834 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 1831 1835 rc2 = VMMR3EmtRendezvousFF(pVM, pVCpu); 1832 1836 UPDATE_RC(); … … 1876 1880 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_DBGF) ) 1877 1881 { 1882 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 1878 1883 rc2 = DBGFR3VMMForcedAction(pVM, pVCpu); 1879 1884 UPDATE_RC(); … … 1885 1890 if (VM_FF_TEST_AND_CLEAR(pVM, VM_FF_RESET)) 1886 1891 { 1892 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 1887 1893 rc2 = VBOXSTRICTRC_TODO(VMR3ResetFF(pVM)); 1888 1894 UPDATE_RC(); … … 1896 1902 && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE)) 1897 1903 { 1898 PCPUMCTX pCtx = pVCpu->em.s.pCtx;1899 1900 1904 /** @todo check for 16 or 32 bits code! (D bit in the code selector) */ 1901 1905 Log(("Forced action VMCPU_FF_CSAM_SCAN_PAGE\n")); 1902 1906 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 1907 PCPUMCTX pCtx = pVCpu->em.s.pCtx; 1903 1908 CSAMR3CheckCodeEx(pVM, pCtx, pCtx->eip); 1904 1909 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE); … … 1945 1950 if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS)) 1946 1951 { 1952 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 1947 1953 rc2 = VMMR3EmtRendezvousFF(pVM, pVCpu); 1948 1954 UPDATE_RC(); … … 1965 1971 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_REQUEST, VM_FF_PGM_NO_MEMORY)) 1966 1972 { 1973 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 1967 1974 rc2 = VMR3ReqProcessU(pVM->pUVM, VMCPUID_ANY, false /*fPriorityOnly*/); 1968 1975 if (rc2 == VINF_EM_OFF || rc2 == VINF_EM_TERMINATE) /** @todo this shouldn't be necessary */ … … 2019 2026 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST)) 2020 2027 { 2028 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 2021 2029 rc2 = VMR3ReqProcessU(pVM->pUVM, pVCpu->idCpu, false /*fPriorityOnly*/); 2022 2030 if (rc2 == VINF_EM_OFF || rc2 == VINF_EM_TERMINATE || rc2 == VINF_EM_RESET) … … 2079 2087 && !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY)) 2080 2088 { 2089 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP); 2081 2090 if (CPUMGetGuestRIP(pVCpu) != EMGetInhibitInterruptsPC(pVCpu)) 2082 2091 { … … 2108 2117 { 2109 2118 fWakeupPending = true; 2110 # ifdef VBOX_STRICT2119 # ifdef VBOX_STRICT 2111 2120 rcIrq = rc2; 2112 # endif2121 # endif 2113 2122 } 2114 2123 if (fResched) … … 2118 2127 #endif 2119 2128 { 2129 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RFLAGS); 2120 2130 if ( VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC) 2121 2131 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM … … 2130 2140 /* Note: it's important to make sure the return code from TRPMR3InjectEvent isn't ignored! */ 2131 2141 /** @todo this really isn't nice, should properly handle this */ 2142 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_XCPT_MASK); 2132 2143 rc2 = TRPMR3InjectEvent(pVM, pVCpu, TRPM_HARDWARE_INT); 2133 2144 Log(("EM: TRPMR3InjectEvent -> %d\n", rc2)); … … 2165 2176 && !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY) ) 2166 2177 { 2178 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 2167 2179 rc2 = DBGFR3VMMForcedAction(pVM, pVCpu); 2168 2180 UPDATE_RC(); … … 2175 2187 && VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS)) 2176 2188 { 2189 CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc); 2177 2190 rc2 = VMMR3EmtRendezvousFF(pVM, pVCpu); 2178 2191 UPDATE_RC(); -
trunk/src/VBox/VMM/VMMR3/EMHM.cpp
r70979 r72488 21 21 *********************************************************************************************************************************/ 22 22 #define LOG_GROUP LOG_GROUP_EM 23 #define VMCPU_INCL_CPUM_GST_CTX 23 24 #include <VBox/vmm/em.h> 24 25 #include <VBox/vmm/vmm.h> … … 129 130 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK)) 130 131 { 131 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));132 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict); 132 133 LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 133 134 } … … 468 469 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK) 469 470 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK)) 470 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);471 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc)); 471 472 472 473 /* -
trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp
r72207 r72488 21 21 *********************************************************************************************************************************/ 22 22 #define LOG_GROUP LOG_GROUP_EM 23 #define VMCPU_INCL_CPUM_GST_CTX 23 24 #include <VBox/vmm/em.h> 24 25 #include <VBox/vmm/vmm.h> … … 74 75 75 76 /** 76 * Executes instruction in HM mode if we can.77 * Executes instruction in NEM mode if we can. 77 78 * 78 79 * This is somewhat comparable to REMR3EmulateInstruction. … … 90 91 VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags) 91 92 { 92 PCPUMCTX pCtx = pVCpu->em.s.pCtx;93 Assert(pVCpu->em.s.pCtx == &pVCpu->cpum.GstCtx); 93 94 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK)); 94 95 95 if (!NEMR3CanExecuteGuest(pVM, pVCpu, pCtx))96 if (!NEMR3CanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx)) 96 97 return VINF_EM_RESCHEDULE; 97 98 98 uint64_t const uOldRip = p Ctx->rip;99 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip; 99 100 for (;;) 100 101 { … … 105 106 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK)) 106 107 { 107 VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu, pCtx);108 VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu, &pVCpu->cpum.GstCtx); 108 109 if (rcStrict != VINF_SUCCESS) 109 110 { … … 129 130 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK)) 130 131 { 131 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));132 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict); 132 133 LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 133 134 } … … 135 136 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST)) 136 137 { 137 rcStrict = emR3NemHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));138 rcStrict = emR3NemHandleRC(pVM, pVCpu, &pVCpu->cpum.GstCtx, VBOXSTRICTRC_TODO(rcStrict)); 138 139 Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 139 140 } … … 142 143 * Done? 143 144 */ 145 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP); 144 146 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED) 145 147 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE) 146 || p Ctx->rip != uOldRip)147 { 148 if (rcStrict == VINF_SUCCESS && p Ctx->rip != uOldRip)148 || pVCpu->cpum.GstCtx.rip != uOldRip) 149 { 150 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip) 149 151 rcStrict = VINF_EM_DBG_STEPPED; 150 Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pCtx->rip)); 152 Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", 153 VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip)); 154 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK); 151 155 return rcStrict; 152 156 } … … 172 176 #endif 173 177 { 174 #if def LOG_ENABLED178 #if defined(LOG_ENABLED) 175 179 PCPUMCTX pCtx = pVCpu->em.s.pCtx; 176 180 #endif … … 195 199 */ 196 200 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a); 201 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 197 202 rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); 198 203 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a); … … 203 208 #ifdef VBOX_WITH_REM 204 209 STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b); 210 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK); 205 211 EMRemLock(pVM); 206 212 /* Flush the recompiler TLB if the VCPU has changed. */ … … 216 222 #endif /* !VBOX_WITH_REM */ 217 223 } 218 219 #ifdef EM_NOTIFY_HM220 if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)221 HMR3NotifyEmulated(pVCpu);222 #endif223 224 return rc; 224 225 } … … 278 279 * Hand it over to the interpreter. 279 280 */ 281 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 280 282 VBOXSTRICTRC rcStrict = IEMExecOne(pVCpu); 281 283 LogFlow(("emR3NemExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); … … 443 445 */ 444 446 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK); 445 if ( 446 || 447 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));447 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK) 448 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK)) 449 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict); 448 450 449 451 /* … … 478 480 479 481 /* 480 * Return to outer loop. 481 */ 482 * Return to outer loop, making sure the fetch all state as we leave. 483 * 484 * Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error 485 * status over import errors. 486 */ 487 if (pCtx->fExtrn) 488 { 489 int rcImport = NEMImportStateOnDemand(pVCpu, pCtx, pCtx->fExtrn); 490 AssertReturn(RT_SUCCESS(rcImport) || RT_FAILURE_NP(rcStrict), rcImport); 491 } 482 492 #if defined(LOG_ENABLED) && defined(DEBUG) 483 493 RTLogFlush(NULL); -
trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
r69111 r72488 21 21 *********************************************************************************************************************************/ 22 22 #define LOG_GROUP LOG_GROUP_EM 23 #define VMCPU_INCL_CPUM_GST_CTX 23 24 #include <VBox/vmm/em.h> 24 25 #include <VBox/vmm/vmm.h> … … 140 141 * Deal with the return code. 141 142 */ 142 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);143 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc)); 143 144 rc = emR3RawHandleRC(pVM, pVCpu, pCtx, rc); 144 145 rc = emR3RawUpdateForceFlag(pVM, pVCpu, pCtx, rc); … … 220 221 * Deal with the return codes. 221 222 */ 222 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);223 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc)); 223 224 rc = emR3RawHandleRC(pVM, pVCpu, pCtx, rc); 224 225 rc = emR3RawUpdateForceFlag(pVM, pVCpu, pCtx, rc); … … 1426 1427 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK) 1427 1428 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK)) 1428 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);1429 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc)); 1429 1430 1430 1431 #ifdef VBOX_STRICT -
trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp
r72484 r72488 1235 1235 STAMR3RegisterF(pVM, &pNemCpu->StatBreakOnStatus, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of status code breaks", "/NEM/CPU%u/BreakOnStatus", iCpu); 1236 1236 STAMR3RegisterF(pVM, &pNemCpu->StatImportOnDemand, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of on-demand state imports", "/NEM/CPU%u/ImportOnDemand", iCpu); 1237 STAMR3RegisterF(pVM, &pNemCpu->StatImportOnReturn, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of state imports on loop return", "/NEM/CPU%u/ImportOnReturn", iCpu); 1238 STAMR3RegisterF(pVM, &pNemCpu->StatImportOnReturnSkipped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of skipped state imports on loop return", "/NEM/CPU%u/ImportOnReturnSkipped", iCpu); 1237 1239 } 1238 1240 -
trunk/src/VBox/VMM/include/EMHandleRCTmpl.h
r72208 r72488 46 46 #endif 47 47 { 48 NOREF(pCtx); 49 48 50 switch (rc) 49 51 { … … 111 113 AssertReleaseMsgFailed(("%Rrc handling is not yet implemented\n", rc)); 112 114 break; 113 #endif /* EMHANDLERC_WITH_PATM */ 114 115 #ifdef EMHANDLERC_WITH_PATM 115 116 116 /* 117 117 * Memory mapped I/O access - attempt to patch the instruction … … 166 166 */ 167 167 case VINF_PGM_CHANGE_MODE: 168 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER); 168 169 rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER); 169 170 if (rc == VINF_SUCCESS) … … 240 241 */ 241 242 case VINF_GIM_R3_HYPERCALL: 242 { 243 /* 244 * Currently hypercall instruction (vmmcall) emulation is compiled and 245 * implemented only when nested hw. virt feature is enabled in IEM. 246 * 247 * On Intel or when nested hardware virtualization support isn't compiled 248 * we still need to implement hypercalls rather than throw a #UD. 249 */ 250 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM 251 if (pVM->cpum.ro.GuestFeatures.fSvm) 252 { 253 rc = emR3ExecuteInstruction(pVM, pVCpu, "Hypercall"); 254 break; 255 } 256 #endif 257 /** @todo IEM/REM need to handle VMCALL/VMMCALL, see 258 * @bugref{7270#c168}. */ 259 uint8_t cbInstr = 0; 260 VBOXSTRICTRC rcStrict = GIMExecHypercallInstr(pVCpu, pCtx, &cbInstr); 261 if (rcStrict == VINF_SUCCESS) 262 { 263 Assert(cbInstr); 264 pCtx->rip += cbInstr; 265 /* Update interrupt inhibition. */ 266 if ( VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS) 267 && pCtx->rip != EMGetInhibitInterruptsPC(pVCpu)) 268 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS); 269 rc = VINF_SUCCESS; 270 } 271 else if (rcStrict == VINF_GIM_HYPERCALL_CONTINUING) 272 rc = VINF_SUCCESS; 273 else 274 { 275 Assert(rcStrict != VINF_GIM_R3_HYPERCALL); 276 rc = VBOXSTRICTRC_VAL(rcStrict); 277 } 278 break; 279 } 243 rc = emR3ExecuteInstruction(pVM, pVCpu, "Hypercall"); 244 break; 280 245 281 246 #ifdef EMHANDLERC_WITH_HM … … 308 273 rc = emR3ExecuteInstruction(pVM, pVCpu, "TSS FAULT: "); 309 274 break; 310 #endif 311 312 #ifdef EMHANDLERC_WITH_PATM 275 313 276 case VINF_PATM_PENDING_IRQ_AFTER_IRET: 314 277 rc = emR3ExecuteInstruction(pVM, pVCpu, "EMUL: ", VINF_PATM_PENDING_IRQ_AFTER_IRET); … … 324 287 325 288 case VINF_EM_RAW_INJECT_TRPM_EVENT: 289 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_XCPT_MASK); 326 290 rc = VBOXSTRICTRC_VAL(IEMInjectTrpmEvent(pVCpu)); 327 291 /* The following condition should be removed when IEM_IMPLEMENTS_TASKSWITCH becomes true. */ -
trunk/src/VBox/VMM/include/EMInternal.h
r72462 r72488 474 474 EMSTATE emR3Reschedule(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 475 475 int emR3ForcedActions(PVM pVM, PVMCPU pVCpu, int rc); 476 int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, intrc);476 VBOXSTRICTRC emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc); 477 477 478 478 int emR3RawUpdateForceFlag(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc); -
trunk/src/VBox/VMM/include/IEMInternal.h
r72485 r72488 813 813 else \ 814 814 { \ 815 int rcCtxImport = iemCtxImport(a_pVCpu, a_pCtx, a_fExtrnImport); \815 int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \ 816 816 AssertRCReturn(rcCtxImport, rcCtxImport); \ 817 817 } \ … … 833 833 else \ 834 834 { \ 835 int rcCtxImport = iemCtxImport(a_pVCpu, a_pCtx, a_fExtrnImport); \835 int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \ 836 836 AssertLogRelRC(rcCtxImport); \ 837 837 } \ … … 855 855 else \ 856 856 { \ 857 int rcCtxImport = iemCtxImport(a_pVCpu, a_pCtx, a_fExtrnImport); \857 int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \ 858 858 AssertRCStmt(rcCtxImport, longjmp(*pVCpu->iem.s.CTX_SUFF(pJmpBuf), rcCtxImport)); \ 859 859 } \ 860 860 } while (0) 861 861 862 int iemCtxImport(PVMCPU pVCpu, PCPUMCTX pCtx, uint64_t fExtrnImport);863 862 864 863 -
trunk/src/VBox/VMM/include/NEMInternal.h
r72484 r72488 272 272 STAMCOUNTER StatBreakOnStatus; 273 273 STAMCOUNTER StatImportOnDemand; 274 STAMCOUNTER StatImportOnReturn; 275 STAMCOUNTER StatImportOnReturnSkipped; 274 276 /** @} */ 275 277 #endif /* RT_OS_WINDOWS */
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