Changeset 72499 in vbox for trunk/src/VBox/Devices/PC/BIOS
- Timestamp:
- Jun 11, 2018 10:24:01 AM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 122984
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/PC/BIOS/post.c
r72416 r72499 125 125 #define APIC_BASE_MSR 0x1B 126 126 #define APICBASE_X2APIC 0x400 /* bit 10 */ 127 #define APICBASE_ DISABLE0x800 /* bit 11 */127 #define APICBASE_ENABLE 0x800 /* bit 11 */ 128 128 129 129 /* … … 145 145 { 146 146 uint64_t base_msr; 147 uint16_t mask; 147 uint16_t mask_set; 148 uint16_t mask_clr; 148 149 uint8_t apic_mode; 149 150 uint32_t cpu_id[4]; … … 164 165 apic_mode = inb_cmos(0x78); 165 166 167 mask_set = mask_clr = 0; 166 168 if (apic_mode == APICMODE_X2APIC) 167 mask = APICBASE_X2APIC;169 mask_set = APICBASE_X2APIC; 168 170 else if (apic_mode == APICMODE_DISABLED) 169 mask = APICBASE_DISABLE; /** @todo r=bird: Shouldn't we clear bit 11 when disabling the APIC? */171 mask_clr = APICBASE_ENABLE; 170 172 else 171 mask = 0; /* Any other setting leaves things alone. */173 ; /* Any other setting leaves things alone. */ 172 174 173 if (mask ) {175 if (mask_set || mask_clr) { 174 176 base_msr = msr_read(APIC_BASE_MSR); 175 base_msr |= mask; 177 base_msr &= ~(uint64_t)mask_clr; 178 base_msr |= mask_set; 176 179 msr_write(base_msr, APIC_BASE_MSR); 177 180 }
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