Changeset 72522 in vbox
- Timestamp:
- Jun 12, 2018 8:45:27 AM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 123009
- Location:
- trunk
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/cpum.h
r72497 r72522 1223 1223 VMM_INT_DECL(void) CPUMGuestLazyLoadHiddenCsAndSs(PVMCPU pVCpu); 1224 1224 VMM_INT_DECL(void) CPUMGuestLazyLoadHiddenSelectorReg(PVMCPU pVCpu, PCPUMSELREG pSReg); 1225 VMM R0_INT_DECL(void) CPUMR0SetGuestTscAux(PVMCPU pVCpu, uint64_t uValue);1226 VMM R0_INT_DECL(uint64_t) CPUMR0GetGuestTscAux(PVMCPU pVCpu);1227 VMM R0_INT_DECL(void) CPUMR0SetGuestSpecCtrl(PVMCPU pVCpu, uint64_t uValue);1228 VMM R0_INT_DECL(uint64_t) CPUMR0GetGuestSpecCtrl(PVMCPU pVCpu);1225 VMM_INT_DECL(void) CPUMSetGuestTscAux(PVMCPU pVCpu, uint64_t uValue); 1226 VMM_INT_DECL(uint64_t) CPUMGetGuestTscAux(PVMCPU pVCpu); 1227 VMM_INT_DECL(void) CPUMSetGuestSpecCtrl(PVMCPU pVCpu, uint64_t uValue); 1228 VMM_INT_DECL(uint64_t) CPUMGetGuestSpecCtrl(PVMCPU pVCpu); 1229 1229 /** @} */ 1230 1230 -
trunk/include/VBox/vmm/nem.h
r72484 r72522 91 91 VMMR0_INT_DECL(int) NEMR0ExportState(PGVM pGVM, PVM pVM, VMCPUID idCpu); 92 92 VMMR0_INT_DECL(int) NEMR0ImportState(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t fWhat); 93 VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, PVM pVM, VMCPUID idCpu); 93 94 VMMR0_INT_DECL(VBOXSTRICTRC) NEMR0RunGuestCode(PGVM pGVM, VMCPUID idCpu); 94 95 VMMR0_INT_DECL(int) NEMR0UpdateStatistics(PGVM pGVM, PVM pVM, VMCPUID idCpu); … … 122 123 /** @} */ 123 124 125 VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPU pVCpu, uint64_t *pcTicks, uint32_t *puAux); 124 126 /** @} */ 125 127 -
trunk/include/VBox/vmm/vmm.h
r72469 r72522 443 443 /** Call NEMR0ImportState() (host specific). */ 444 444 VMMR0_DO_NEM_IMPORT_STATE, 445 /** Call NEMR0QueryCpuTick() (host specific). */ 446 VMMR0_DO_NEM_QUERY_CPU_TICK, 445 447 /** Call NEMR0UpdateStatistics() (host specific). */ 446 448 VMMR0_DO_NEM_UPDATE_STATISTICS, -
trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
r72358 r72522 6305 6305 } 6306 6306 6307 #ifdef IN_RING06308 6307 6309 6308 /** … … 6314 6313 * @thread EMT(pVCpu) 6315 6314 */ 6316 VMMR0_INT_DECL(uint64_t) CPUMR0GetGuestTscAux(PVMCPU pVCpu) 6317 { 6315 VMM_INT_DECL(uint64_t) CPUMGetGuestTscAux(PVMCPU pVCpu) 6316 { 6317 Assert(!(pVCpu->cpum.s.Guest.fExtrn & CPUMCTX_EXTRN_TSC_AUX)); 6318 6318 return pVCpu->cpum.s.GuestMsrs.msr.TscAux; 6319 6319 } … … 6327 6327 * @thread EMT(pVCpu) 6328 6328 */ 6329 VMMR0_INT_DECL(void) CPUMR0SetGuestTscAux(PVMCPU pVCpu, uint64_t uValue) 6330 { 6329 VMM_INT_DECL(void) CPUMSetGuestTscAux(PVMCPU pVCpu, uint64_t uValue) 6330 { 6331 pVCpu->cpum.s.Guest.fExtrn &= ~CPUMCTX_EXTRN_TSC_AUX; 6331 6332 pVCpu->cpum.s.GuestMsrs.msr.TscAux = uValue; 6332 6333 } … … 6339 6340 * @thread EMT(pVCpu) 6340 6341 */ 6341 VMM R0_INT_DECL(uint64_t) CPUMR0GetGuestSpecCtrl(PVMCPU pVCpu)6342 VMM_INT_DECL(uint64_t) CPUMGetGuestSpecCtrl(PVMCPU pVCpu) 6342 6343 { 6343 6344 return pVCpu->cpum.s.GuestMsrs.msr.SpecCtrl; … … 6352 6353 * @thread EMT(pVCpu) 6353 6354 */ 6354 VMM R0_INT_DECL(void) CPUMR0SetGuestSpecCtrl(PVMCPU pVCpu, uint64_t uValue)6355 VMM_INT_DECL(void) CPUMSetGuestSpecCtrl(PVMCPU pVCpu, uint64_t uValue) 6355 6356 { 6356 6357 pVCpu->cpum.s.GuestMsrs.msr.SpecCtrl = uValue; 6357 6358 } 6358 6359 6359 #endif /* IN_RING0 */6360 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r72518 r72522 6904 6904 } 6905 6905 6906 6906 6907 /** Opcode 0xf3 0x0f 0xae 11b/1. */ 6907 6908 FNIEMOP_DEF_1(iemOp_Grp15_rdgsbase, uint8_t, bRm) … … 6931 6932 return VINF_SUCCESS; 6932 6933 } 6934 6933 6935 6934 6936 /** Opcode 0xf3 0x0f 0xae 11b/2. */ … … 6960 6962 return VINF_SUCCESS; 6961 6963 } 6964 6962 6965 6963 6966 /** Opcode 0xf3 0x0f 0xae 11b/3. */ -
trunk/src/VBox/VMM/VMMAll/NEMAll.cpp
r72484 r72522 131 131 #endif 132 132 133 #ifndef VBOX_WITH_NATIVE_NEM 134 VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPU pVCpu, uint64_t *pcTicks, uint32_t *puAux) 135 { 136 RT_NOREF(pVCpu, pcTicks, puAux); 137 AssertFailed(); 138 return VERR_NEM_IPE_9; 139 } 140 #endif 141 -
trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h
r72490 r72522 1092 1092 return nemHCWinCopyStateFromHyperV(pVCpu->pVMR3, pVCpu, pCtx, fWhat); 1093 1093 #endif 1094 } 1095 1096 1097 /** 1098 * Query the CPU tick counter and optionally the TSC_AUX MSR value. 1099 * 1100 * @returns VBox status code. 1101 * @param pVCpu The cross context CPU structure. 1102 * @param pcTicks Where to return the CPU tick count. 1103 * @param puAux Where to return the TSC_AUX register value. 1104 */ 1105 VMM_INT_DECL(int) NEMHCQueryCpuTick(PVMCPU pVCpu, uint64_t *pcTicks, uint32_t *puAux) 1106 { 1107 #ifdef IN_RING3 1108 PVM pVM = pVCpu->CTX_SUFF(pVM); 1109 VMCPU_ASSERT_EMT_RETURN(pVCpu, VERR_VM_THREAD_NOT_EMT); 1110 AssertReturn(VM_IS_NEM_ENABLED(pVM), VERR_NEM_IPE_9); 1111 1112 # ifdef NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS 1113 /* Call ring-0 and get the values. */ 1114 int rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_NEM_QUERY_CPU_TICK, 0, NULL); 1115 AssertLogRelRCReturn(rc, rc); 1116 *pcTicks = pVCpu->nem.s.Hypercall.QueryCpuTick.cTicks; 1117 if (puAux) 1118 *puAux = pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_TSC_AUX 1119 ? pVCpu->nem.s.Hypercall.QueryCpuTick.uAux : CPUMGetGuestTscAux(pVCpu); 1120 return VINF_SUCCESS; 1121 1122 # else 1123 /* Call the offical API. */ 1124 WHV_REGISTER_NAME aenmNames[2] = { WHvX64RegisterTsc, WHvX64RegisterTscAux }; 1125 WHV_REGISTER_VALUE aValues[2] = { {0, 0}, {0, 0} }; 1126 Assert(RT_ELEMENTS(aenmNames) == RT_ELEMENTS(aValues)); 1127 HRESULT hrc = WHvGetVirtualProcessorRegisters(pVM->nem.s.hPartition, pVCpu->idCpu, aenmNames, 2, aValues); 1128 AssertLogRelMsgReturn(SUCCEEDED(hrc), 1129 ("WHvGetVirtualProcessorRegisters(%p, %u,{tsc,tsc_aux},2,) -> %Rhrc (Last=%#x/%u)\n", 1130 pVM->nem.s.hPartition, pVCpu->idCpu, hrc, RTNtLastStatusValue(), RTNtLastErrorValue()) 1131 , VERR_NEM_GET_REGISTERS_FAILED); 1132 *pcTicks = aValues[0].Reg64; 1133 if (puAux) 1134 *pcTicks = pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_TSC_AUX ? aValues[0].Reg64 : CPUMGetGuestTscAux(pVCpu); 1135 return VINF_SUCCESS; 1136 #endif 1137 #else /* IN_RING0 */ 1138 /** @todo improve and secure this translation */ 1139 PGVM pGVM = GVMMR0ByHandle(pVCpu->pVMR0->hSelf); 1140 AssertReturn(pGVM, VERR_INVALID_VMCPU_HANDLE); 1141 VMCPUID idCpu = pVCpu->idCpu; 1142 ASMCompilerBarrier(); 1143 AssertReturn(idCpu < pGVM->cCpus, VERR_INVALID_VMCPU_HANDLE); 1144 1145 int rc = nemR0WinQueryCpuTick(pGVM, &pGVM->aCpus[idCpu], pcTicks, puAux); 1146 if (RT_SUCCESS(rc) && puAux && !(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_TSC_AUX)) 1147 *puAux = CPUMGetGuestTscAux(pVCpu); 1148 return rc; 1149 #endif /* IN_RING0 */ 1094 1150 } 1095 1151 … … 4222 4278 } 4223 4279 4280 -
trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp
r69111 r72522 22 22 #define LOG_GROUP LOG_GROUP_TM 23 23 #include <VBox/vmm/tm.h> 24 #include <VBox/vmm/gim.h> 25 #include <VBox/vmm/dbgf.h> 26 #include <VBox/vmm/nem.h> 24 27 #include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */ 25 28 #include "TMInternal.h" 26 29 #include <VBox/vmm/vm.h> 27 #include <VBox/vmm/gim.h>28 #include <VBox/vmm/dbgf.h>29 30 #include <VBox/sup.h> 30 31 … … 82 83 /** @todo Test that pausing and resuming doesn't cause lag! (I.e. that we're 83 84 * unpaused before the virtual time and stopped after it. */ 84 if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET) 85 pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC; 86 else 87 pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */) 88 - pVCpu->tm.s.u64TSC; 85 switch (pVM->tm.s.enmTSCMode) 86 { 87 case TMTSCMODE_REAL_TSC_OFFSET: 88 pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC; 89 break; 90 case TMTSCMODE_VIRT_TSC_EMULATED: 91 case TMTSCMODE_DYNAMIC: 92 pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */) 93 - pVCpu->tm.s.u64TSC; 94 break; 95 case TMTSCMODE_NATIVE_API: 96 pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */ 97 break; 98 default: 99 AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE); 100 } 89 101 return VINF_SUCCESS; 90 102 } … … 117 129 118 130 /* When resuming, use the TSC value of the last stopped VCPU to avoid the TSC going back. */ 119 if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET) 120 pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC; 121 else 122 pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */) 123 - pVM->tm.s.u64LastPausedTSC; 131 switch (pVM->tm.s.enmTSCMode) 132 { 133 case TMTSCMODE_REAL_TSC_OFFSET: 134 pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC; 135 break; 136 case TMTSCMODE_VIRT_TSC_EMULATED: 137 case TMTSCMODE_DYNAMIC: 138 pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */) 139 - pVM->tm.s.u64LastPausedTSC; 140 break; 141 case TMTSCMODE_NATIVE_API: 142 pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */ 143 break; 144 default: 145 AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE); 146 } 124 147 125 148 /* Calculate the offset for other VCPUs to use. */ … … 413 436 { 414 437 PVM pVM = pVCpu->CTX_SUFF(pVM); 415 if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET) 416 u64 = SUPReadTsc(); 417 else 418 u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers); 438 switch (pVM->tm.s.enmTSCMode) 439 { 440 case TMTSCMODE_REAL_TSC_OFFSET: 441 u64 = SUPReadTsc(); 442 break; 443 case TMTSCMODE_VIRT_TSC_EMULATED: 444 case TMTSCMODE_DYNAMIC: 445 u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers); 446 break; 447 #ifndef IN_RC 448 case TMTSCMODE_NATIVE_API: 449 { 450 u64 = 0; 451 int rcNem = NEMHCQueryCpuTick(pVCpu, &u64, NULL); 452 AssertLogRelRCReturn(rcNem, SUPReadTsc()); 453 break; 454 } 455 #endif 456 default: 457 AssertFailedBreakStmt(u64 = SUPReadTsc()); 458 } 419 459 u64 -= pVCpu->tm.s.offTSCRawSrc; 420 460 -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r72466 r72522 4418 4418 && !(pVmcb->ctrl.u64InterceptCtrl & SVM_CTRL_INTERCEPT_RDTSCP)) 4419 4419 { 4420 uint64_t const uGuestTscAux = CPUM R0GetGuestTscAux(pVCpu);4420 uint64_t const uGuestTscAux = CPUMGetGuestTscAux(pVCpu); 4421 4421 pVCpu->hm.s.u64HostTscAux = ASMRdMsr(MSR_K8_TSC_AUX); 4422 4422 if (uGuestTscAux != pVCpu->hm.s.u64HostTscAux) … … 4561 4561 { 4562 4562 uint64_t u64GuestTscAuxMsr = ASMRdMsr(MSR_K8_TSC_AUX); 4563 CPUM R0SetGuestTscAux(pVCpu, u64GuestTscAuxMsr);4563 CPUMSetGuestTscAux(pVCpu, u64GuestTscAuxMsr); 4564 4564 if (u64GuestTscAuxMsr != pVCpu->hm.s.u64HostTscAux) 4565 4565 ASMWrMsr(MSR_K8_TSC_AUX, pVCpu->hm.s.u64HostTscAux); -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r72493 r72522 6644 6644 switch (pMsr->u32Msr) 6645 6645 { 6646 case MSR_K8_TSC_AUX: CPUM R0SetGuestTscAux(pVCpu, pMsr->u64Value);break;6647 case MSR_K8_LSTAR: pMixedCtx->msrLSTAR = pMsr->u64Value; 6648 case MSR_K6_STAR: pMixedCtx->msrSTAR = pMsr->u64Value; 6649 case MSR_K8_SF_MASK: pMixedCtx->msrSFMASK = pMsr->u64Value; 6650 case MSR_K8_KERNEL_GS_BASE: pMixedCtx->msrKERNELGSBASE = pMsr->u64Value; 6651 case MSR_IA32_SPEC_CTRL: CPUM R0SetGuestSpecCtrl(pVCpu, pMsr->u64Value);break;6646 case MSR_K8_TSC_AUX: CPUMSetGuestTscAux(pVCpu, pMsr->u64Value); break; 6647 case MSR_K8_LSTAR: pMixedCtx->msrLSTAR = pMsr->u64Value; break; 6648 case MSR_K6_STAR: pMixedCtx->msrSTAR = pMsr->u64Value; break; 6649 case MSR_K8_SF_MASK: pMixedCtx->msrSFMASK = pMsr->u64Value; break; 6650 case MSR_K8_KERNEL_GS_BASE: pMixedCtx->msrKERNELGSBASE = pMsr->u64Value; break; 6651 case MSR_IA32_SPEC_CTRL: CPUMSetGuestSpecCtrl(pVCpu, pMsr->u64Value); break; 6652 6652 case MSR_K6_EFER: /* Nothing to do here since we intercept writes, see hmR0VmxLoadGuestMsrs(). */ 6653 6653 break; … … 9192 9192 Assert(HMVMXCPU_GST_IS_UPDATED(pVCpu, HMVMX_UPDATED_GUEST_AUTO_LOAD_STORE_MSRS)); 9193 9193 9194 rc2 = hmR0VmxAddAutoLoadStoreMsr(pVCpu, MSR_K8_TSC_AUX, CPUM R0GetGuestTscAux(pVCpu), true /* fUpdateHostMsr */,9194 rc2 = hmR0VmxAddAutoLoadStoreMsr(pVCpu, MSR_K8_TSC_AUX, CPUMGetGuestTscAux(pVCpu), true /* fUpdateHostMsr */, 9195 9195 &fMsrUpdated); 9196 9196 AssertRC(rc2); … … 9214 9214 Assert(HMVMXCPU_GST_IS_UPDATED(pVCpu, HMVMX_UPDATED_GUEST_AUTO_LOAD_STORE_MSRS)); 9215 9215 9216 rc2 = hmR0VmxAddAutoLoadStoreMsr(pVCpu, MSR_IA32_SPEC_CTRL, CPUM R0GetGuestSpecCtrl(pVCpu), true /* fUpdateHostMsr */,9216 rc2 = hmR0VmxAddAutoLoadStoreMsr(pVCpu, MSR_IA32_SPEC_CTRL, CPUMGetGuestSpecCtrl(pVCpu), true /* fUpdateHostMsr */, 9217 9217 &fMsrUpdated); 9218 9218 AssertRC(rc2); -
trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp
r72488 r72522 21 21 *********************************************************************************************************************************/ 22 22 #define LOG_GROUP LOG_GROUP_NEM 23 #define VMCPU_INCL_CPUM_GST_CTX 23 24 #include <iprt/nt/nt.h> 24 25 #include <iprt/nt/hyperv.h> … … 82 83 NEM_TMPL_STATIC int nemR0WinExportState(PGVM pGVM, PGVMCPU pGVCpu, PCPUMCTX pCtx); 83 84 NEM_TMPL_STATIC int nemR0WinImportState(PGVM pGVM, PGVMCPU pGVCpu, PCPUMCTX pCtx, uint64_t fWhat); 85 NEM_TMPL_STATIC int nemR0WinQueryCpuTick(PGVM pGVM, PGVMCPU pGVCpu, uint64_t *pcTicks, uint32_t *pcAux); 84 86 DECLINLINE(NTSTATUS) nemR0NtPerformIoControl(PGVM pGVM, uint32_t uFunction, void *pvInput, uint32_t cbInput, 85 87 void *pvOutput, uint32_t cbOutput); … … 586 588 * @returns VBox status code. 587 589 * @param pGVM The ring-0 VM handle. 588 * @param pGVCpu The irng-0 VCPU handle.590 * @param pGVCpu The ring-0 VCPU handle. 589 591 * @param pCtx The CPU context structure to import into. 590 592 */ … … 1295 1297 * @returns VBox status code. 1296 1298 * @param pGVM The ring-0 VM handle. 1297 * @param pGVCpu The irng-0 VCPU handle.1299 * @param pGVCpu The ring-0 VCPU handle. 1298 1300 * @param pCtx The CPU context structure to import into. 1299 1301 * @param fWhat What to import, CPUMCTX_EXTRN_XXX. … … 2205 2207 2206 2208 2209 /** 2210 * Worker for NEMR0QueryCpuTick and the ring-0 NEMHCQueryCpuTick. 2211 * 2212 * @returns VBox status code. 2213 * @param pGVM The ring-0 VM handle. 2214 * @param pGVCpu The ring-0 VCPU handle. 2215 * @param pcTicks Where to return the current CPU tick count. 2216 * @param pcAux Where to return the hyper-V TSC_AUX value. Optional. 2217 */ 2218 NEM_TMPL_STATIC int nemR0WinQueryCpuTick(PGVM pGVM, PGVMCPU pGVCpu, uint64_t *pcTicks, uint32_t *pcAux) 2219 { 2220 /* 2221 * Hypercall parameters. 2222 */ 2223 HV_INPUT_GET_VP_REGISTERS *pInput = (HV_INPUT_GET_VP_REGISTERS *)pGVCpu->nem.s.HypercallData.pbPage; 2224 AssertPtrReturn(pInput, VERR_INTERNAL_ERROR_3); 2225 2226 pInput->PartitionId = pGVM->nem.s.idHvPartition; 2227 pInput->VpIndex = pGVCpu->idCpu; 2228 pInput->fFlags = 0; 2229 pInput->Names[0] = HvX64RegisterTsc; 2230 pInput->Names[1] = HvX64RegisterTscAux; 2231 2232 size_t const cbInput = RT_ALIGN_Z(RT_OFFSETOF(HV_INPUT_GET_VP_REGISTERS, Names[2]), 32); 2233 HV_REGISTER_VALUE *paValues = (HV_REGISTER_VALUE *)((uint8_t *)pInput + cbInput); 2234 RT_BZERO(paValues, sizeof(paValues[0]) * 2); 2235 2236 /* 2237 * Make the hypercall. 2238 */ 2239 uint64_t uResult = g_pfnHvlInvokeHypercall(HV_MAKE_CALL_INFO(HvCallGetVpRegisters, 2), 2240 pGVCpu->nem.s.HypercallData.HCPhysPage, 2241 pGVCpu->nem.s.HypercallData.HCPhysPage + cbInput); 2242 AssertLogRelMsgReturn(uResult == HV_MAKE_CALL_REP_RET(2), ("uResult=%RX64 cRegs=%#x\n", uResult, 2), 2243 VERR_NEM_GET_REGISTERS_FAILED); 2244 2245 /* 2246 * Get results. 2247 */ 2248 *pcTicks = paValues[0].Reg64; 2249 if (pcAux) 2250 *pcAux = paValues[0].Reg32; 2251 return VINF_SUCCESS; 2252 } 2253 2254 2255 /** 2256 * Queries the TSC and TSC_AUX values, putting the results in . 2257 * 2258 * @returns VBox status code 2259 * @param pGVM The ring-0 VM handle. 2260 * @param pVM The cross context VM handle. 2261 * @param idCpu The calling EMT. Necessary for getting the 2262 * hypercall page and arguments. 2263 */ 2264 VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, PVM pVM, VMCPUID idCpu) 2265 { 2266 /* 2267 * Validate the call. 2268 */ 2269 int rc = GVMMR0ValidateGVMandVMandEMT(pGVM, pVM, idCpu); 2270 if (RT_SUCCESS(rc)) 2271 { 2272 PVMCPU pVCpu = &pVM->aCpus[idCpu]; 2273 PGVMCPU pGVCpu = &pGVM->aCpus[idCpu]; 2274 AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API); 2275 2276 /* 2277 * Call worker. 2278 */ 2279 pVCpu->nem.s.Hypercall.QueryCpuTick.cTicks = 0; 2280 pVCpu->nem.s.Hypercall.QueryCpuTick.uAux = 0; 2281 rc = nemR0WinQueryCpuTick(pGVM, pGVCpu, &pVCpu->nem.s.Hypercall.QueryCpuTick.cTicks, 2282 &pVCpu->nem.s.Hypercall.QueryCpuTick.uAux); 2283 } 2284 return rc; 2285 } 2286 2207 2287 VMMR0_INT_DECL(VBOXSTRICTRC) NEMR0RunGuestCode(PGVM pGVM, VMCPUID idCpu) 2208 2288 { -
trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
r72300 r72522 2063 2063 break; 2064 2064 2065 case VMMR0_DO_NEM_QUERY_CPU_TICK: 2066 if (u64Arg || pReqHdr || idCpu == NIL_VMCPUID) 2067 return VERR_INVALID_PARAMETER; 2068 rc = NEMR0QueryCpuTick(pGVM, pVM, idCpu); 2069 VMM_CHECK_SMAP_CHECK2(pVM, RT_NOTHING); 2070 break; 2071 2065 2072 case VMMR0_DO_NEM_UPDATE_STATISTICS: 2066 2073 if (u64Arg || pReqHdr) -
trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp
r72488 r72522 27 27 *********************************************************************************************************************************/ 28 28 #define LOG_GROUP LOG_GROUP_NEM 29 #define VMCPU_INCL_CPUM_GST_CTX 29 30 #include <iprt/nt/nt-and-windows.h> 30 31 #include <iprt/nt/hyperv.h> -
trunk/src/VBox/VMM/VMMR3/TM.cpp
r70948 r72522 436 436 pVM->tm.s.cTSCTicksPerSecond); 437 437 else 438 {439 438 pVM->tm.s.enmTSCMode = TMTSCMODE_VIRT_TSC_EMULATED; 440 }441 439 442 440 /** @cfgm{/TM/TSCTiedToExecution, bool, false} … … 1197 1195 VM_ASSERT_EMT0(pVM); 1198 1196 uint64_t offTscRawSrc; 1199 if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET) 1200 offTscRawSrc = SUPReadTsc(); 1201 else 1202 { 1203 offTscRawSrc = TMVirtualSyncGetNoCheck(pVM); 1204 offTscRawSrc = ASMMultU64ByU32DivByU32(offTscRawSrc, pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL); 1197 switch (pVM->tm.s.enmTSCMode) 1198 { 1199 case TMTSCMODE_REAL_TSC_OFFSET: 1200 offTscRawSrc = SUPReadTsc(); 1201 break; 1202 case TMTSCMODE_DYNAMIC: 1203 case TMTSCMODE_VIRT_TSC_EMULATED: 1204 offTscRawSrc = TMVirtualSyncGetNoCheck(pVM); 1205 offTscRawSrc = ASMMultU64ByU32DivByU32(offTscRawSrc, pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL); 1206 break; 1207 case TMTSCMODE_NATIVE_API: 1208 /** @todo NEM TSC reset on reset for Windows8+ bug workaround. */ 1209 offTscRawSrc = 0; 1210 break; 1211 default: 1212 AssertFailedBreakStmt(offTscRawSrc = 0); 1205 1213 } 1206 1214 for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++) … … 3305 3313 AssertPtr(pVM); Assert(pVM->tm.s.fTSCModeSwitchAllowed); NOREF(pVCpuEmt); NOREF(pvData); 3306 3314 Assert(pVM->tm.s.enmTSCMode != TMTSCMODE_REAL_TSC_OFFSET); 3315 Assert(pVM->tm.s.enmTSCMode != TMTSCMODE_NATIVE_API); /** @todo figure out NEM/win and paravirt */ 3307 3316 Assert(tmR3HasFixedTSC(pVM)); 3308 3317 … … 3584 3593 pHlp->pfnPrintf(pHlp, "\n offset %RU64", pVCpu->tm.s.offTSCRawSrc); 3585 3594 } 3595 else if (pVM->tm.s.enmTSCMode == TMTSCMODE_NATIVE_API) 3596 pHlp->pfnPrintf(pHlp, " - native api"); 3586 3597 else 3587 3598 pHlp->pfnPrintf(pHlp, " - virtual clock"); … … 3638 3649 case TMTSCMODE_VIRT_TSC_EMULATED: return "VirtTscEmulated"; 3639 3650 case TMTSCMODE_DYNAMIC: return "Dynamic"; 3651 case TMTSCMODE_NATIVE_API: return "NativeApi"; 3640 3652 default: return "???"; 3641 3653 } -
trunk/src/VBox/VMM/include/NEMInternal.h
r72490 r72522 234 234 uint32_t cPages; 235 235 } UnmapPages; 236 /** Result from NEMR0QueryCpuTick. */ 237 struct 238 { 239 uint64_t cTicks; 240 uint32_t uAux; 241 } QueryCpuTick; 236 242 } Hypercall; 237 243 /** I/O control buffer, we always use this for I/O controls. */ -
trunk/src/VBox/VMM/include/TMInternal.h
r70018 r72522 329 329 TMTSCMODE_REAL_TSC_OFFSET, 330 330 /** The guest TSC is dynamically derived through emulating or offsetting. */ 331 TMTSCMODE_DYNAMIC 331 TMTSCMODE_DYNAMIC, 332 /** The native API provides it. */ 333 TMTSCMODE_NATIVE_API 332 334 } TMTSCMODE; 333 335 AssertCompileSize(TMTSCMODE, sizeof(uint32_t));
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