Changeset 72619 in vbox for trunk/src/VBox/VMM

Timestamp:

Jun 19, 2018 7:12:46 PM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

123118

Message:

VMM: Temporarily put the old RDTSC[P] code back and enabled it (reverted r123092). bugref:6973

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/EMAll.cpp (modified) (1 diff)
• VMMR0/HMSVMR0.cpp (modified) (4 diffs)
• VMMR0/HMVMXR0.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -1865 +1865 @@
 }
 
+
+#if 1 /** @todo Remove after testing and enabling @bugref{6973}. */
+
+/**
+ * Interpret RDTSC.
+ *
+ * @returns VBox status code.
+ * @param   pVM         The cross context VM structure.
+ * @param   pVCpu       The cross context virtual CPU structure.
+ * @param   pRegFrame   The register frame.
+ *
+ */
+VMM_INT_DECL(int) EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
+{
+    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
+    unsigned uCR4 = CPUMGetGuestCR4(pVCpu);
+
+    if (uCR4 & X86_CR4_TSD)
+        return VERR_EM_INTERPRETER; /* genuine #GP */
+
+    uint64_t uTicks = TMCpuTickGet(pVCpu);
+#ifdef VBOX_WITH_NESTED_HWVIRT_SVM
+    uTicks = CPUMApplyNestedGuestTscOffset(pVCpu, uTicks);
+#endif
+
+    /* Same behaviour in 32 & 64 bits mode */
+    pRegFrame->rax = RT_LO_U32(uTicks);
+    pRegFrame->rdx = RT_HI_U32(uTicks);
+#ifdef VBOX_COMPARE_IEM_AND_EM
+    g_fIgnoreRaxRdx = true;
+#endif
+
+    NOREF(pVM);
+    return VINF_SUCCESS;
+}
+
+/**
+ * Interpret RDTSCP.
+ *
+ * @returns VBox status code.
+ * @param   pVM         The cross context VM structure.
+ * @param   pVCpu       The cross context virtual CPU structure.
+ * @param   pCtx        The CPU context.
+ *
+ */
+VMM_INT_DECL(int) EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
+{
+    Assert(pCtx == CPUMQueryGuestCtxPtr(pVCpu));
+    uint32_t uCR4 = CPUMGetGuestCR4(pVCpu);
+
+    if (!pVM->cpum.ro.GuestFeatures.fRdTscP)
+    {
+        AssertFailed();
+        return VERR_EM_INTERPRETER; /* genuine #UD */
+    }
+
+    if (uCR4 & X86_CR4_TSD)
+        return VERR_EM_INTERPRETER; /* genuine #GP */
+
+    uint64_t uTicks = TMCpuTickGet(pVCpu);
+#ifdef VBOX_WITH_NESTED_HWVIRT_SVM
+    uTicks = CPUMApplyNestedGuestTscOffset(pVCpu, uTicks);
+#endif
+
+    /* Same behaviour in 32 & 64 bits mode */
+    pCtx->rax = RT_LO_U32(uTicks);
+    pCtx->rdx = RT_HI_U32(uTicks);
+#ifdef VBOX_COMPARE_IEM_AND_EM
+    g_fIgnoreRaxRdx = true;
+#endif
+    /* Low dword of the TSC_AUX msr only. */
+    VBOXSTRICTRC rc2 = CPUMQueryGuestMsr(pVCpu, MSR_K8_TSC_AUX, &pCtx->rcx); Assert(rc2 == VINF_SUCCESS); NOREF(rc2);
+    pCtx->rcx &= UINT32_C(0xffffffff);
+
+    return VINF_SUCCESS;
+}
+
+#endif /* Trying to use IEM APIs instead. */
 
 /**

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -6255 +6255 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS();
+#if 0 /** @todo Needs testing. @bugref{6973} */
     VBOXSTRICTRC rcStrict = IEMExecDecodedRdtsc(pVCpu, hmR0SvmGetInstrLengthHwAssist(pVCpu, pCtx, 2));
     if (rcStrict == VINF_SUCCESS)
@@ -6263 +6264 @@
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
     return VBOXSTRICTRC_TODO(rcStrict);
+#else
+    int rc = EMInterpretRdtsc(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pCtx));
+    if (RT_LIKELY(rc == VINF_SUCCESS))
+    {
+        pSvmTransient->fUpdateTscOffsetting = true;
+        hmR0SvmAdvanceRipHwAssist(pVCpu, pCtx, 2);
+        HMSVM_CHECK_SINGLE_STEP(pVCpu, rc);
+    }
+    else
+    {
+        AssertMsgFailed(("hmR0SvmExitRdtsc: EMInterpretRdtsc failed with %Rrc\n", rc));
+        rc = VERR_EM_INTERPRETER;
+    }
+    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
+    return rc;
+#endif
 }
 
@@ -6272 +6289 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS();
+#if 0 /** @todo Needs testing. @bugref{6973} */
     VBOXSTRICTRC rcStrict = IEMExecDecodedRdtscp(pVCpu, hmR0SvmGetInstrLengthHwAssist(pVCpu, pCtx, 3));
     if (rcStrict == VINF_SUCCESS)
@@ -6280 +6298 @@
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
     return VBOXSTRICTRC_TODO(rcStrict);
+#else
+    int rc = EMInterpretRdtscp(pVCpu->CTX_SUFF(pVM), pVCpu, pCtx);
+    if (RT_LIKELY(rc == VINF_SUCCESS))
+    {
+        pSvmTransient->fUpdateTscOffsetting = true;
+        hmR0SvmAdvanceRipHwAssist(pVCpu, pCtx, 3);
+        HMSVM_CHECK_SINGLE_STEP(pVCpu, rc);
+    }
+    else
+    {
+        AssertMsgFailed(("hmR0SvmExitRdtsc: EMInterpretRdtscp failed with %Rrc\n", rc));
+        rc = VERR_EM_INTERPRETER;
+    }
+    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
+    return rc;
+#endif
 }
 

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -11917 +11917 @@
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS();
+#if 0 /** @todo Needs testing. @bugref{6973} */
     int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);      /* Needed for CPL < 0 only, really. */
     rc    |= hmR0VmxSaveGuestRegsForIemExec(pVCpu, pMixedCtx, false /*fMemory*/, false /*fNeedRsp*/);
@@ -11932 +11933 @@
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
     return rcStrict;
+#else
+    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);
+    AssertRCReturn(rc, rc);
+
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    rc = EMInterpretRdtsc(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx));
+    if (RT_LIKELY(rc == VINF_SUCCESS))
+    {
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
+        Assert(pVmxTransient->cbInstr == 2);
+        /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
+        if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TSC_OFFSETTING)
+            pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
+    }
+    else
+        rc = VERR_EM_INTERPRETER;
+    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
+    return rc;
+#endif
 }
 
@@ -11941 +11961 @@
 {
     HMVMX_VALIDATE_EXIT_HANDLER_PARAMS();
+#if 0 /** @todo Needs testing. @bugref{6973} */
     int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);      /* Needed for CPL < 0 only, really. */
     rc    |= hmR0VmxSaveGuestRegsForIemExec(pVCpu, pMixedCtx, false /*fMemory*/, false /*fNeedRsp*/);
@@ -11957 +11978 @@
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
     return rcStrict;
+#else
+    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);  /* For MSR_K8_TSC_AUX */
+    AssertRCReturn(rc, rc);
+
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    rc = EMInterpretRdtscp(pVM, pVCpu, pMixedCtx);
+    if (RT_SUCCESS(rc))
+    {
+        rc  = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
+        Assert(pVmxTransient->cbInstr == 3);
+        /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
+        if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TSC_OFFSETTING)
+            pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
+    }
+    else
+    {
+        AssertMsgFailed(("hmR0VmxExitRdtscp: EMInterpretRdtscp failed with %Rrc\n", rc));
+        rc = VERR_EM_INTERPRETER;
+    }
+    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
+    return rc;
+#endif
 }